On Tue, Nov 3, 2015 at 3:19 PM, Jani Nikula wrote:
> On Tue, 03 Nov 2015, Patrik Jakobsson
> wrote:
>> On Tue, Nov 03, 2015 at 03:08:41PM +0200, Jani Nikula wrote:
>>> On Tue, 03 Nov 2015, Patrik Jakobsson
>>> wrote:
>>> > Signed-off-by: Patrik Jakobs
On Tue, Nov 3, 2015 at 11:35 AM, Imre Deak wrote:
> On ti, 2015-11-03 at 11:42 +0200, Jani Nikula wrote:
>> On Tue, 03 Nov 2015, Dave Airlie wrote:
>> > Just booted drm-next on a Skylake laptop that happened to be on my
>> > desk for a few days.
>> >
>> > I wasn't impressed. I'm very disappointed
On Tue, Nov 3, 2015 at 10:47 PM, Daniel Stone wrote:
> Hi Patrik,
>
> On 3 November 2015 at 21:21, Patrik Jakobsson
> wrote:
>> On Tue, Nov 3, 2015 at 11:35 AM, Imre Deak wrote:
>>> All of Mika's patches [1] have an R-b, except patch 7/7.
>>> [2] has R
alid cursor positions on platforms with only 12bits available thanks to
> MBZ on adjacent bits above.
I cannot find documentation for older hardware and this only touches
debugfs, so in worst case we get wrong values for really old hardware but good
ones for newer. I think that's a fair tradeoff
On Wed, Nov 4, 2015 at 6:53 PM, Ville Syrjälä
wrote:
> On Tue, Nov 03, 2015 at 01:31:12PM +0100, Patrik Jakobsson wrote:
>> Handle DC off as a power well where enabling the power well will prevent
>> the DMC to enter selected DC states (required around modesets and Aux
>> A)
On Wed, Nov 4, 2015 at 6:29 PM, Ville Syrjälä
wrote:
> On Tue, Nov 03, 2015 at 01:31:10PM +0100, Patrik Jakobsson wrote:
>> We need DC5/DC6 to be disabled around modesets to prevent confusing the
>> DMC. Also, we've run out of bits in the 32 bit power domain mask so now
&
On Wed, Nov 4, 2015 at 6:17 PM, Daniel Stone wrote:
> Hi,
>
> On 3 November 2015 at 12:31, Patrik Jakobsson
> wrote:
>> These patches should sit on top of the DMC redesign patches from
>> Animesh/Imre [1] which in turn depends on Mika's FW debug patches [2].
>
On Thu, Nov 5, 2015 at 4:02 PM, Daniel Stone wrote:
> Hi,
>
> On 3 November 2015 at 12:31, Patrik Jakobsson
> wrote:
>> We need DC5/DC6 to be disabled around modesets to prevent confusing the
>> DMC. Also, we've run out of bits in the 32 bit power domain mask
l-sites of intel_csr_load_program().
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm/i915/intel_csr.c | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
index ecb7c70..ad8bc7a 100644
--- a/drivers/gp
Move call to gen9_set_dc_state_debugmask_memory_up() into
gen9_set_dc_state() to prevent us missing it somewhere.
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm/i915/intel_runtime_pm.c | 35 -
1 file changed, 17 insertions(+), 18 deletions(-)
diff --git a
ing for CHV at least. But I think it's still a
worthwile change.
Signed-off-by: Ville Syrjälä
Reviewed-by: Patrik Jakobsson
---
drivers/gpu/drm/i915/intel_display.c | 40 ++
drivers/gpu/drm/i915/intel_dp.c | 48 +++-
drivers
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm/i915/i915_drv.c | 17 -
1 file changed, 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 0c7f435..77d183d 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm
v2: Use _unsafe (Jani)
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_params.c | 6 ++
drivers/gpu/drm/i915/intel_runtime_pm.c | 4 ++--
3 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915
We never make use of the distinction between 2 vs 4 lanes so combine
them into a per port domain instead. This saves us a few bits in the
power domain mask. Change suggested by Ville.
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm/i915/i915_debugfs.c | 28 +
drivers/gpu/drm
http://lists.freedesktop.org/archives/intel-gfx/2015-October/078898.html
Patrik Jakobsson (9):
drm/i915: Don't trust CSR program memory contents
drm/i915/gen9: Always set mask memory up when enabling DC5 or DC6
drm/i915: Remove distinction between DDI 2 vs 4 lanes
drm/i915: Add a mod
PG2 enabled is not a requirement for disabling DC5. It's just one
of the reasons why the DMC wouldn't enter DC5. During modeset we don't
care about PG2 from a DC perspective, only the fact that DC5/DC6 is not
allowed.
Signed-off-by: Patrik Jakobsson
Reviewed-by: Ville Syrjälä
-
power domains. We're already really close to the limit...
[Patrik: Add gmbus string to debugfs output]
Signed-off-by: Ville Syrjälä
Reviewed-by: Patrik Jakobsson
---
drivers/gpu/drm/i915/i915_debugfs.c | 2 ++
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i
Skylake in a later patch.
v2: Check both DC5 and DC6 bits in power well enabled function (Ville)
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm/i915/i915_drv.c | 6 --
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_display.c| 6 ++
drivers/gpu/drm
From: Ville Syrjälä
All the DDI power domains are already excluded from
SKL_DISPLAY_ALWAYS_ON_POWER_DOMAINS on account of
excluding SKL_DISPLAY_POWERWELL_1_POWER_DOMAINS and
SKL_DISPLAY_POWERWELL_2_POWER_DOMAINS, no need to spell them out again.
Signed-off-by: Ville Syrjälä
Reviewed-by: Patrik
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm/i915/i915_reg.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index e6d88f5..31b3a84 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
We need a power domain for disabling DC5/DC6 around modesets to prevent
confusing the DMC.
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm/i915/i915_debugfs.c | 2 ++
drivers/gpu/drm/i915/i915_drv.h | 1 +
2 files changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915
On Wed, Nov 11, 2015 at 08:37:36PM +0200, Ville Syrjälä wrote:
> On Wed, Nov 11, 2015 at 08:22:03PM +0200, Imre Deak wrote:
> > On ma, 2015-11-09 at 16:48 +0100, Patrik Jakobsson wrote:
> > > From: Ville Syrjälä
> > >
> > > Introduce intel_display_port_aux
On Wed, Nov 11, 2015 at 08:57:19PM +0200, Imre Deak wrote:
> On ma, 2015-11-09 at 16:48 +0100, Patrik Jakobsson wrote:
> > Handle DC off as a power well where enabling the power well will
> > prevent
> > the DMC to enter selected DC states (required around modesets and Aux
On Wed, Nov 11, 2015 at 09:04:09PM +0200, Imre Deak wrote:
> On ma, 2015-11-09 at 16:48 +0100, Patrik Jakobsson wrote:
> > v2: Use _unsafe (Jani)
> >
> > Signed-off-by: Patrik Jakobsson
> > ---
> > drivers/gpu/drm/i915/i915_drv.h | 1 +
> > driv
On Wed, Nov 11, 2015 at 09:23:32PM +0200, Imre Deak wrote:
> On ma, 2015-11-09 at 16:48 +0100, Patrik Jakobsson wrote:
> > Handle DC off as a power well where enabling the power well will
> > prevent
> > the DMC to enter selected DC states (required around modesets and Aux
On Wed, Nov 11, 2015 at 09:13:27PM +0200, Imre Deak wrote:
> On ma, 2015-11-09 at 16:48 +0100, Patrik Jakobsson wrote:
> > Signed-off-by: Patrik Jakobsson
> > ---
> > drivers/gpu/drm/i915/i915_reg.h | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff
7;t belong in ->data. With that said, I don't think it's
worth fixing right here and now and since we add some comments about this in
later patches I'm ok with this.
Reviewed-by: Patrik Jakobsson
>
> Signed-off-by: Imre Deak
> ---
> drivers/gpu/drm/i915/i915_reg.h
IO power
> wells, so fix things up accordingly.
>
Reviewed-by: Patrik Jakobsson
> Signed-off-by: Imre Deak
> ---
> drivers/gpu/drm/i915/intel_runtime_pm.c | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_runtime_p
> Testcase: igt/pm_rpm/rte (and every other rpm test)
> Signed-off-by: Damien Lespiau
> Reviewed-by: Paulo Zanoni
> Signed-off-by: Paulo Zanoni
Reviewed-by: Patrik Jakobsson
> ---
> drivers/gpu/drm/i915/intel_ddi.c| 4 ++--
> drivers/gpu/drm/i915/intel_di
On Wed, Nov 04, 2015 at 07:24:13PM +0200, Imre Deak wrote:
> Give a more proper name to this function.
>
> Signed-off-by: Imre Deak
Reviewed-by: Patrik Jakobsson
> ---
> drivers/gpu/drm/i915/intel_runtime_pm.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
t want to change non-SKL parts. This is a TODO for
> later.
>
> Signed-off-by: Imre Deak
Reviewed-by: Patrik Jakobsson
> ---
> drivers/gpu/drm/i915/i915_dma.c | 2 +-
> drivers/gpu/drm/i915/i915_drv.c | 9 ++
> drivers/gpu/drm/i915/intel_display.c|
tch all of these fixes/changes in a BXT follow-up series later on.
Reviewed-by: Patrik Jakobsson
>
> Signed-off-by: Imre Deak
> ---
> drivers/gpu/drm/i915/intel_runtime_pm.c | 36
> +
> 1 file changed, 9 insertions(+), 27 deletions(-)
>
>
6 so we only have to
care about it at one place in the code. Perhaps we could even move it to
skl_display_core_init() if we do additional testing on when it needs to be
reset. Either way, not a biggie so let's ignore it for now.
Reviewed-by: Patrik Jakobsson
> + val = I915_RE
since we get to the display core uninit step with all power
> domains disabled already).
>
> Signed-off-by: Imre Deak
Reviewed-by: Patrik Jakobsson
> ---
> drivers/gpu/drm/i915/intel_runtime_pm.c | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/
; suspend as part of the Bspec "Display uninit sequence".
>
> Signed-off-by: Imre Deak
Reviewed-by: Patrik Jakobsson
> ---
> drivers/gpu/drm/i915/intel_display.c | 14 --
> 1 file changed, 4 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gp
and
> IRQs later in the init sequence. So remove these init steps from the
> power well code.
>
> Signed-off-by: Imre Deak
Reviewed-by: Patrik Jakobsson
> ---
> drivers/gpu/drm/i915/intel_runtime_pm.c | 6 --
> 1 file changed, 6 deletions(-)
>
> diff --git
ing for CHV at least. But I think it's still a
worthwile change.
v2: Add case for PORT E. Default to POWER_DOMAIN_AUX_D for now. (Ville)
Signed-off-by: Ville Syrjälä
Reviewed-by: Patrik Jakobsson
---
drivers/gpu/drm/i915/intel_display.c | 43
drivers/gpu/drm/
v2: Add explanation of the fixed power well bits (Imre)
Signed-off-by: Patrik Jakobsson
Reviewed-by: Imre Deak
---
drivers/gpu/drm/i915/i915_reg.h | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index e6d88f5..0f3849f
Skylake in a later patch.
v2: Check both DC5 and DC6 bits in power well enabled function (Ville)
v3:
- Remove unneeded DC_OFF case in skl_set_power_well() (Imre)
- Add PW2 dependency to DC_OFF (Imre)
Signed-off-by: Patrik Jakobsson
Reviewed-by: Imre Deak
---
drivers/gpu/drm/i915/i915_drv.c
v2: Use _unsafe (Jani)
v3: Allow specifying specific DC-states instead of just DC6 (Imre)
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_params.c | 6 ++
drivers/gpu/drm/i915/intel_runtime_pm.c | 14 +++---
3 files
On Mon, Nov 16, 2015 at 03:01:07PM +0100, Patrik Jakobsson wrote:
> Handle DC off as a power well where enabling the power well will prevent
> the DMC to enter selected DC states (required around modesets and Aux
> A). Disabling the power well will allow DC states again. For now the
>
Skylake in a later patch.
v2: Check both DC5 and DC6 bits in power well enabled function (Ville)
v3:
- Remove unneeded DC_OFF case in skl_set_power_well() (Imre)
- Add PW2 dependency to DC_OFF (Imre)
v4: Put DC_OFF before PW2 in BXT power well array
Signed-off-by: Patrik Jakobsson
Reviewed-by
On Mon, Nov 16, 2015 at 8:28 PM, Imre Deak wrote:
> On ma, 2015-11-16 at 15:01 +0100, Patrik Jakobsson wrote:
>> Handle DC off as a power well where enabling the power well will prevent
>> the DMC to enter selected DC states (required around modesets and Aux
>> A). Disablin
E(dev_priv) || IS_KABYLAKE(dev_priv))
> skl_display_core_uninit(dev_priv);
> +
> + /*
> + * Even if power well support was disabled we still want to disabled
> + * we want to disable the power wells while we are system suspended.
> + */
Th
On Wed, Nov 18, 2015 at 10:02 AM, Daniel Vetter wrote:
> On Sat, Nov 07, 2015 at 08:29:49AM +1000, Dave Airlie wrote:
>> On 3 November 2015 at 22:31, Patrik Jakobsson
>> wrote:
>> > We need DC5/DC6 to be disabled around modesets to prevent confusing the
>> > DM
C/DC changes, we forgot to address that.
>
> Signed-off-by: Imre Deak
Reviewed-by: Patrik Jakobsson
> ---
> drivers/gpu/drm/i915/intel_display.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/
On Wed, Nov 18, 2015 at 06:44:43PM +0200, Imre Deak wrote:
> On ke, 2015-11-18 at 17:33 +0100, Daniel Vetter wrote:
> > On Wed, Nov 18, 2015 at 05:32:30PM +0200, Imre Deak wrote:
> > > During suspend-to-idle we need to keep the DMC firmware active and DC6
> > > enabled, since otherwise we won't rea
On Mon, Jan 11, 2016 at 10:41 PM, Daniel Vetter wrote:
> I'm auditing them all, empty ones just confuse ...
>
> Cc: Patrik Jakobsson
> Acked-by: Daniel Stone
> Reviewed-by: Alex Deucher
> Signed-off-by: Daniel Vetter
Acked-by: Patrik Jakobsson
> ---
> drivers
come in handy if the rule about the descending order is
changed on future platforms.
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm/i915/i915_dma.c | 34 ++
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_reg.h | 4
3 files changed, 39
On SKL and KBL we can have pipe A/B/C disabled by fuse settings. The
pipes must be fused in descending order (e.g. C, B+C, A+B+C). We simply
decrease info->num_pipes if we find a valid fused out config.
v2: Don't store the pipe disabled mask in device info (Damien)
Signed-off-by
message to not clutter our CI results.
Bug: https://bugs.freedesktop.org/show_bug.cgi?id=93697
Cc: Daniel Vetter
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm/i915/intel_runtime_pm.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915
On Mon, Jan 18, 2016 at 06:01:27PM +0200, Ville Syrjälä wrote:
> On Mon, Jan 18, 2016 at 03:11:57PM +0100, Patrik Jakobsson wrote:
> > On SKL and KBL we can have pipe A/B/C disabled by fuse settings. The
> > pipes must be fused in descending order (e.g. C, B+C, A+B+C). There
On Wed, Jan 13, 2016 at 06:02:52PM +0200, Gabriel Feceoru wrote:
> Some Gen7/8 production parts may have the Display Pipe C fused off.
> In this case, the display hardware will prevent the Pipe C register bit
> from being set to 1.
Please elaborate on what pipe c register bit is prevented from bei
On Mon, Jan 18, 2016 at 06:01:27PM +0200, Ville Syrjälä wrote:
> On Mon, Jan 18, 2016 at 03:11:57PM +0100, Patrik Jakobsson wrote:
> > On SKL and KBL we can have pipe A/B/C disabled by fuse settings. The
> > pipes must be fused in descending order (e.g. C, B+C, A+B+C). There
ck FUSE_STRAP register for pipe c disabled
Cc: Damien Lespiau
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm/i915/i915_dma.c | 31 +++
drivers/gpu/drm/i915/i915_reg.h | 3 +++
2 files changed, 34 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers
case.
> >
> > References: https://bugs.freedesktop.org/show_bug.cgi?id=93768
> > Suggested-by: Patrik Jakobsson
> > Cc: Patrik Jakobsson
> > Cc: Imre Deak
> > Cc: Chris Wilson
> > Signed-off-by: Mika Kuoppala
> > ---
> > drivers/gpu/drm
g pipe_count to reflect this.
>
> v2: Rename HSW_PIPE_C_DISABLE to IVB_PIPE_C_DISABLE as it already exists
> on ivybridge (Ville)
> v3: Remove unnecessary MMIO read, correct the description (Damien)
> v4: Be more specific in description (Patrick)
>
> Signed-off-by: G
On Tue, Feb 28, 2017 at 1:55 PM, Joe Perches wrote:
> Use a more common logging style.
>
> Miscellanea:
>
> o Coalesce formats and realign arguments
> o Neaten a few macros now using pr_
>
> Signed-off-by: Joe Perches
For the gma500 changes:
Acked-by: Patrik Jakobsso
On Wed, Jan 25, 2017 at 7:26 AM, Daniel Vetter wrote:
> Returning 0 for an on-chip gpu doesn't change anything at all.
>
> Cc: Patrik Jakobsson
> Signed-off-by: Daniel Vetter
Acked-by: Patrik Jakobsson
> ---
> drivers/gpu/drm/gma500/psb_drv.c | 6 --
> 1
ng to untangle these special cases won't work.
> >
> > It's not pretty, but the simplest fix (since gma500 really is the only
> > quirky pci driver like this we have) is to just have both calls.
> >
> > Signed-off-by: Daniel Vetter
> > Cc: Patrik Jakobs
On Wed, Apr 5, 2023 at 7:15 PM Daniel Vetter wrote:
>
> On Wed, 5 Apr 2023 at 18:54, Javier Martinez Canillas
> wrote:
> >
> > Daniel Vetter writes:
> >
> > > On Wed, Apr 05, 2023 at 04:32:19PM +0200, Thomas Zimmermann wrote:
> >
> > [...]
> >
> > >> > > >/*
> > >> > > > * WARNIN
On Thu, Apr 6, 2023 at 9:32 AM Daniel Vetter wrote:
>
> On Wed, 5 Apr 2023 at 19:46, Patrik Jakobsson
> wrote:
> >
> > On Wed, Apr 5, 2023 at 7:15 PM Daniel Vetter wrote:
> > >
> > > On Wed, 5 Apr 2023 at 18:54, Javier Martinez Canillas
> > &g
On Tue, May 7, 2024 at 2:04 PM Thomas Zimmermann wrote:
>
> Implement struct drm_client_funcs with the respective helpers and
> remove the custom code from the emulation. The generic helpers are
> equivalent in functionality.
>
> Signed-off-by: Thomas Zimmermann
Acked-by
-
> struct cdv_intel_limit_t {
> struct cdv_intel_range_t dot, vco, n, m, m1, m2, p, p1;
> struct cdv_intel_p2_t p2;
> --
> 1.8.3
Hi Stéphane
I have already removed that define in my gma500-next branch. You can check the
official repo at: git://gi
reate_dumb *args);
> int tegra_bo_dumb_map_offset(struct drm_file *file, struct drm_device *drm,
> uint32_t handle, uint64_t *offset);
> -int tegra_bo_dumb_destroy(struct drm_file *file, struct drm_device *drm,
> - unsigned int handle);
zilla: https://bugs.freedesktop.org/show_bug.cgi?id=74628
Cc: Paulo Zanoni
Cc: Chris Wilson
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm/i915/intel_dp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
6 17:32:41 2013 -0200
drm/i915: don't touch the VDD when disabling the panel
v2: Wrap intel_disable_dp() with _vdd_on and _vdd_off
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74628
Cc: Paulo Zanoni
Cc: Chris Wilson
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm
On Fri, Mar 14, 2014 at 2:57 PM, Daniel Vetter wrote:
> On Fri, Mar 14, 2014 at 1:07 PM, Jani Nikula
> wrote:
>>> Fixes regression introduced by:
>>> commit b3064154dfd37deb386b1e459c54e1ca2460b3d5
>>> Author: Patrik Jakobsson
>>> Date: Tue Mar 4 0
Daniel Vetter
> Date: Sun Aug 12 22:17:14 2012 +0200
>
> drm/i915: reorder edp disabling to fix ivb MacBook Air
>
> Unsurprisingly, various MacBooks failed.
>
> Effectively the same has already been done in drm-intel-next-queued.
>
> Bugzilla: https://bugs.freedeskt
ntel_ddc_get_modes(connector, &lvds_priv->ddc_bus->adapter);
> list_for_each_entry(scan, &connector->probed_modes, head) {
> if (scan->type & DRM_MODE_TYPE_PREFERRED) {
> @@ -827,10 +828,12 @@ void psb_intel_lvds_init(struct drm_device *dev,
>
e_delay);
>> }
>> }
>>
>
> Lemme check the eDP docs on this one... it's supposed to be T12, which
> is the time between power cycles. Yeah that matches what we're using
> elsewhere, so:
>
> Reviewed-by: Jesse Barnes
Starting with thi
On Thu, Feb 6, 2014 at 8:30 PM, Paulo Zanoni wrote:
> 2014-02-06 15:22 GMT-02:00 Chris Wilson :
>> On Thu, Feb 06, 2014 at 06:16:02PM +0100, Patrik Jakobsson wrote:
>>> On Fri, Dec 6, 2013 at 8:47 PM, Jesse Barnes
>>> wrote:
>>> > On Fri, 6 Dec 2013 1
On Mon, Nov 11, 2013 at 6:57 AM, Gohad, Tushar wrote:
> Folks,
Hi
>From what I've seen there are no real HDMI connectors on either Poulsbo or
Cedarview. It's just DVI with HDMI connectors. Though you might know of other
hardware that I don't.
SDVO_CMD_GET_SUPP_ENCODE always fails on my SDVO chi
The Intel PRM says the M1 and M2 divisors must be in the range of 10-20 and 5-9.
Since we do all calculations based on them being register values (which are
subtracted by 2) we need to specify them accordingly.
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm/i915/intel_display.c |4
The Intel PRM says the M1 and M2 divisors must be in the range of 10-20 and 5-9.
Since we do all calculations based on them being register values (which are
subtracted by 2) we need to specify them accordingly.
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm/i915/intel_display.c |4
On Fri, Feb 15, 2013 at 1:51 PM, Chris Wilson wrote:
> On Fri, Feb 15, 2013 at 12:18:49AM +, Chris Wilson wrote:
>> On Wed, Feb 13, 2013 at 10:20:21PM +0100, Patrik Jakobsson wrote:
>> > The Intel PRM says the M1 and M2 divisors must be in the range of 10-20
>> >
On Fri, Feb 15, 2013 at 2:30 PM, Patrik Jakobsson
wrote:
> On Fri, Feb 15, 2013 at 1:51 PM, Chris Wilson
> wrote:
>> On Fri, Feb 15, 2013 at 12:18:49AM +, Chris Wilson wrote:
>>> On Wed, Feb 13, 2013 at 10:20:21PM +0100, Patrik Jakobsson wrote:
>>> >
According to PRM we need to disable hsync and vsync even though ADPA is
disabled. The previous code did infact do the opposite so we fix it.
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm/i915/intel_crt.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu
> Accroding to the docs these bits don't exist on PCH platforms.
> intel_crt_dpms() already has a check for this, so I suppose
> intel_disable_crt() should have one too.
>
> Also I noticed that we seem to have the hsync and vsync disable
> bits reversed. At least that's what the docs are telling me
On Tue, Mar 5, 2013 at 3:59 PM, Ville Syrjälä
wrote:
> On Tue, Mar 05, 2013 at 03:33:26PM +0100, Patrik Jakobsson wrote:
>> > Accroding to the docs these bits don't exist on PCH platforms.
>> > intel_crt_dpms() already has a check for this, so I suppose
>> >
Disable bits for ADPA HSYNC and VSYNC where mixed up resulting in suspend
becoming standby and vice versa. Fixed by swapping their bit position.
Reported-by: Ville Syrjälä
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm/i915/i915_reg.h |4 ++--
1 file changed, 2 insertions(+), 2
On Wed, Mar 6, 2013 at 12:17 AM, Paul Menzel
wrote:
> Dear Patrik,
Hi Paul
> Am Dienstag, den 05.03.2013, 19:09 +0100 schrieb Patrik Jakobsson:
>> Disable bits for ADPA HSYNC and VSYNC where mixed up resulting in suspend
>> becoming standby and vice versa.
>
> nice find
On Tue, Mar 26, 2013 at 8:57 AM, Daniel Vetter wrote:
> On Mon, Mar 25, 2013 at 03:40:05PM -0400, Adam Jackson wrote:
>> f40ebd6b properly disabled the hsync/vsync logic at disable time, but
>> neglected to re-enable them at enable time.
>>
>> v2: In the enable hook, restore the connector's expect
I've added a function for detecting the driver
based on it's name.
Patrik Jakobsson (4):
drm: Add config for detecting libdrm
drm: Add dispatcher and driver identification for DRM
drm: Add decoding of i915 ioctls
drm: Add decoding of DRM and KMS ioctls
Makefile.am
There are more ioctls to add but the ones in this patch are most
commonly used.
Signed-off-by: Patrik Jakobsson
---
Makefile.am| 1 +
defs.h | 2 +
drm.c | 6 +
drm_i915.c | 287
Use pkg-config to try to find libdrm. If that fails use the standard
include directory for kernel drm headers in /usr/include/drm.
Signed-off-by: Patrik Jakobsson
---
configure.ac | 4
1 file changed, 4 insertions(+)
diff --git a/configure.ac b/configure.ac
index d829e18..ea3b6e6 100644
This patch adds many of the DRM and KMS ioctls. The rest can be added as
needed.
Signed-off-by: Patrik Jakobsson
---
drm.c | 519 ++
1 file changed, 519 insertions(+)
diff --git a/drm.c b/drm.c
index fa98fb7..e550c34 100644
--- a
Signed-off-by: Patrik Jakobsson
---
Makefile.am | 1 +
defs.h | 6 -
drm.c | 88 +
io.c| 2 +-
ioctl.c | 13 -
5 files changed, 107 insertions(+), 3 deletions(-)
create mode 100644 drm.c
diff
On Tue, Jun 09, 2015 at 03:51:08PM +0200, Gabriel Laskar wrote:
> On Tue, 9 Jun 2015 13:26:44 +0200
> Patrik Jakobsson wrote:
>
> > This patch adds many of the DRM and KMS ioctls. The rest can be added as
> > needed.
> >
> > Signed-off-by: Patrik Ja
On Tue, Jun 09, 2015 at 03:51:10PM +0200, Gabriel Laskar wrote:
> On Tue, 9 Jun 2015 13:26:42 +0200
> Patrik Jakobsson wrote:
>
> > Signed-off-by: Patrik Jakobsson
> > ---
> > Makefile.am | 1 +
> > defs.h
On Tue, Jun 09, 2015 at 03:51:05PM +0200, Gabriel Laskar wrote:
> On Tue, 9 Jun 2015 13:26:40 +0200
> Patrik Jakobsson wrote:
>
> > This set of patches adds a dispatcher for handling DRM ioctls. The
> > kernel headers for DRM might not be available on all distribution
On Wed, Jun 10, 2015 at 01:14:20AM +0300, Dmitry V. Levin wrote:
> On Tue, Jun 09, 2015 at 01:26:42PM +0200, Patrik Jakobsson wrote:
> [...]
> > --- a/Makefile.am
> > +++ b/Makefile.am
> > @@ -121,6 +121,7 @@ strace_SOURCES =\
> > utim
On Wed, Jun 10, 2015 at 01:35:35AM +0300, Dmitry V. Levin wrote:
> On Tue, Jun 09, 2015 at 01:26:43PM +0200, Patrik Jakobsson wrote:
> [...]
> > +static int i915_getparam(struct tcb *tcp, const unsigned int code, long
> > arg)
> > +{
> > + struct drm_i915_get
On Wed, Jun 10, 2015 at 01:46:53AM +0300, Dmitry V. Levin wrote:
> On Tue, Jun 09, 2015 at 01:26:44PM +0200, Patrik Jakobsson wrote:
> [...]
> > +static int drm_version(struct tcb *tcp, const unsigned int code, long arg)
> > +{
> > + struct drm_version ver;
> >
On Thu, Jun 11, 2015 at 02:27:12AM +0300, Dmitry V. Levin wrote:
> On Wed, Jun 10, 2015 at 02:45:24PM +0200, Patrik Jakobsson wrote:
> > On Wed, Jun 10, 2015 at 01:35:35AM +0300, Dmitry V. Levin wrote:
> > > On Tue, Jun 09, 2015 at 01:26:43PM +0200, Patrik Jakobsson wrote:
>
On Thu, Jun 11, 2015 at 02:26:59AM +0300, Dmitry V. Levin wrote:
> On Wed, Jun 10, 2015 at 01:52:33PM +0200, Patrik Jakobsson wrote:
> > On Wed, Jun 10, 2015 at 01:14:20AM +0300, Dmitry V. Levin wrote:
> > > On Tue, Jun 09, 2015 at 01:26:42PM +0200, Patrik Jakobsson wrote:
> [
On Sat, Jun 13, 2015 at 1:48 AM, Dmitry V. Levin wrote:
> On Thu, Jun 11, 2015 at 03:34:14PM +0200, Patrik Jakobsson wrote:
>> On Thu, Jun 11, 2015 at 02:27:12AM +0300, Dmitry V. Levin wrote:
>> > On Wed, Jun 10, 2015 at 02:45:24PM +0200, Patrik Jakobsson wrote:
>> > &
On Sat, Jun 13, 2015 at 1:41 AM, Dmitry V. Levin wrote:
> On Thu, Jun 11, 2015 at 04:11:49PM +0200, Patrik Jakobsson wrote:
>> On Thu, Jun 11, 2015 at 02:26:59AM +0300, Dmitry V. Levin wrote:
>> > On Wed, Jun 10, 2015 at 01:52:33PM +0200, Patrik Jakobsson wrote:
>> > &
DRM_IOCTL_DIRTYFB
* drm.c: Decode DRM_IOCTL_CREATE_DUMB
* drm.c: Decode DRM_IOCTL_MAP_DUMB
* drm.c: Decode DRM_IOCTL_DESTROY_DUMB
* drm.c: Decode DRM_IOCTL_GEM_CLOSE
Signed-off-by: Patrik Jakobsson
---
drm.c | 510 ++
1 file changed, 510
Use pkg-config to try to find libdrm. If that fails use the standard
include directory for kernel drm headers in /usr/include/drm.
* configure.ac: Use pkg-config to find libdrm
Signed-off-by: Patrik Jakobsson
---
configure.ac | 4
1 file changed, 4 insertions(+)
diff --git a/configure.ac
101 - 200 of 267 matches
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