[Intel-gfx] [PATCH v3 15/25] drm/i915: Add dynamic page trace events

2015-01-13 Thread Michel Thierry
Traces for page directories and tables allocation/destroy and map/unmap. Signed-off-by: Michel Thierry --- drivers/gpu/drm/i915/i915_gem.c | 2 + drivers/gpu/drm/i915/i915_gem_gtt.c | 17 ++ drivers/gpu/drm/i915/i915_trace.h | 115 3 files

[Intel-gfx] [PATCH v3 02/25] drm/i915: Rename to GEN8_LEGACY_PDPES

2015-01-13 Thread Michel Thierry
l 4 Entry v2: Expanded information about Page Directory/Table nomenclature. Cc: Daniel Vetter CC: Dave Gordon Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2) --- drivers/gpu/drm/i915/i915_gem_gtt.c | 6 +++--- drivers/gpu/drm/i915/i915_gem_gtt.h | 6 +++--- 2 files changed, 6

[Intel-gfx] [PATCH v3 21/25] drm/i915: Extract PPGTT param from page_directory alloc

2015-01-13 Thread Michel Thierry
laced with drm_device, which is an unavoidable wart throughout the series. (in other words, not extra flagrant). Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry --- drivers/gpu/drm/i915/i915_gem_gtt.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/gp

[Intel-gfx] [PATCH v3 22/25] drm/i915/bdw: Split out mappings

2015-01-13 Thread Michel Thierry
init, which should have no functional change. The PDPEs are still a special case for now. We'll need a function for that in the future as well. v2: Handle renamed unmap_and_free_page functions. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2) --- drivers/gpu/drm/i915/i915

[Intel-gfx] [PATCH v3 06/25] drm/i915: page table abstractions

2015-01-13 Thread Michel Thierry
-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2, v3) --- drivers/gpu/drm/i915/i915_gem_gtt.c | 177 ++-- drivers/gpu/drm/i915/i915_gem_gtt.h | 23 - 2 files changed, 107 insertions(+), 93 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b

[Intel-gfx] [PATCH v3 04/25] drm/i915/gen8: Un-hardcode number of page directories

2015-01-13 Thread Michel Thierry
From: Ben Widawsky Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry --- drivers/gpu/drm/i915/i915_gem_gtt.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h index 9d998ec..8f76990 100644

[Intel-gfx] [PATCH v3 16/25] drm/i915/bdw: Use dynamic allocation idioms on free

2015-01-13 Thread Michel Thierry
params v3: Multiple rebases. v4: Updated to use unmap_and_free_pt. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2+) --- drivers/gpu/drm/i915/i915_gem_gtt.c | 54 +++-- drivers/gpu/drm/i915/i915_gem_gtt.h | 46 +++ 2 files c

[Intel-gfx] [PATCH v3 14/25] drm/i915: Finish gen6/7 dynamic page table allocation

2015-01-13 Thread Michel Thierry
into gen6_ppgtt_init. Cc: Daniel Vetter Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v4+) --- drivers/gpu/drm/i915/i915_debugfs.c | 3 +- drivers/gpu/drm/i915/i915_gem.c | 9 +++ drivers/gpu/drm/i915/i915_gem_gtt.c | 143 drivers/gpu/drm

[Intel-gfx] [PATCH v3 18/25] drm/i915/bdw: pagetable allocation rework

2015-01-13 Thread Michel Thierry
From: Ben Widawsky Start using gen8_for_each_pde macro to allocate page tables. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry --- drivers/gpu/drm/i915/i915_gem_gtt.c | 54 - drivers/gpu/drm/i915/i915_gem_gtt.h | 10 +++ 2 files changed, 39

[Intel-gfx] [PATCH v3 08/25] drm/i915: Create page table allocators

2015-01-13 Thread Michel Thierry
Signed-off-by: Michel Thierry (v3, v4) --- drivers/gpu/drm/i915/i915_gem_gtt.c | 224 +++- drivers/gpu/drm/i915/i915_gem_gtt.h | 4 +- drivers/gpu/drm/i915/intel_lrc.c| 16 +-- 3 files changed, 151 insertions(+), 93 deletions(-) diff --git a/drivers

[Intel-gfx] [PATCH v3 25/25] drm/i915/bdw: Support dynamic pdp updates in lrc mode

2015-01-13 Thread Michel Thierry
been allocated. v2: Renamed commit title (Daniel) Cc: Daniel Vetter Signed-off-by: Michel Thierry --- drivers/gpu/drm/i915/intel_lrc.c | 80 +++- 1 file changed, 70 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm

[Intel-gfx] [PATCH v3 10/25] drm/i915: Track GEN6 page table usage

2015-01-13 Thread Michel Thierry
. - Moved allocate/teardown_va_range calls until they are fully implemented (in subsequent patch). - Merged pt and scratch_pt unmap_and_free path. - Moved scratch page allocator helper to the patch that will use it. Cc: Daniel Vetter Signed-off-by: Ben Widawsky Signed-off-by: Michel Th

[Intel-gfx] [PATCH v3 03/25] drm/i915: Setup less PPGTT on failed page_directory

2015-01-13 Thread Michel Thierry
From: Ben Widawsky The current code will both potentially print a WARN, and setup part of the PPGTT structure. Neither of these harm the current code, it is simply for clarity, and to perhaps prevent later bugs, or weird debug messages. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry

[Intel-gfx] [PATCH v3 00/25] PPGTT dynamic page allocations

2015-01-13 Thread Michel Thierry
page drm/i915: num_pd_pages/num_pd_entries isn't useful drm/i915: Extract PPGTT param from page_directory alloc drm/i915/bdw: Split out mappings drm/i915/bdw: begin bitmap tracking drm/i915/bdw: Dynamic page table allocations Michel Thierry (3): drm/i915: Plumb drm_device through

[Intel-gfx] [PATCH v3 13/25] drm/i915: Initialize all contexts

2015-01-13 Thread Michel Thierry
refore, we also must reinitialize. It was tricky to track this down as we don't have much insight into what happens in a context save. This is required for the next patch which enables dynamic page tables. v2: to->ppgtt is only valid in full ppgtt. Signed-off-by: Ben Widawsky Signed-off-by: Miche

Re: [Intel-gfx] [PATCH v2 14/24] drm/i915: Finish gen6/7 dynamic page table allocation

2015-01-13 Thread Michel Thierry
On 1/5/2015 2:45 PM, Daniel Vetter wrote: On Tue, Dec 23, 2014 at 05:16:17PM +, Michel Thierry wrote: From: Ben Widawsky This patch continues on the idea from the previous patch. From here on, in the steady state, PDEs are all pointing to the scratch page table (as recommended in the spec

[Intel-gfx] [PATCH v4 24/24] drm/i915/bdw: Support dynamic pdp updates in lrc mode

2015-01-22 Thread Michel Thierry
been allocated. v2: Renamed commit title (Daniel) Cc: Daniel Vetter Signed-off-by: Michel Thierry --- drivers/gpu/drm/i915/intel_lrc.c | 80 +++- 1 file changed, 70 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm

[Intel-gfx] [PATCH v4 04/24] drm/i915/gen8: Un-hardcode number of page directories

2015-01-22 Thread Michel Thierry
From: Ben Widawsky Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry --- drivers/gpu/drm/i915/i915_gem_gtt.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h index 9d998ec..8f76990 100644

[Intel-gfx] [PATCH v4 10/24] drm/i915: Extract context switch skip and pd load logic

2015-01-22 Thread Michel Thierry
From: Ben Widawsky We have some fanciness coming up. This patch just breaks out the logic of context switch skip, pd load pre, and pd load post. v2: Use new functions to replace the logic right away (Daniel) Cc: Daniel Vetter Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2

[Intel-gfx] [PATCH v4 08/24] drm/i915: Plumb drm_device through page tables operations

2015-01-22 Thread Michel Thierry
The next patch in the series will require it for alloc_pt_single. Signed-off-by: Michel Thierry --- drivers/gpu/drm/i915/i915_gem_gtt.c | 29 - 1 file changed, 16 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915

[Intel-gfx] [PATCH v4 09/24] drm/i915: Track GEN6 page table usage

2015-01-22 Thread Michel Thierry
ame can be achieved while freeing empty vms. (Daniel) Cc: Daniel Vetter Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v3+) --- drivers/gpu/drm/i915/i915_gem_gtt.c | 191 +--- drivers/gpu/drm/i915/i915_gem_gtt.h | 75 ++ 2 files changed, 206

[Intel-gfx] [PATCH v4 20/24] drm/i915: Extract PPGTT param from page_directory alloc

2015-01-22 Thread Michel Thierry
laced with drm_device, which is an unavoidable wart throughout the series. (in other words, not extra flagrant). Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry --- drivers/gpu/drm/i915/i915_gem_gtt.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/gp

[Intel-gfx] [PATCH v4 01/24] drm/i915/trace: Fix offsets for 64b

2015-01-22 Thread Michel Thierry
From: Ben Widawsky Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry --- drivers/gpu/drm/i915/i915_trace.h | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h index 6058a01..f004d3d 100644

[Intel-gfx] [PATCH v4 15/24] drm/i915/bdw: Use dynamic allocation idioms on free

2015-01-22 Thread Michel Thierry
params v3: Multiple rebases. v4: Updated to use unmap_and_free_pt. v5: teardown_va_range logic no longer needed. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2+) --- drivers/gpu/drm/i915/i915_gem_gtt.c | 26 ++-- drivers/gpu/drm/i915/i915_gem_

[Intel-gfx] [PATCH v4 03/24] drm/i915: Setup less PPGTT on failed page_directory

2015-01-22 Thread Michel Thierry
From: Ben Widawsky The current code will both potentially print a WARN, and setup part of the PPGTT structure. Neither of these harm the current code, it is simply for clarity, and to perhaps prevent later bugs, or weird debug messages. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry

[Intel-gfx] [PATCH v4 14/24] drm/i915: Add dynamic page trace events

2015-01-22 Thread Michel Thierry
Traces for page directories and tables allocation and map. v2: Removed references to teardown. Signed-off-by: Michel Thierry --- drivers/gpu/drm/i915/i915_gem.c | 2 + drivers/gpu/drm/i915/i915_gem_gtt.c | 5 ++ drivers/gpu/drm/i915/i915_trace.h | 99

[Intel-gfx] [PATCH v4 16/24] drm/i915/bdw: page directories rework allocation

2015-01-22 Thread Michel Thierry
From: Ben Widawsky Start using gen8_for_each_pdpe macro to allocate the page directories. v2: Rebased after s/free_pt_*/unmap_and_free_pt/ change. v3: Rebased after teardown va range logic was removed. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2+) --- drivers/gpu/drm/i915

[Intel-gfx] [PATCH v4 07/24] drm/i915: Create page table allocators

2015-01-22 Thread Michel Thierry
hecks in gen8 clear/free/unmap. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v3, v4, v5) --- drivers/gpu/drm/i915/i915_gem_gtt.c | 251 drivers/gpu/drm/i915/i915_gem_gtt.h | 4 +- drivers/gpu/drm/i915/intel_lrc.c| 16 +-- 3 files

[Intel-gfx] [PATCH v4 06/24] drm/i915: Complete page table structures

2015-01-22 Thread Michel Thierry
tory[i].daddr/ v3: Rebase. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2, v3) --- drivers/gpu/drm/i915/i915_debugfs.c | 2 +- drivers/gpu/drm/i915/i915_gem_gtt.c | 85 + drivers/gpu/drm/i915/i915_gem_gtt.h | 14 +++--- drivers/gpu/dr

[Intel-gfx] [PATCH v4 00/24] PPGTT dynamic page allocations

2015-01-22 Thread Michel Thierry
/i915: Extract PPGTT param from page_directory alloc drm/i915/bdw: Split out mappings drm/i915/bdw: begin bitmap tracking drm/i915/bdw: Dynamic page table allocations Michel Thierry (3): drm/i915: Plumb drm_device through page tables operations drm/i915: Add dynamic page trace events drm/i91

[Intel-gfx] [PATCH v4 11/24] drm/i915: Track page table reload need

2015-01-22 Thread Michel Thierry
to i915_hw_ppgtt. Fixes when neither ctx->ppgtt and aliasing_ppgtt exist. v5: Removed references to teardown_va_range. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2+) --- drivers/gpu/drm/i915/i915_gem_context.c| 29 - drivers/gpu/drm/i915/i915_ge

[Intel-gfx] [PATCH v4 17/24] drm/i915/bdw: pagetable allocation rework

2015-01-22 Thread Michel Thierry
From: Ben Widawsky Start using gen8_for_each_pde macro to allocate page tables. v2: teardown_va_range references removed. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2) --- drivers/gpu/drm/i915/i915_gem_gtt.c | 46 +++-- 1 file changed, 29

[Intel-gfx] [PATCH v4 05/24] drm/i915: page table abstractions

2015-01-22 Thread Michel Thierry
-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2, v3) --- drivers/gpu/drm/i915/i915_gem_gtt.c | 177 ++-- drivers/gpu/drm/i915/i915_gem_gtt.h | 23 - 2 files changed, 107 insertions(+), 93 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b

[Intel-gfx] [PATCH v4 22/24] drm/i915/bdw: begin bitmap tracking

2015-01-22 Thread Michel Thierry
ff-by: Ben Widawsky Signed-off-by: Michel Thierry (v2+) --- drivers/gpu/drm/i915/i915_gem_gtt.c | 75 - drivers/gpu/drm/i915/i915_gem_gtt.h | 24 2 files changed, 81 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt

[Intel-gfx] [PATCH v4 18/24] drm/i915/bdw: Update pdp switch and point unused PDPs to scratch page

2015-01-22 Thread Michel Thierry
The latter point only matters with full PPGTT. The former point only effect platforms with less than 4GB memory. v2: Updated commit message to point that we must set unused PDPs to the scratch page. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2) --- drivers/gpu/drm

[Intel-gfx] [PATCH v4 02/24] drm/i915: Rename to GEN8_LEGACY_PDPES

2015-01-22 Thread Michel Thierry
l 4 Entry v2: Expanded information about Page Directory/Table nomenclature. Cc: Daniel Vetter CC: Dave Gordon Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2) --- drivers/gpu/drm/i915/i915_gem_gtt.c | 6 +++--- drivers/gpu/drm/i915/i915_gem_gtt.h | 6 +++--- 2 files changed, 6

[Intel-gfx] [PATCH v4 13/24] drm/i915: Finish gen6/7 dynamic page table allocation

2015-01-22 Thread Michel Thierry
into gen6_ppgtt_init. v7: teardown_va_range removed (Daniel). In init, gen6_ppgtt_clear_range call is only needed for aliasing ppgtt. Cc: Daniel Vetter Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v4+) --- drivers/gpu/drm/i915/i915_debugfs.c | 3 +- drivers/gpu/drm/i915/i915_

[Intel-gfx] [PATCH v4 12/24] drm/i915: Initialize all contexts

2015-01-22 Thread Michel Thierry
refore, we also must reinitialize. It was tricky to track this down as we don't have much insight into what happens in a context save. This is required for the next patch which enables dynamic page tables. v2: to->ppgtt is only valid in full ppgtt. Signed-off-by: Ben Widawsky Signed-off-by: Miche

[Intel-gfx] [PATCH v4 21/24] drm/i915/bdw: Split out mappings

2015-01-22 Thread Michel Thierry
init, which should have no functional change. The PDPEs are still a special case for now. We'll need a function for that in the future as well. v2: Handle renamed unmap_and_free_page functions. v3: Updated after teardown_va logic was removed. Signed-off-by: Ben Widawsky Signed-off-by: Mich

[Intel-gfx] [PATCH v4 23/24] drm/i915/bdw: Dynamic page table allocations

2015-01-22 Thread Michel Thierry
was originally added for teardown function and is no longer required. Cc: Daniel Vetter Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2+) --- drivers/gpu/drm/i915/i915_gem_gtt.c | 295 +--- 1 file changed, 242 insertions(+), 53 deletions(-) diff -

[Intel-gfx] [PATCH v4 19/24] drm/i915: num_pd_pages/num_pd_entries isn't useful

2015-01-22 Thread Michel Thierry
Signed-off-by: Michel Thierry (v2+) --- drivers/gpu/drm/i915/i915_debugfs.c | 2 -- drivers/gpu/drm/i915/i915_gem_gtt.c | 72 - drivers/gpu/drm/i915/i915_gem_gtt.h | 7 ++-- 3 files changed, 28 insertions(+), 53 deletions(-) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH 07/12] drm/i915/bdw: Support 64 bit PPGTT in lrc mode

2015-02-20 Thread Michel Thierry
In 64b (48bit canonical) PPGTT addressing, the PDP0 register contains the base address to PML4, while the other PDP registers are ignored. Also, the addressing mode must be specified in every context descriptor. Signed-off-by: Michel Thierry --- drivers/gpu/drm/i915/intel_lrc.c | 167

[Intel-gfx] [PATCH 02/12] drm/i915/bdw: Abstract PDP usage

2015-02-20 Thread Michel Thierry
re will use ppgtt->pml4 for the top level, and the pdp is just one of the entries being pointed to by a pml4e. v2: Updated after dynamic page allocation changes. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2) --- drivers/gpu/drm/i915/i915_gem_gtt.c | 123 -

[Intel-gfx] [PATCH 03/12] drm/i915/bdw: Add dynamic page trace events

2015-02-20 Thread Michel Thierry
From: Ben Widawsky The dynamic page allocation patch series added it for GEN6, this patch adds them for GEN8. v2: Consolidate pagetable/page_directory events v3: Multiple rebases. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v3) --- drivers/gpu/drm/i915/i915_gem_gtt.c | 23

[Intel-gfx] [PATCH 10/12] drm/i915/bdw: Add 4 level support in insert_entries and clear_range

2015-02-20 Thread Michel Thierry
Ben's "Depend exclusively on map and unmap_vma". Signed-off-by: Michel Thierry --- drivers/gpu/drm/i915/i915_gem_gtt.c | 66 ++--- drivers/gpu/drm/i915/i915_gem_gtt.h | 12 +++ 2 files changed, 67 insertions(+), 11 deletions(-) diff --git a/

[Intel-gfx] [PATCH 08/12] drm/i915/bdw: Generalize PTE writing for GEN8 PPGTT

2015-02-20 Thread Michel Thierry
e specific to the page table level and here is no exception. Having extra variables (such as the PPGTT) distracts and provides room to add bugs since the function shouldn't be touching anything in the higher order page tables. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry ---

[Intel-gfx] [PATCH 12/12] drm/i915/bdw: Flip the 48b switch

2015-02-20 Thread Michel Thierry
Use 48b addresses if hw supports it and i915.enable_ppgtt=3. Aliasing PPGTT remains 32b only. Signed-off-by: Michel Thierry --- drivers/gpu/drm/i915/i915_gem_gtt.c | 7 ++- drivers/gpu/drm/i915/i915_params.c | 2 +- 2 files changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers

[Intel-gfx] [PATCH 09/12] drm/i915: Plumb sg_iter through va allocation ->maps

2015-02-20 Thread Michel Thierry
ectly as we write the PTEs allows the iterator to stay coherent through a VMA mapping operation spanning multiple page table levels. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry --- drivers/gpu/drm/i915/i915_gem_gtt.c | 46 +++-- 1 file change

[Intel-gfx] [PATCH 11/12] drm/i915: Expand error state's address width to 64b

2015-02-20 Thread Michel Thierry
From: Ben Widawsky v2: 0 pad the new 8B fields or else intel_error_decode has a hard time. Note, regardless we need an igt update. v3: Make reloc_offset 64b also. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry --- drivers/gpu/drm/i915/i915_drv.h | 4 ++-- drivers/gpu/drm

[Intel-gfx] [PATCH 01/12] drm/i915/bdw: Make pdp allocation more dynamic

2015-02-20 Thread Michel Thierry
ee to be similar to pd/pt (unmap_and_free_pdp), To facilitate testing, 48b mode will be available on Broadwell, when i915.enable_ppgtt = 3. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2) --- drivers/gpu/drm/i915/i915_drv.h | 7 ++- drivers/gpu/drm/i915/i915_gem_gtt.c

[Intel-gfx] [PATCH 00/12] PPGTT with 48b addressing

2015-02-20 Thread Michel Thierry
switching infrastructure drm/i915/bdw: Generalize PTE writing for GEN8 PPGTT drm/i915: Plumb sg_iter through va allocation ->maps drm/i915: Expand error state's address width to 64b Michel Thierry (3): drm/i915/bdw: Support 64 bit PPGTT in lrc mode drm/i915/bdw: Add 4 level support in

[Intel-gfx] [PATCH 05/12] drm/i915/bdw: implement alloc/free for 4lvl

2015-02-20 Thread Michel Thierry
the end. v2: Return something at the end of gen8_alloc_va_range_4lvl to keep the compiler happy. And define ret only in one place. Updated gen8_ppgtt_unmap_pages and gen8_ppgtt_free to handle 4lvl. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2) --- drivers/gpu/drm/i915

[Intel-gfx] [PATCH 04/12] drm/i915/bdw: Add ppgtt info for dynamic pages

2015-02-20 Thread Michel Thierry
From: Ben Widawsky Note that there is no gen8 ppgtt debug_dump function yet. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry --- drivers/gpu/drm/i915/i915_debugfs.c | 19 ++- drivers/gpu/drm/i915/i915_gem_gtt.c | 32 drivers/gpu/drm

[Intel-gfx] [PATCH 06/12] drm/i915/bdw: Add 4 level switching infrastructure

2015-02-20 Thread Michel Thierry
ff-by: Michel Thierry --- drivers/gpu/drm/i915/i915_gem_gtt.c | 56 + drivers/gpu/drm/i915/i915_gem_gtt.h | 4 ++- drivers/gpu/drm/i915/i915_reg.h | 1 + 3 files changed, 55 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/dr

Re: [Intel-gfx] [PATCH v4 05/24] drm/i915: page table abstractions

2015-02-23 Thread Michel Thierry
On 2/18/2015 11:27 AM, Mika Kuoppala wrote: Michel Thierry writes: From: Ben Widawsky When we move to dynamic page allocation, keeping page_directory and pagetabs as separate structures will help to break actions into simpler tasks. To help transition the code nicely there is some wasted

Re: [Intel-gfx] [PATCH v4 09/24] drm/i915: Track GEN6 page table usage

2015-02-23 Thread Michel Thierry
On 2/20/2015 4:41 PM, Mika Kuoppala wrote: Michel Thierry writes: From: Ben Widawsky Instead of implementing the full tracking + dynamic allocation, this patch does a bit less than half of the work, by tracking and warning on unexpected conditions. The tracking itself follows which PTEs

Re: [Intel-gfx] [PATCH v4 07/24] drm/i915: Create page table allocators

2015-02-23 Thread Michel Thierry
On 2/20/2015 4:50 PM, Mika Kuoppala wrote: Michel Thierry writes: From: Ben Widawsky As we move toward dynamic page table allocation, it becomes much easier to manage our data structures if break do things less coarsely by breaking up all of our actions into individual tasks. This makes

[Intel-gfx] [PATCH v5 07/32] drm/i915: Track page table reload need

2015-02-23 Thread Michel Thierry
to i915_hw_ppgtt. Fixes when neither ctx->ppgtt and aliasing_ppgtt exist. v5: Removed references to teardown_va_range. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2+) --- drivers/gpu/drm/i915/i915_gem_context.c| 29 - drivers/gpu/drm/i915/i915_ge

[Intel-gfx] [PATCH v5 06/32] drm/i915: Extract context switch skip and pd load logic

2015-02-23 Thread Michel Thierry
From: Ben Widawsky We have some fanciness coming up. This patch just breaks out the logic of context switch skip, pd load pre, and pd load post. v2: Use new functions to replace the logic right away (Daniel) Cc: Daniel Vetter Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2

[Intel-gfx] [PATCH v5 14/32] drm/i915/bdw: Update pdp switch and point unused PDPs to scratch page

2015-02-23 Thread Michel Thierry
The latter point only matters with full PPGTT. The former point only effect platforms with less than 4GB memory. v2: Updated commit message to point that we must set unused PDPs to the scratch page. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2) --- drivers/gpu/drm

[Intel-gfx] [PATCH v5 12/32] drm/i915/bdw: page directories rework allocation

2015-02-23 Thread Michel Thierry
From: Ben Widawsky Start using gen8_for_each_pdpe macro to allocate the page directories. v2: Rebased after s/free_pt_*/unmap_and_free_pt/ change. v3: Rebased after teardown va range logic was removed. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2+) --- drivers/gpu/drm/i915

[Intel-gfx] [PATCH v5 05/32] drm/i915: Track GEN6 page table usage

2015-02-23 Thread Michel Thierry
ame can be achieved while freeing empty vms. (Daniel) v7: s/i915_dma_map_px_single/i915_dma_map_single s/gen6_write_pdes/gen6_write_pde Prevent a NULL case when only GGTT is available. (Mika) Cc: Daniel Vetter Cc: Mika Kuoppala Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v3+) --- drive

[Intel-gfx] [PATCH v5 00/32] PPGTT dynamic page allocations and 48b addressing

2015-02-23 Thread Michel Thierry
alloc/free for 4lvl drm/i915/bdw: Add 4 level switching infrastructure drm/i915/bdw: Generalize PTE writing for GEN8 PPGTT drm/i915: Plumb sg_iter through va allocation ->maps drm/i915: Expand error state's address width to 64b Michel Thierry (6): drm/i915: Plumb drm_device t

[Intel-gfx] [PATCH v5 13/32] drm/i915/bdw: pagetable allocation rework

2015-02-23 Thread Michel Thierry
From: Ben Widawsky Start using gen8_for_each_pde macro to allocate page tables. v2: teardown_va_range references removed. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2) --- drivers/gpu/drm/i915/i915_gem_gtt.c | 46 +++-- 1 file changed, 29

[Intel-gfx] [PATCH v5 16/32] drm/i915: Extract PPGTT param from page_directory alloc

2015-02-23 Thread Michel Thierry
laced with drm_device, which is an unavoidable wart throughout the series. (in other words, not extra flagrant). Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry --- drivers/gpu/drm/i915/i915_gem_gtt.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/gp

[Intel-gfx] [PATCH v5 27/32] drm/i915/bdw: Support 64 bit PPGTT in lrc mode

2015-02-23 Thread Michel Thierry
In 64b (48bit canonical) PPGTT addressing, the PDP0 register contains the base address to PML4, while the other PDP registers are ignored. Also, the addressing mode must be specified in every context descriptor. Signed-off-by: Michel Thierry --- drivers/gpu/drm/i915/intel_lrc.c | 167

[Intel-gfx] [PATCH v5 15/32] drm/i915: num_pd_pages/num_pd_entries isn't useful

2015-02-23 Thread Michel Thierry
Signed-off-by: Michel Thierry (v2+) --- drivers/gpu/drm/i915/i915_debugfs.c | 2 -- drivers/gpu/drm/i915/i915_gem_gtt.c | 72 - drivers/gpu/drm/i915/i915_gem_gtt.h | 7 ++-- 3 files changed, 28 insertions(+), 53 deletions(-) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH v5 28/32] drm/i915/bdw: Generalize PTE writing for GEN8 PPGTT

2015-02-23 Thread Michel Thierry
e specific to the page table level and here is no exception. Having extra variables (such as the PPGTT) distracts and provides room to add bugs since the function shouldn't be touching anything in the higher order page tables. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry ---

[Intel-gfx] [PATCH v5 09/32] drm/i915: Finish gen6/7 dynamic page table allocation

2015-02-23 Thread Michel Thierry
into gen6_ppgtt_init. v7: teardown_va_range removed (Daniel). In init, gen6_ppgtt_clear_range call is only needed for aliasing ppgtt. Cc: Daniel Vetter Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v4+) --- drivers/gpu/drm/i915/i915_debugfs.c | 3 +- drivers/gpu/drm/i915/i915_

[Intel-gfx] [PATCH v5 20/32] drm/i915/bdw: Support dynamic pdp updates in lrc mode

2015-02-23 Thread Michel Thierry
been allocated. v2: Renamed commit title (Daniel) Cc: Daniel Vetter Signed-off-by: Michel Thierry --- drivers/gpu/drm/i915/intel_lrc.c | 80 +++- 1 file changed, 70 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm

[Intel-gfx] [PATCH v5 21/32] drm/i915/bdw: Make pdp allocation more dynamic

2015-02-23 Thread Michel Thierry
ee to be similar to pd/pt (unmap_and_free_pdp), To facilitate testing, 48b mode will be available on Broadwell, when i915.enable_ppgtt = 3. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2) --- drivers/gpu/drm/i915/i915_drv.h | 7 ++- drivers/gpu/drm/i915/i915_gem_gtt.c

[Intel-gfx] [PATCH v5 17/32] drm/i915/bdw: Split out mappings

2015-02-23 Thread Michel Thierry
init, which should have no functional change. The PDPEs are still a special case for now. We'll need a function for that in the future as well. v2: Handle renamed unmap_and_free_page functions. v3: Updated after teardown_va logic was removed. Signed-off-by: Ben Widawsky Signed-off-by: Mich

[Intel-gfx] [PATCH v5 08/32] drm/i915: Initialize all contexts

2015-02-23 Thread Michel Thierry
refore, we also must reinitialize. It was tricky to track this down as we don't have much insight into what happens in a context save. This is required for the next patch which enables dynamic page tables. v2: to->ppgtt is only valid in full ppgtt. Signed-off-by: Ben Widawsky Signed-off-by: Miche

[Intel-gfx] [PATCH v5 29/32] drm/i915: Plumb sg_iter through va allocation ->maps

2015-02-23 Thread Michel Thierry
From: Ben Widawsky As a step towards implementing 4 levels, while not discarding the existing pte map functions, we need to pass the sg_iter through. The current function understands to the page directory granularity. An object's pages may span the page directory, and so using the iter directly a

[Intel-gfx] [PATCH v5 30/32] drm/i915/bdw: Add 4 level support in insert_entries and clear_range

2015-02-23 Thread Michel Thierry
Ben's "Depend exclusively on map and unmap_vma". Signed-off-by: Michel Thierry --- drivers/gpu/drm/i915/i915_gem_gtt.c | 66 ++--- drivers/gpu/drm/i915/i915_gem_gtt.h | 12 +++ 2 files changed, 67 insertions(+), 11 deletions(-) diff --git a/

[Intel-gfx] [PATCH v5 23/32] drm/i915/bdw: Add dynamic page trace events

2015-02-23 Thread Michel Thierry
From: Ben Widawsky The dynamic page allocation patch series added it for GEN6, this patch adds them for GEN8. v2: Consolidate pagetable/page_directory events v3: Multiple rebases. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v3) --- drivers/gpu/drm/i915/i915_gem_gtt.c | 23

[Intel-gfx] [PATCH v5 03/32] drm/i915: Create page table allocators

2015-02-23 Thread Michel Thierry
hecks in gen8 clear/free/unmap. v6: Use WARN_ON and return -EINVAL in alloc_pt_range (Mika). Cc: Mika Kuoppala Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v3+) --- drivers/gpu/drm/i915/i915_gem_gtt.c | 252 drivers/gpu/drm/i915/i915_ge

[Intel-gfx] [PATCH v5 11/32] drm/i915/bdw: Use dynamic allocation idioms on free

2015-02-23 Thread Michel Thierry
params v3: Multiple rebases. v4: Updated to use unmap_and_free_pt. v5: teardown_va_range logic no longer needed. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2+) --- drivers/gpu/drm/i915/i915_gem_gtt.c | 26 ++-- drivers/gpu/drm/i915/i915_gem_

[Intel-gfx] [PATCH v5 10/32] drm/i915: Add dynamic page trace events

2015-02-23 Thread Michel Thierry
Traces for page directories and tables allocation and map. v2: Removed references to teardown. v3: bitmap_scnprintf has been deprecated. Signed-off-by: Michel Thierry --- drivers/gpu/drm/i915/i915_gem.c | 2 + drivers/gpu/drm/i915/i915_gem_gtt.c | 5 ++ drivers/gpu/drm/i915/i915_trace.h

[Intel-gfx] [PATCH v5 24/32] drm/i915/bdw: Add ppgtt info for dynamic pages

2015-02-23 Thread Michel Thierry
From: Ben Widawsky Note that there is no gen8 ppgtt debug_dump function yet. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry --- drivers/gpu/drm/i915/i915_debugfs.c | 19 ++- drivers/gpu/drm/i915/i915_gem_gtt.c | 32 drivers/gpu/drm

[Intel-gfx] [PATCH v5 04/32] drm/i915: Plumb drm_device through page tables operations

2015-02-23 Thread Michel Thierry
The next patch in the series will require it for alloc_pt_single. Signed-off-by: Michel Thierry --- drivers/gpu/drm/i915/i915_gem_gtt.c | 29 - 1 file changed, 16 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915

[Intel-gfx] [PATCH v5 22/32] drm/i915/bdw: Abstract PDP usage

2015-02-23 Thread Michel Thierry
dawsky Signed-off-by: Michel Thierry (v2) --- drivers/gpu/drm/i915/i915_gem_gtt.c | 123 1 file changed, 70 insertions(+), 53 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index 1cd5f65..92ca430 100644 ---

[Intel-gfx] [PATCH v5 18/32] drm/i915/bdw: begin bitmap tracking

2015-02-23 Thread Michel Thierry
ff-by: Ben Widawsky Signed-off-by: Michel Thierry (v2+) --- drivers/gpu/drm/i915/i915_gem_gtt.c | 75 - drivers/gpu/drm/i915/i915_gem_gtt.h | 24 2 files changed, 81 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt

[Intel-gfx] [PATCH v5 19/32] drm/i915/bdw: Dynamic page table allocations

2015-02-23 Thread Michel Thierry
was originally added for teardown function and is no longer required. v6: Update err_out case in gen8_alloc_va_range (missed from lastest rebase). Cc: Daniel Vetter Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2+) --- drivers/gpu/drm/i915/i915_gem_gtt.c |

[Intel-gfx] [PATCH v5 01/32] drm/i915: page table abstractions

2015-02-23 Thread Michel Thierry
alloc. Cc: Mika Kuoppala Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2+) --- drivers/gpu/drm/i915/i915_gem_gtt.c | 178 ++-- drivers/gpu/drm/i915/i915_gem_gtt.h | 23 - 2 files changed, 109 insertions(+), 92 deletions(-) diff --git a/driver

[Intel-gfx] [PATCH v5 31/32] drm/i915: Expand error state's address width to 64b

2015-02-23 Thread Michel Thierry
From: Ben Widawsky v2: 0 pad the new 8B fields or else intel_error_decode has a hard time. Note, regardless we need an igt update. v3: Make reloc_offset 64b also. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_drv.h | 4 ++-- drivers/gpu/drm/i915/i915_gpu_error.c | 17 ++

[Intel-gfx] [PATCH v5 26/32] drm/i915/bdw: Add 4 level switching infrastructure

2015-02-23 Thread Michel Thierry
ff-by: Michel Thierry --- drivers/gpu/drm/i915/i915_gem_gtt.c | 56 + drivers/gpu/drm/i915/i915_gem_gtt.h | 4 ++- drivers/gpu/drm/i915/i915_reg.h | 1 + 3 files changed, 55 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/dr

[Intel-gfx] [PATCH v5 02/32] drm/i915: Complete page table structures

2015-02-23 Thread Michel Thierry
tory[i].daddr/ v3: Rebase. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2, v3) --- drivers/gpu/drm/i915/i915_debugfs.c | 2 +- drivers/gpu/drm/i915/i915_gem_gtt.c | 85 + drivers/gpu/drm/i915/i915_gem_gtt.h | 14 +++--- drivers/gpu/dr

[Intel-gfx] [PATCH v5 25/32] drm/i915/bdw: implement alloc/free for 4lvl

2015-02-23 Thread Michel Thierry
the end. v2: Return something at the end of gen8_alloc_va_range_4lvl to keep the compiler happy. And define ret only in one place. Updated gen8_ppgtt_unmap_pages and gen8_ppgtt_free to handle 4lvl. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2) --- drivers/gpu/drm/i915

[Intel-gfx] [PATCH v5 32/32] drm/i915/bdw: Flip the 48b switch

2015-02-23 Thread Michel Thierry
Use 48b addresses if hw supports it and i915.enable_ppgtt=3. Aliasing PPGTT remains 32b only. Signed-off-by: Michel Thierry --- drivers/gpu/drm/i915/i915_gem_gtt.c | 7 ++- drivers/gpu/drm/i915/i915_params.c | 2 +- 2 files changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers

[Intel-gfx] [PATCH] drm/i915: page table abstractions

2015-02-24 Thread Michel Thierry
alloc. v5: Do not leak pt on error in gen6_ppgtt_allocate_page_tables. (Mika) Cc: Mika Kuoppala Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2+) --- drivers/gpu/drm/i915/i915_gem_gtt.c | 180 +++- drivers/gpu/drm/i915/i915_gem_gtt.h | 23 +++

[Intel-gfx] [PATCH v6 09/32] drm/i915: Finish gen6/7 dynamic page table allocation

2015-02-24 Thread Michel Thierry
into gen6_ppgtt_init. v7: teardown_va_range removed (Daniel). In init, gen6_ppgtt_clear_range call is only needed for aliasing ppgtt. v8: Rebase after s/page_tables/page_table/. Cc: Daniel Vetter Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v4+) --- drivers/gpu/drm/i915/i915_debugfs.c

[Intel-gfx] [PATCH v6 07/32] drm/i915: Track page table reload need

2015-02-24 Thread Michel Thierry
to i915_hw_ppgtt. Fixes when neither ctx->ppgtt and aliasing_ppgtt exist. v5: Removed references to teardown_va_range. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2+) --- drivers/gpu/drm/i915/i915_gem_context.c| 29 - drivers/gpu/drm/i915/i915_ge

[Intel-gfx] [PATCH v6 05/32] drm/i915: Track GEN6 page table usage

2015-02-24 Thread Michel Thierry
Signed-off-by: Michel Thierry (v3+) --- drivers/gpu/drm/i915/i915_gem_gtt.c | 198 +--- drivers/gpu/drm/i915/i915_gem_gtt.h | 75 ++ 2 files changed, 211 insertions(+), 62 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gp

[Intel-gfx] [PATCH v6 08/32] drm/i915: Initialize all contexts

2015-02-24 Thread Michel Thierry
refore, we also must reinitialize. It was tricky to track this down as we don't have much insight into what happens in a context save. This is required for the next patch which enables dynamic page tables. v2: to->ppgtt is only valid in full ppgtt. Signed-off-by: Ben Widawsky Signed-off-by: Miche

[Intel-gfx] [PATCH v6 24/32] drm/i915/bdw: Add ppgtt info for dynamic pages

2015-02-24 Thread Michel Thierry
From: Ben Widawsky Note that there is no gen8 ppgtt debug_dump function yet. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry --- drivers/gpu/drm/i915/i915_debugfs.c | 19 ++- drivers/gpu/drm/i915/i915_gem_gtt.c | 32 drivers/gpu/drm

[Intel-gfx] [PATCH v6 06/32] drm/i915: Extract context switch skip and pd load logic

2015-02-24 Thread Michel Thierry
From: Ben Widawsky We have some fanciness coming up. This patch just breaks out the logic of context switch skip, pd load pre, and pd load post. v2: Use new functions to replace the logic right away (Daniel) Cc: Daniel Vetter Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2

[Intel-gfx] [PATCH v6 22/32] drm/i915/bdw: Abstract PDP usage

2015-02-24 Thread Michel Thierry
s/page_tables/page_table/. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2+) --- drivers/gpu/drm/i915/i915_gem_gtt.c | 123 1 file changed, 70 insertions(+), 53 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/

[Intel-gfx] [PATCH v6 11/32] drm/i915/bdw: Use dynamic allocation idioms on free

2015-02-24 Thread Michel Thierry
params v3: Multiple rebases. v4: Updated to use unmap_and_free_pt. v5: teardown_va_range logic no longer needed. v6: Rebase after s/page_tables/page_table/. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2+) --- drivers/gpu/drm/i915/i915_gem_gtt.c | 26 ++-- drivers/gp

[Intel-gfx] [PATCH v6 15/32] drm/i915: num_pd_pages/num_pd_entries isn't useful

2015-02-24 Thread Michel Thierry
/page_table/. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2+) --- drivers/gpu/drm/i915/i915_debugfs.c | 2 -- drivers/gpu/drm/i915/i915_gem_gtt.c | 72 - drivers/gpu/drm/i915/i915_gem_gtt.h | 7 ++-- 3 files changed, 28 insertions(+), 53

<    5   6   7   8   9   10   11   12   >