[Intel-gfx] [PATCH] drm/i915: Initialize the mbus_offset to fix Klockwork issue

2021-06-03 Thread Manasi Navare
Static analysis identified an issue in skl_crtc_allocate_ddb where mbus_offset may be used uninitialized. This patch fixes it. Fixes: 835c176cb1c4 ("drm/i915: Introduce MBUS relative dbuf offsets") Cc: Ville Syrjälä Signed-off-by: Manasi Navare --- drivers/gpu/drm/i915/intel_pm.c

[Intel-gfx] [PATCH v2] drm/i915: Initialize the mbus_offset to fix static analysis issue

2021-06-03 Thread Manasi Navare
Static analysis identified an issue in skl_crtc_allocate_ddb where mbus_offset may be used uninitialized. This patch fixes it. Fixes: 835c176cb1c4 ("drm/i915: Introduce MBUS relative dbuf offsets") Cc: Ville Syrjälä Signed-off-by: Manasi Navare --- drivers/gpu/drm/i915/intel_pm.c

[Intel-gfx] [PATCH v2] drm/atomic: Add the crtc to affected crtc only if uapi.enable = true

2021-10-04 Thread Manasi Navare
review comments because the crtc gets stolen only after the atomic_check call. Cc: Ville Syrjälä Cc: Simon Ser Cc: Pekka Paalanen Cc: Daniel Stone Cc: Daniel Vetter Cc: dri-de...@lists.freedesktop.org Signed-off-by: Manasi Navare --- drivers/gpu/drm/drm_atomic.c | 6 -- 1 file changed, 4

[Intel-gfx] [PATCH v3] drm/atomic: Add the crtc to affected crtc only if uapi.enable = true

2021-10-04 Thread Manasi Navare
lle) Cc: Ville Syrjälä Cc: Simon Ser Cc: Pekka Paalanen Cc: Daniel Stone Cc: Daniel Vetter Cc: dri-de...@lists.freedesktop.org Signed-off-by: Manasi Navare --- drivers/gpu/drm/drm_atomic.c | 12 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/

[Intel-gfx] [PATCH] drm/i915/display: Fix shared dpll mismatch for bigjoiner slave

2021-06-23 Thread Manasi Navare
://gitlab.freedesktop.org/drm/intel/-/issues/3465 Cc: Ville Syrjälä Cc: Ankit Nautiyal Signed-off-by: Manasi Navare --- drivers/gpu/drm/i915/display/intel_display.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display

[Intel-gfx] [PATCH] drm/i915/display: Fix shared dpll mismatch for bigjoiner slave

2021-07-14 Thread Manasi Navare
://gitlab.freedesktop.org/drm/intel/-/issues/3465 Cc: Ville Syrjälä Cc: Ankit Nautiyal Tested-By: Swati Sharma Signed-off-by: Manasi Navare --- drivers/gpu/drm/i915/display/intel_display.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915

Re: [Intel-gfx] [PATCH] drm/i915: Fix the static code analysis warning in debugfs

2019-01-09 Thread Manasi Navare
viewed-by: Manasi Navare Manasi > Cc: Rodrigo Vivi > Signed-off-by: Radhakrishna Sripada > --- > drivers/gpu/drm/i915/i915_debugfs.c | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c > b/drivers/gp

Re: [Intel-gfx] [PATCH] drm/i915: Fix the static code analysis warning in debugfs

2019-01-15 Thread Manasi Navare
On Tue, Jan 15, 2019 at 12:52:29PM +0200, Jani Nikula wrote: > On Wed, 09 Jan 2019, Manasi Navare wrote: > > On Wed, Jan 09, 2019 at 01:14:14PM -0800, Radhakrishna Sripada wrote: > >> intel_dp->dsc_dpcd is defined as an array making the if check redundant. > >> >

Re: [Intel-gfx] [PATCH 4/4] drm/i915/psr: Add HBR3 support

2019-01-17 Thread Manasi Navare
HBR3 panels. > The spec refers to training pattern 4 as TPS4, 3 as TPS3 etc so its better to stick with the same abbreviations in this patch commit message and comments as well since the spec uses TP2/TP3 etc for test point 2/3. > Cc: Manasi Navare > Cc: Dhinakaran Pandiyan > Sig

[Intel-gfx] [RFC] drm/i915/dp: Preliminary support for 2 pipe 1 port mode for 5K@120

2019-01-22 Thread Manasi Navare
crtc. This is currently not tested, but I wanted to get some inputs on this approach. The idea is to follow the same approach used in Ganged plane mode for NV12 planes. Suggested-by: Maarten Lankhorst , Matt Roper Cc: Ville Syrjälä Cc: Matt Roper Cc: Maarten Lankhorst Signed-off-by: Manasi

Re: [Intel-gfx] [RFC] drm/i915/dp: Preliminary support for 2 pipe 1 port mode for 5K@120

2019-01-23 Thread Manasi Navare
Hi Ville/Maarten/Matt, Thanks for all your comments, please see my comments/concerns below On Wed, Jan 23, 2019 at 06:58:22PM +0200, Ville Syrjälä wrote: > On Tue, Jan 22, 2019 at 01:12:07PM -0800, Manasi Navare wrote: > > On Gen 11 platform, to enable resolutions like 5K@120 where >

Re: [Intel-gfx] [RFC] drm/i915/dp: Preliminary support for 2 pipe 1 port mode for 5K@120

2019-01-24 Thread Manasi Navare
On Thu, Jan 24, 2019 at 12:23:45PM +0100, Maarten Lankhorst wrote: > Op 23-01-2019 om 18:31 schreef Matt Roper: > > On Tue, Jan 22, 2019 at 01:12:07PM -0800, Manasi Navare wrote: > >> On Gen 11 platform, to enable resolutions like 5K@120 where > >> the pixel clock is g

Re: [Intel-gfx] [PATCH v6 04/28] drm/dp: DRM DP helper/macros to get DP sink DSC parameters

2019-01-30 Thread Manasi Navare
On Wed, Jan 30, 2019 at 12:06:45PM +0100, Daniel Vetter wrote: > On Wed, Dec 19, 2018 at 7:54 PM Daniel Vetter wrote: > > > > On Wed, Oct 24, 2018 at 03:28:16PM -0700, Manasi Navare wrote: > > > This patch adds inline functions and helpers for obtaining > > > D

Re: [Intel-gfx] [PATCH v6 04/28] drm/dp: DRM DP helper/macros to get DP sink DSC parameters

2019-01-30 Thread Manasi Navare
On Wed, Jan 30, 2019 at 01:06:57PM -0500, Sean Paul wrote: > On Wed, Jan 30, 2019 at 12:06:45PM +0100, Daniel Vetter wrote: > > On Wed, Dec 19, 2018 at 7:54 PM Daniel Vetter wrote: > > > > > > On Wed, Oct 24, 2018 at 03:28:16PM -0700, Manasi Navare wrote: > > >

Re: [Intel-gfx] [PATCH] drm/i915: Fix the interpretation of MAX_PRE-EMPHASIS_REACHED bit inorder to pass Link Layer compliance test number 400.3.1.15

2019-05-21 Thread Manasi Navare
l 3 (9.5db). > > Hmm. I guess that's correct. The spec doesn't say anything about > per-vswing pre-emphasis when talking about the 'max reached' bit. > > > > > Cc: Clint Taylor > > Cc: Manasi Navare > > Signed-off-by: Khaled Almahall

Re: [Intel-gfx] [PATCH] drm/i915: Fix the interpretation of MAX_PRE-EMPHASIS_REACHED bit inorder to pass Link Layer compliance test number 400.3.1.15

2019-05-22 Thread Manasi Navare
l 3 (9.5db). > > Hmm. I guess that's correct. The spec doesn't say anything about > per-vswing pre-emphasis when talking about the 'max reached' bit. > > > > > Cc: Clint Taylor > > Cc: Manasi Navare > > Signed-off-by: Khaled Almahall

Re: [Intel-gfx] [PATCH v2 1/4] drm/i915/icl: Assign Master slave crtc links for Transcoder Port Sync

2019-05-22 Thread Manasi Navare
On Fri, May 03, 2019 at 05:09:20PM -0700, Srivatsa, Anusha wrote: > > > >-Original Message- > >From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of > >Manasi Navare > >Sent: Tuesday, April 23, 2019 8:49 AM > >To: intel-gfx

Re: [Intel-gfx] [PATCH v2 2/4] drm/i915/icl: Enable TRANSCODER PORT SYNC for tiled displays across separate ports

2019-05-22 Thread Manasi Navare
On Fri, May 03, 2019 at 05:13:47PM -0700, Srivatsa, Anusha wrote: > > > >-Original Message- > >From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of > >Manasi Navare > >Sent: Tuesday, April 23, 2019 8:49 AM > >To: intel-gfx

Re: [Intel-gfx] [PATCH] drm/i915: Tune down link train error messages due to IO failure

2019-05-24 Thread Manasi Navare
On Fri, May 24, 2019 at 07:49:07PM +0300, Imre Deak wrote: > On Fri, May 24, 2019 at 07:27:54PM +0300, Martin Peres wrote: > > On 23/05/2019 16:08, Imre Deak wrote: > > > An IO failure happens if the sink is unplugged. This scenario shouldn't > > > be logged with error level, since it is not a user

Re: [Intel-gfx] [PATCH] drm/i915: Tune down link train error messages due to IO failure

2019-05-24 Thread Manasi Navare
On Fri, May 24, 2019 at 10:04:10PM +0300, Imre Deak wrote: > On Fri, May 24, 2019 at 11:32:36AM -0700, Manasi Navare wrote: > > On Fri, May 24, 2019 at 07:49:07PM +0300, Imre Deak wrote: > > > On Fri, May 24, 2019 at 07:27:54PM +0300, Martin Peres wrote: > > > >

[Intel-gfx] [PATCH 1/2] drm/edid: Add a EDID edp panel quirk for forcing max lane count

2019-04-02 Thread Manasi Navare
-by: Emanuele Panigati Tested-by: Ralgor Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109959 Signed-off-by: Manasi Navare --- drivers/gpu/drm/drm_edid.c | 10 ++ include/drm/drm_connector.h | 5 + 2 files changed, 15 insertions(+) diff --git a/drivers/gpu/drm/drm_edid.c

[Intel-gfx] [PATCH 2/2] drm/i915/edp: Use max link rate and lane count if eDP EDID quirk

2019-04-02 Thread Manasi Navare
forces the max lane count in compute_config() hook to use max lane count for link training. Cc: Clint Taylor Cc: Ville Syrjälä Tested-by: Albert Astals Cid Tested-by: Emanuele Panigati Tested-by: Ralgor Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109959 Signed-off-by: Manasi Navare

Re: [Intel-gfx] [PATCH 1/2] drm/edid: Add a EDID edp panel quirk for forcing max lane count

2019-04-03 Thread Manasi Navare
On Wed, Apr 03, 2019 at 03:14:51PM +0300, Ville Syrjälä wrote: > On Tue, Apr 02, 2019 at 02:52:34PM -0700, Manasi Navare wrote: > > For certain eDP 1.4 panels, we need to use max lane count for the > > link training to succeed. > > > > This patch adds a EDID quir

Re: [Intel-gfx] [PATCH 1/2] drm/edid: Add a EDID edp panel quirk for forcing max lane count

2019-04-03 Thread Manasi Navare
On Wed, Apr 03, 2019 at 09:55:56PM +0300, Ville Syrjälä wrote: > On Wed, Apr 03, 2019 at 11:37:21AM -0700, Manasi Navare wrote: > > On Wed, Apr 03, 2019 at 03:14:51PM +0300, Ville Syrjälä wrote: > > > On Tue, Apr 02, 2019 at 02:52:34PM -0700, Manasi Navare wrote: > > > &

Re: [Intel-gfx] [PATCH 1/2] drm/edid: Add a EDID edp panel quirk for forcing max lane count

2019-04-03 Thread Manasi Navare
On Wed, Apr 03, 2019 at 10:22:16PM +0300, Ville Syrjälä wrote: > On Wed, Apr 03, 2019 at 12:07:35PM -0700, Manasi Navare wrote: > > On Wed, Apr 03, 2019 at 09:55:56PM +0300, Ville Syrjälä wrote: > > > On Wed, Apr 03, 2019 at 11:37:21AM -0700, Manasi Navare wrote: > > > &

[Intel-gfx] [PATCH] drm/i915/dp: On link train failure on eDP, retry with max params first

2019-04-03 Thread Manasi Navare
most eDP 1.4 panels Suggested-by: Ville Syrjälä Cc: Ville Syrjälä Cc: Albert Astals Cid Cc: Emanuele Panigati Cc: Ralgor Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109959 Signed-off-by: Manasi Navare --- drivers/gpu/drm/i915/intel_dp.c | 36

[Intel-gfx] [PATCH v2] drm/i915/dp: On link train failure on eDP, retry with max params first

2019-04-04 Thread Manasi Navare
most eDP 1.4 panels v2: * Forgot to ammend the previous patch with the fixes. This is a clean fixed patch Suggested-by: Ville Syrjälä Cc: Ville Syrjälä Cc: Albert Astals Cid Cc: Emanuele Panigati Cc: Ralgor Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109959 Signed-off-by: Manasi

Re: [Intel-gfx] [PATCH v2] drm/i915/dp: revert back to max link rate and lane count on eDP

2019-04-05 Thread Manasi Navare
> Sadly, we again face panels that flat out fail with parameters they > claim to support. Revert, and go back to the drawing board. Yup, already multiple users facing this issue with eDP 1.4 panels that require max parameters to pass link train. I hear you now :) Reviewed-by: Manasi Navare >

Re: [Intel-gfx] [PATCH v2] drm/i915/dp: revert back to max link rate and lane count on eDP

2019-04-05 Thread Manasi Navare
On Fri, Apr 05, 2019 at 01:13:11PM -0700, Rodrigo Vivi wrote: > On Fri, Apr 05, 2019 at 11:18:25AM -0700, Manasi Navare wrote: > > On Fri, Apr 05, 2019 at 10:52:20AM +0300, Jani Nikula wrote: > > > Commit 7769db588384 ("drm/i915/dp: optimize eDP 1.4+ link config fast > &

[Intel-gfx] [PATCH] drm/i915/dp: Expose force_dsc_enable through debugfs

2019-04-05 Thread Manasi Navare
: Imre Deak Cc: Lyude Paul Cc: Anusha Srivatsa Signed-off-by: Manasi Navare --- drivers/gpu/drm/i915/i915_debugfs.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index a14a7bccffc1..dbf806908111 100644 --- a

Re: [Intel-gfx] [PATCH] drm/i915/dp: Expose force_dsc_enable through debugfs

2019-04-10 Thread Manasi Navare
Pushed to dinq, thanks for the patch and the review Regards Manasi On Fri, Apr 05, 2019 at 03:48:21PM -0700, Manasi Navare wrote: > Currently we use force_dsc_enable to force DSC from IGT, but > we dont expose this value to userspace through debugfs. > This patch exposes this through

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Do not enable FEC without DSC

2019-04-11 Thread Manasi Navare
FEC link > bandwidth overhead (2.4%) in the non-DSC link bandwidth computations. > So the code may think we have enough bandwidth when we in fact > do not. > > Cc: Anusha Srivatsa > Cc: Manasi Navare There is a typo in the email address: manasi.d.nav...@intel.com > Fixes: 2

[Intel-gfx] [PATCH] drm/i915: Nuke drm_crtc_state and use intel_atomic_state instead

2019-04-11 Thread Manasi Navare
This is one of the patches to start replacing drm pointers and use the intel_atomic_state and intel_crtc to derive the necessary intel state variables required for the intel modeset functions. Suggested-by: Ville Syrjala Cc: Ville Syrjala Signed-off-by: Manasi Navare --- drivers/gpu/drm/i915

Re: [Intel-gfx] [PATCH] drm/i915: Nuke drm_crtc_state and use intel_atomic_state instead

2019-04-12 Thread Manasi Navare
On Fri, Apr 12, 2019 at 09:11:58AM +0300, Ville Syrjälä wrote: > On Thu, Apr 11, 2019 at 04:02:54PM -0700, Manasi Navare wrote: > > This is one of the patches to start replacing drm pointers > > and use the intel_atomic_state and intel_crtc to derive > > the necessary

[Intel-gfx] [PATCH v2] drm/i915: Nuke drm_crtc_state and use intel_atomic_state instead

2019-04-12 Thread Manasi Navare
) * Use old_crtc_state and new_crtc_state (Ville) Suggested-by: Ville Syrjala Cc: Ville Syrjala Signed-off-by: Manasi Navare --- drivers/gpu/drm/i915/intel_display.c | 62 +--- 1 file changed, 29 insertions(+), 33 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c

Re: [Intel-gfx] [PATCH v2] drm/i915: Nuke drm_crtc_state and use intel_atomic_state instead

2019-04-15 Thread Manasi Navare
On Mon, Apr 15, 2019 at 03:17:30PM +0300, Ville Syrjälä wrote: > On Fri, Apr 12, 2019 at 02:22:32PM -0700, Manasi Navare wrote: > > This is one of the patches to start replacing drm pointers > > and use the intel_atomic_state and intel_crtc to derive > > the necessary

[Intel-gfx] [PATCH v3] drm/i915: Nuke drm_crtc_state and use intel_atomic_state instead

2019-04-15 Thread Manasi Navare
remaining instances of drm pointers (Ville) * Use old_crtc_state and new_crtc_state (Ville) Suggested-by: Ville Syrjala Cc: Ville Syrjala Signed-off-by: Manasi Navare Reviewed-by: Ville Syrjala --- drivers/gpu/drm/i915/intel_display.c | 61 +--- 1 file changed, 28 insertions

Re: [Intel-gfx] [PATCH v3] drm/i915: Nuke drm_crtc_state and use intel_atomic_state instead

2019-04-15 Thread Manasi Navare
Pushed to dinq, thanks for the review! Regards Manasi On Mon, Apr 15, 2019 at 11:22:10AM -0700, Manasi Navare wrote: > This is one of the patches to start replacing drm pointers > and use the intel_atomic_state and intel_crtc to derive > the necessary intel state variables required for

[Intel-gfx] [PATCH v2 3/4] drm/i915/dp: Trigger modeset if master_crtc or slaves bitmask changes

2019-04-23 Thread Manasi Navare
. Suggested-by: Ville Syrjälä Cc: Ville Syrjälä Cc: Maarten Lankhorst Cc: Matt Roper Signed-off-by: Manasi Navare --- drivers/gpu/drm/i915/intel_display.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index

[Intel-gfx] [PATCH v2 2/4] drm/i915/icl: Enable TRANSCODER PORT SYNC for tiled displays across separate ports

2019-04-23 Thread Manasi Navare
Nikula Signed-off-by: Manasi Navare --- drivers/gpu/drm/i915/intel_display.c | 58 1 file changed, 58 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 92dea2231499..81e8cb9fe221 100644 --- a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH v2 1/4] drm/i915/icl: Assign Master slave crtc links for Transcoder Port Sync

2019-04-23 Thread Manasi Navare
intel_mode_set_pipe_config(Jani N, Ville) * Use slave_bitmask to save associated slaves in master crtc state (Ville) Cc: Daniel Vetter Cc: Ville Syrjälä Cc: Maarten Lankhorst Cc: Matt Roper Signed-off-by: Manasi Navare --- drivers/gpu/drm/i915/intel_display.c | 89 drivers

[Intel-gfx] [PATCH v2 4/4] drm/i915/dp: Enable master-slaves in trans port sync mode in correct order

2019-04-23 Thread Manasi Navare
transcoder port sync mode is configured and enabled and the Vblanks of both ports are synchronized so then set DP_TP_CTL for the slave and master to Normal and do post crtc enable updates. Cc: Daniel Vetter Cc: Ville Syrjälä Cc: Maarten Lankhorst Cc: Matt Roper Signed-off-by: Manasi Navare

[Intel-gfx] [PATCH v2 0/4] Enable Transcoder Port Sync feature for Tiled displays

2019-04-23 Thread Manasi Navare
configuration, we need to do a mdoeset on slaves first and configure the port sync in slave transcoder. Manasi Navare (4): drm/i915/icl: Assign Master slave crtc links for Transcoder Port Sync drm/i915/icl: Enable TRANSCODER PORT SYNC for tiled displays across separate ports drm/i915/dp: Trigger

[Intel-gfx] [PATCH] drm/i915: intel_dp_check_link_status should only return status of link

2016-07-01 Thread Manasi Navare
Intel_dp_check_link_status() function reads the Link status registers and returns a boolean to indicate link is good or bad. If the link is bad, it is retrained outside the function based on the return value. Signed-off-by: Manasi Navare --- drivers/gpu/drm/i915/intel_dp.c | 41

Re: [Intel-gfx] [PATCH] drm/i915: intel_dp_check_link_status should only return status of link

2016-07-11 Thread Manasi Navare
On Fri, Jul 01, 2016 at 05:35:25PM -0700, Rodrigo Vivi wrote: > On Fri, Jul 1, 2016 at 3:47 PM, Manasi Navare > wrote: > > Intel_dp_check_link_status() function reads the Link status registers > > and returns a boolean to indicate link is good or bad. > > If the link

Re: [Intel-gfx] [PATCH] drm/i915: intel_dp_check_link_status should only return status of link

2016-07-11 Thread Manasi Navare
On Sat, Jul 02, 2016 at 11:29:05AM +0200, Lukas Wunner wrote: > On Fri, Jul 01, 2016 at 03:47:56PM -0700, Manasi Navare wrote: > > Intel_dp_check_link_status() function reads the Link status registers > > and returns a boolean to indicate link is good or bad. > > If t

[Intel-gfx] [PATCH] drm/i915: intel_dp_link_is_valid() should only return status of link

2016-07-11 Thread Manasi Navare
intel_dp_check_link_status() to intel_dp_link_is_valid() (Lukas Wunner) Signed-off-by: Manasi Navare --- drivers/gpu/drm/i915/intel_dp.c | 44 +++-- 1 file changed, 25 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm

Re: [Intel-gfx] [PATCH 07/12] drm/i915: Move DP link retraining into intel_dp_detect()

2016-07-28 Thread Manasi Navare
On Thu, Jul 28, 2016 at 05:50:43PM +0300, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > DP link retraining needs to grab some modeset locks to not race with > modesets, so we can't really do it safely from the hpd_pulse, lest we > risk deadlocking due to MST sideband stuff. > >

Re: [Intel-gfx] [PATCH 07/12] drm/i915: Move DP link retraining into intel_dp_detect()

2016-07-28 Thread Manasi Navare
On Thu, Jul 28, 2016 at 11:15:22PM +0300, Ville Syrjälä wrote: > On Thu, Jul 28, 2016 at 12:48:53PM -0700, Manasi Navare wrote: > > On Thu, Jul 28, 2016 at 05:50:43PM +0300, ville.syrj...@linux.intel.com > > wrote: > > > From: Ville Syrjälä > > > > >

Re: [Intel-gfx] [CI 4/4] drm/i915: Split bxt_ddi_pll_select()

2016-07-29 Thread Manasi Navare
will be used for enabling the port pll when doing > upfront link training. > > v2: > * Refactored code so that bxt_clk_div need not be exported (Durga) > v1: > * Rebased on top of intel_dpll_mgr.c (Durga) > * Initial version from Ander on top of intel_ddi.c > Reviewed-b

Re: [Intel-gfx] [PATCH 07/12] drm/i915: Move DP link retraining into intel_dp_detect()

2016-07-29 Thread Manasi Navare
On Fri, Jul 29, 2016 at 12:52:55PM +0300, Ville Syrjälä wrote: > On Thu, Jul 28, 2016 at 05:36:14PM -0700, Manasi Navare wrote: > > On Thu, Jul 28, 2016 at 11:15:22PM +0300, Ville Syrjälä wrote: > > > On Thu, Jul 28, 2016 at 12:48:53PM -0700, Manasi Navare wrote: > > > &

Re: [Intel-gfx] [PATCH 07/12] drm/i915: Move DP link retraining into intel_dp_detect()

2016-07-29 Thread Manasi Navare
On Thu, Jul 28, 2016 at 05:36:14PM -0700, Manasi Navare wrote: > On Thu, Jul 28, 2016 at 11:15:22PM +0300, Ville Syrjälä wrote: > > On Thu, Jul 28, 2016 at 12:48:53PM -0700, Manasi Navare wrote: > > > On Thu, Jul 28, 2016 at 05:50:43PM +0300, ville.syrj...@linux.inte

[Intel-gfx] [PATCH] drm/dsc: Add kernel documentation for DRM DP DSC helpers

2019-02-04 Thread Manasi Navare
and structures in the documentation. Suggested-by: Daniel Vetter Suggested-by: Sean Paul Cc: Daniel Vetter Cc: Sean Paul Signed-off-by: Manasi Navare --- drivers/gpu/drm/drm_dp_helper.c | 42 +- drivers/gpu/drm/drm_dsc.c | 13 ++- include/drm/drm_dp_helper.h | 15

Re: [Intel-gfx] [PATCH] drm/dsc: Add kernel documentation for DRM DP DSC helpers

2019-02-05 Thread Manasi Navare
On Tue, Feb 05, 2019 at 10:55:12AM +0100, Daniel Vetter wrote: > On Mon, Feb 04, 2019 at 03:40:22PM -0800, Manasi Navare wrote: > > This patch adds appropiate kernel documentation for DRM DP helpers > > used for enabling Display Stream compression functionality in > >

[Intel-gfx] [PATCH v2] drm/dsc: Add kernel documentation for DRM DP DSC helpers

2019-02-05 Thread Manasi Navare
and structures in the documentation. v2: * Add inline comments for longer structs (Daniel Vetter) * Split the summary and description (Daniel Vetter) Suggested-by: Daniel Vetter Suggested-by: Sean Paul Cc: Daniel Vetter Cc: Sean Paul Signed-off-by: Manasi Navare --- drivers/gpu/drm

[Intel-gfx] [PATCH v3] drm/dsc: Add kernel documentation for DRM DP DSC helpers

2019-02-06 Thread Manasi Navare
-by: Manasi Navare Acked-by: Sean Paul Reviewed-by: Daniel Vetter --- drivers/gpu/drm/drm_dp_helper.c | 47 ++- drivers/gpu/drm/drm_dsc.c | 30 +++- include/drm/drm_dp_helper.h | 15 +- include/drm/drm_dsc.h | 233 4 files changed, 259

Re: [Intel-gfx] [PATCH v3] drm/dsc: Add kernel documentation for DRM DP DSC helpers

2019-02-08 Thread Manasi Navare
Pushed to drm-misc thanks for the reviews. Regards Manasi On Wed, Feb 06, 2019 at 01:31:48PM -0800, Manasi Navare wrote: > This patch adds appropriate kernel documentation for DRM DP helpers > used for enabling Display Stream compression functionality in > drm_dp_helper.h and drm_dp_he

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Make macro definitions consistent for ICL and CNL

2019-02-12 Thread Manasi Navare
order as dword, lane, port. So with the above changes, Reviewed-by: Manasi Navare Manasi > --- > drivers/gpu/drm/i915/i915_reg.h | 6 +++--- > drivers/gpu/drm/i915/icl_dsi.c | 8 > drivers/gpu/drm/i915/intel_ddi.c | 16 > 3 files changed, 15 insertions

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Make MG phy macros semantically consistent

2019-02-12 Thread Manasi Navare
e original patch that adds these macros. With that, Reviewed-by: Manasi navare Manasi > --- > drivers/gpu/drm/i915/i915_reg.h | 50 > drivers/gpu/drm/i915/intel_ddi.c | 44 ++-- > 2 files changed, 47 insertions(+), 47 deletions

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Move dsc rate params compute into drm

2019-02-13 Thread Manasi Navare
On Wed, Feb 13, 2019 at 09:45:34AM -0500, David Francis wrote: > The function intel_compute_rc_parameters is part of the dsc spec > and is not driver-specific. Other drm drivers might like to use > it. The function is not changed; just moved and renamed. > Yes this sounds fair since its DSC spec

Re: [Intel-gfx] [PATCH 2/3] drm/dsc: Add native 420 and 422 support to compute_rc_params

2019-02-13 Thread Manasi Navare
eviously called enable422 is renamed to simple_422 to avoid > confusion > > Signed-off-by: David Francis This looks good and verified that the DSC 1.2 spec actually renames it as simple_422. Reviewed-by: Manasi Navare Manasi > --- > drivers/gpu/drm/drm_dsc.c | 31 +

Re: [Intel-gfx] [PATCH 3/3] drm/dsc: Change infoframe_pack to payload_pack

2019-02-13 Thread Manasi Navare
On Wed, Feb 13, 2019 at 09:45:36AM -0500, David Francis wrote: > The function drm_dsc_pps_infoframe_pack only > packed the payload portion of the infoframe. > Change the input struct to the PPS payload > to clarify the function's purpose and allow > for drivers with their own handling of sdp. > (e.

Re: [Intel-gfx] [PATCH v2 3/3] drm/dsc: Split DSC PPS and SDP header initialisations

2019-02-25 Thread Manasi Navare
omponents they operate on, not drm_dsc_pps_infoframe, > > Signed-off-by: David Francis The corresponding changes for the header init and payload init now look good to me. Reviewed-by: Manasi Navare Manasi > --- > drivers/gpu/drm/drm_dsc.c | 117 +++---

[Intel-gfx] [CI v11 08/23] drm/i915/dp: Compute DSC pipe config in atomic check

2018-11-27 Thread Manasi Navare
ala Cc: Anusha Srivatsa Cc: Gaurav K Singh Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa Reviewed-by: Ville Syrjala Acked-by: Jani Nikula --- drivers/gpu/drm/i915/intel_display.c | 2 +- drivers/gpu/drm/i915/intel_display.h | 2 +- drivers/gpu/drm/i915/intel_dp.c |

[Intel-gfx] [CI v11 04/23] drm/dsc: Define Rate Control values that do not change over configurations

2018-11-27 Thread Manasi Navare
Cc: Manasi Navare Cc: Jani Nikula Cc: Ville Syrjala Cc: Gaurav K Singh Cc: Harry Wentland Signed-off-by: Anusha Srivatsa Reviewed-by: Manasi Navare --- include/drm/drm_dsc.h | 6 ++ 1 file changed, 6 insertions(+) diff --git a/include/drm/drm_dsc.h b/include/drm/drm_dsc.h index 32

[Intel-gfx] [CI v11 03/23] drm/dsc: Define VESA Display Stream Compression Capabilities

2018-11-27 Thread Manasi Navare
1.2 parameters (Manasi) * Use DSC_NUM_BUF_RANGES (Manasi) * Call it drm_dsc_config (Manasi) Cc: dri-de...@lists.freedesktop.org Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Cc: Harry Wentland Signed-off-by: Manasi Navare Signed-off-by: Gaurav K Singh Co-developed-by: Gaurav K Singh

[Intel-gfx] [CI v11 16/23] drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes

2018-11-27 Thread Manasi Navare
drm-tip Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/i915/intel_vdsc.c | 21 + 1 file changed, 21 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_vdsc.c b/drivers/gpu/drm/i915

[Intel-gfx] [CI v11 21/23] drm/i915/fec: Set FEC_READY in FEC_CONFIGURATION

2018-11-27 Thread Manasi Navare
Cc: Ville Syrjala Cc: Manasi Navare Signed-off-by: Anusha Srivatsa Reviewed-by: Manasi Navare --- drivers/gpu/drm/i915/intel_ddi.c | 11 +++ 1 file changed, 11 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 6533624226a7

[Intel-gfx] [CI v11 13/23] drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI

2018-11-27 Thread Manasi Navare
error (Ville) * Rename as VDSC_PIPE_A (Imre) * Fix a whitespace (Anusha) * Fix Comments (Imre) Cc: Ville Syrjala Cc: Rodrigo Vivi Cc: Imre Deak Signed-off-by: Manasi Navare Reviewed-by: Ville Syrjala --- drivers/gpu/drm/i915/intel_display.h| 1 + drivers/gpu/drm/i915/intel_runtime_pm.c | 4

[Intel-gfx] [CI v11 19/23] drm/i915/dsc: Enable and disable appropriate power wells for VDSC

2018-11-27 Thread Manasi Navare
: Imre Deak Cc: Rodrigo Vivi Signed-off-by: Manasi Navare Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_ddi.c | 6 ++ drivers/gpu/drm/i915/intel_drv.h | 2 ++ drivers/gpu/drm/i915/intel_vdsc.c | 25 + 3 files changed, 33 insertions(+) diff --git a

[Intel-gfx] [CI v11 11/23] drm/i915/dsc: Compute Rate Control parameters for DSC

2018-11-27 Thread Manasi Navare
eview comments from Ville: * Remove unnecessary comments * Remove unnecessary paranthesis * Add comments for few RC params calculations v2 (From Manasi): * Rebase Gaurav's patch from intel-gfx to gfx-internal * Use struct drm_dsc_cfg instead of struct intel_dp as a parameter Cc: Manasi Navare

[Intel-gfx] [PATCH v7] drm/i915: implement EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT

2018-11-27 Thread Manasi Navare
d debugging prints for early exit conditions v7 (From Manasi): * Memcpy, memcmp and debig logging based on sizeof(dpcd_ext) (Jani N) * Exit early (Jani N) Cc: Jani Nikula Cc: Ville Syrjala Signed-off-by: Matt Atwood Tested-by: Manasi Navare Acked-by: Manasi Navare Reviewed-by: Rodrigo Vivi ---

[Intel-gfx] [CI v12 22/23] i915/dp/fec: Configure the Forward Error Correction bits.

2018-11-27 Thread Manasi Navare
Navare Signed-off-by: Anusha Srivatsa Reviewed-by: Manasi Navare --- drivers/gpu/drm/i915/i915_reg.h | 2 ++ drivers/gpu/drm/i915/intel_ddi.c | 23 +++ 2 files changed, 25 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index

[Intel-gfx] [CI v12 02/23] drm/dsc: Define Display Stream Compression PPS infoframe

2018-11-27 Thread Manasi Navare
Cc: Ville Syrjala Cc: Anusha Srivatsa Cc: Harry Wentland Signed-off-by: Manasi Navare Reviewed-by: Harry Wentland --- include/drm/drm_dsc.h | 342 ++ 1 file changed, 342 insertions(+) create mode 100644 include/drm/drm_dsc.h diff --git a/include/drm

[Intel-gfx] [CI v12 19/23] drm/i915/dsc: Enable and disable appropriate power wells for VDSC

2018-11-27 Thread Manasi Navare
: Imre Deak Cc: Rodrigo Vivi Signed-off-by: Manasi Navare Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_ddi.c | 6 ++ drivers/gpu/drm/i915/intel_drv.h | 2 ++ drivers/gpu/drm/i915/intel_vdsc.c | 26 ++ 3 files changed, 34 insertions(+) diff --git a

[Intel-gfx] [CI v12 01/23] drm/dsc: Modify DRM helper to return complete DSC color depth capabilities

2018-11-27 Thread Manasi Navare
-off-by: Manasi Navare Cc: Ville Syrjala Reviewed-by: Ville Syrjala Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/drm_dp_helper.c | 14 -- include/drm/drm_dp_helper.h | 3 ++- 2 files changed, 10 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/drm_dp_helper.c b

[Intel-gfx] [CI v12 15/23] drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs

2018-11-27 Thread Manasi Navare
Srivatsa Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_hdmi.c | 21 +++-- 2 files changed, 20 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915

[Intel-gfx] [CI v12 11/23] drm/i915/dsc: Compute Rate Control parameters for DSC

2018-11-27 Thread Manasi Navare
eview comments from Ville: * Remove unnecessary comments * Remove unnecessary paranthesis * Add comments for few RC params calculations v2 (From Manasi): * Rebase Gaurav's patch from intel-gfx to gfx-internal * Use struct drm_dsc_cfg instead of struct intel_dp as a parameter Cc: Manasi Navare

[Intel-gfx] [CI v12 06/23] drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants

2018-11-27 Thread Manasi Navare
Cc: Ville Syrjälä Signed-off-by: Gaurav K Singh Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa --- include/drm/drm_dsc.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/drm/drm_dsc.h b/include/drm/drm_dsc.h index 52e57ceaff80..d03f1b83421a 100644 --- a/include/drm

[Intel-gfx] [CI v12 20/23] i915/dp/fec: Add fec_enable to the crtc state.

2018-11-27 Thread Manasi Navare
intel_dp_compute_config(). v9 (From Manasi): * Combine the !edp and !fec_support check * Derive dev_priv from intel_dp directly v10 (From Manasi): * Rebase Suggested-by: Ville Syrjala Cc: dri-de...@lists.freedesktop.org Cc: Ville Syrjala Cc: Jani Nikula Cc: Manasi Navare Signed-off-by: Anusha Srivatsa

[Intel-gfx] [CI v12 23/23] drm/i915/fec: Disable FEC state.

2018-11-27 Thread Manasi Navare
unnecessary checks (Ville) v6: Resolve warnings. Add crtc_state as an argument to intel_disable_ddi_buf(). (Manasi) Cc: dri-de...@lists.freedesktop.org Cc: Gaurav K Singh Cc: Jani Nikula Cc: Ville Syrjala Cc: Manasi Navare Signed-off-by: Anusha Srivatsa Reviewed-by: Manasi Navare --- drivers

[Intel-gfx] [CI v12 16/23] drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes

2018-11-27 Thread Manasi Navare
drm-tip Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/i915/intel_vdsc.c | 21 + 1 file changed, 21 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_vdsc.c b/drivers/gpu/drm/i915

[Intel-gfx] [CI v12 13/23] drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI

2018-11-27 Thread Manasi Navare
error (Ville) * Rename as VDSC_PIPE_A (Imre) * Fix a whitespace (Anusha) * Fix Comments (Imre) Cc: Ville Syrjala Cc: Rodrigo Vivi Cc: Imre Deak Signed-off-by: Manasi Navare Reviewed-by: Ville Syrjala --- drivers/gpu/drm/i915/intel_display.h| 1 + drivers/gpu/drm/i915/intel_runtime_pm.c | 4

[Intel-gfx] [CI v12 08/23] drm/i915/dp: Compute DSC pipe config in atomic check

2018-11-27 Thread Manasi Navare
ala Cc: Anusha Srivatsa Cc: Gaurav K Singh Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa Reviewed-by: Ville Syrjala Acked-by: Jani Nikula --- drivers/gpu/drm/i915/intel_display.c | 2 +- drivers/gpu/drm/i915/intel_display.h | 2 +- drivers/gpu/drm/i915/intel_dp.c |

[Intel-gfx] [CI v12 18/23] drm/i915/dp: Disable DSC in source by disabling DSS CTL bits

2018-11-27 Thread Manasi Navare
params * Add a condition to disable only if dsc state compression is enabled * Use correct DSS CTL regs Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Signed-off-by: Manasi Navare Signed-off-by: Gaurav K Singh Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/i915/i915_drv.h | 1

[Intel-gfx] [CI v12 21/23] drm/i915/fec: Set FEC_READY in FEC_CONFIGURATION

2018-11-27 Thread Manasi Navare
Cc: Ville Syrjala Cc: Manasi Navare Signed-off-by: Anusha Srivatsa Reviewed-by: Manasi Navare --- drivers/gpu/drm/i915/intel_ddi.c | 11 +++ 1 file changed, 11 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 6533624226a7

[Intel-gfx] [CI v12 10/23] drm/i915/dsc: Define & Compute VESA DSC params

2018-11-27 Thread Manasi Navare
rectly from case statements * Using single asssignment for assigning rc_range_params * Using < Cc: Ville Syrjala Cc: Anusha Srivatsa Cc: Gaurav K Singh Signed-off-by: Gaurav K Singh Signed-off-by: Manasi Navare Co-developed-by: Manasi Navare Reviewed-by: Anusha Srivatsa --- drivers/gp

[Intel-gfx] [CI v12 12/23] drm/i915/dp: Enable/Disable DSC in DP Sink

2018-11-27 Thread Manasi Navare
intel_dp as an argument (Manasi) * Use the compression_enable flag as part of crtc_state (Manasi) Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Cc: Gaurav K Singh Signed-off-by: Gaurav K Singh Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/i915

[Intel-gfx] [CI v12 05/23] drm/dsc: Add helpers for DSC picture parameter set infoframes

2018-11-27 Thread Manasi Navare
) Cc: dri-de...@lists.freedesktop.org Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Cc: Harry Wentland Signed-off-by: Manasi Navare Acked-by: Harry Wentland --- Documentation/gpu/drm-kms-helpers.rst | 12 ++ drivers/gpu/drm/Makefile | 2 +- drivers/gpu/drm/drm_dsc.c

[Intel-gfx] [CI v12 07/23] drm/i915/dp: Add DSC params and DSC config to intel_crtc_state

2018-11-27 Thread Manasi Navare
: Manasi Navare Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_drv.h | 9 + 2 files changed, 10 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index f763b30f98d9..183aae996305 100644 --- a

[Intel-gfx] [CI v12 04/23] drm/dsc: Define Rate Control values that do not change over configurations

2018-11-27 Thread Manasi Navare
Cc: Manasi Navare Cc: Jani Nikula Cc: Ville Syrjala Cc: Gaurav K Singh Cc: Harry Wentland Signed-off-by: Anusha Srivatsa Reviewed-by: Manasi Navare --- include/drm/drm_dsc.h | 6 ++ 1 file changed, 6 insertions(+) diff --git a/include/drm/drm_dsc.h b/include/drm/drm_dsc.h index 32

[Intel-gfx] [CI v12 14/23] drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling

2018-11-27 Thread Manasi Navare
la Cc: Ville Syrjala Cc: Anusha Srivatsa Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/i915/i915_drv.h | 2 + drivers/gpu/drm/i915/intel_ddi.c | 2 + drivers/gpu/drm/i915/intel_vdsc.c | 410 ++ 3 files changed, 414 insertions(+)

[Intel-gfx] [CI v12 03/23] drm/dsc: Define VESA Display Stream Compression Capabilities

2018-11-27 Thread Manasi Navare
1.2 parameters (Manasi) * Use DSC_NUM_BUF_RANGES (Manasi) * Call it drm_dsc_config (Manasi) Cc: dri-de...@lists.freedesktop.org Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Cc: Harry Wentland Signed-off-by: Manasi Navare Signed-off-by: Gaurav K Singh Co-developed-by: Gaurav K Singh

[Intel-gfx] [CI v12 09/23] drm/i915/dp: Do not enable PSR2 if DSC is enabled

2018-11-27 Thread Manasi Navare
for DSC and PSR2 enabled together (DK) Cc: Rodrigo Vivi Cc: Jani Nikula Cc: Ville Syrjälä Signed-off-by: Manasi Navare Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/intel_psr.c | 14 ++ 1 file changed, 14 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers

[Intel-gfx] [CI v12 17/23] drm/i915/dp: Configure Display stream splitter registers during DSC enable

2018-11-27 Thread Manasi Navare
cpu_transcoder instead of encoder->type (Ville) v2: * Rebase (Manasi) Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/i915/intel_vdsc.c | 21 + 1 file changed, 21 insertions(+) diff --gi

Re: [Intel-gfx] [CI v12 10/23] drm/i915/dsc: Define & Compute VESA DSC params (fwd)

2018-11-28 Thread Manasi Navare
rg > Cc: Julia Lawall > Subject: Re: [Intel-gfx] [CI v12 10/23] drm/i915/dsc: Define & Compute VESA > DSC > params > > CC: kbuild-...@01.org > In-Reply-To: <20181127214125.17658-10-manasi.d.nav...@intel.com> > References: <20181127214125.17658-10-manasi.d.nav

Re: [Intel-gfx] [PATCH v7] drm/i915: implement EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT

2018-11-28 Thread Manasi Navare
On Wed, Nov 28, 2018 at 11:09:46AM +0200, Jani Nikula wrote: > On Tue, 27 Nov 2018, Manasi Navare wrote: > > From: Matt Atwood > > > > According to DP spec (2.9.3.1 of DP 1.4) if > > EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT is set the addresses in DPCD > > 02

[Intel-gfx] [CI v13 08/17] drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling

2018-11-28 Thread Manasi Navare
la Cc: Ville Syrjala Cc: Anusha Srivatsa Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/i915/i915_drv.h | 2 + drivers/gpu/drm/i915/intel_ddi.c | 2 + drivers/gpu/drm/i915/intel_vdsc.c | 407 ++ 3 files changed, 411 insertions(+)

[Intel-gfx] [CI v13 10/17] drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes

2018-11-28 Thread Manasi Navare
drm-tip Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/i915/intel_vdsc.c | 21 + 1 file changed, 21 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_vdsc.c b/drivers/gpu/drm/i915

[Intel-gfx] [CI v13 03/17] drm/i915/dp: Do not enable PSR2 if DSC is enabled

2018-11-28 Thread Manasi Navare
for DSC and PSR2 enabled together (DK) Cc: Rodrigo Vivi Cc: Jani Nikula Cc: Ville Syrjälä Signed-off-by: Manasi Navare Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/intel_psr.c | 14 ++ 1 file changed, 14 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers

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