...@lists.freedesktop.org
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/drm_atomic_helper.c | 4 ++-
drivers/gpu/drm/drm_damage_helper.c | 49 +++--
include/drm/drm_damage_helper.h | 4 +--
3 files changed, 45 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm
Cc: Simon Ser
Cc: Gwan-gyeong Mun
Cc: Sean Paul
Cc: Fabio Estevam
Cc: Deepak Rawat
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/drm_atomic_helper.c | 4 +-
drivers/gpu/drm/drm_damage_helper.c | 59 -
include/drm
gyeong Mun
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_sprite.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c
b/drivers/gpu/drm/i915/display/intel_sprite.c
index b7e208816074..cb862bb8d
ole plane area damaged if plane visibility or alpha
changed
v5:
- taking in consideration src.y1 in the damage coordinates
- adding to the pipe damaged area planes that were visible but are
invisible in the new state
Cc: Ville Syrjälä
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de So
It programs Plane's calculated x, y, offset to Plane SF register.
It does the calculation of x and y offsets using
skl_calc_main_surface_offset().
v3: Update commit message
Cc: Gwan-gyeong Mun
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
Reviewed-by: Gwan-gyeong Mun
Tested-by:
Enabling it to check if it causes regressions in CI but the feature is
still not ready to be enabled by default.
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i915_params.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_params.h
b
The calculation the offsets of the main surface will be needed by PSR2
selective fetch code so here splitting and exporting it.
No functional changes were done here.
v3: Rebased
Cc: Gwan-gyeong Mun
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
Reviewed-by: Gwan-gyeong Mun
Tested-by
to calculate damaged area
- remove from damaged area the portion not in src clip
Cc: Ville Syrjälä
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 98 +---
1 file changed, 86 insertions(+), 12 deletions(-)
diff --git a/driv
The calculation the offsets of the main surface will be needed by PSR2
selective fetch code so here splitting and exporting it.
No functional changes were done here.
v3: Rebased
Cc: Gwan-gyeong Mun
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
Reviewed-by: Gwan-gyeong Mun
Tested-by
It programs Plane's calculated x, y, offset to Plane SF register.
It does the calculation of x and y offsets using
skl_calc_main_surface_offset().
v3: Update commit message
Cc: Gwan-gyeong Mun
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
Reviewed-by: Gwan-gyeong Mun
Tested-by:
Much more clear to read one function call than four lines doing this
conversion.
Cc: dri-de...@lists.freedesktop.org
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/drm_rect.c | 15 +++
include/drm/drm_rect.h | 2 ++
2 files changed, 17 insertions
Enabling it to check if it causes regressions in CI but the feature is
still not ready to be enabled by default.
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i915_params.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_params.h
b
Commit 70a2b431c364 ("drm/i915/gt: Rename lrc.c to
execlists_submission.c") renamed intel_lrc.c to
intel_execlists_submission.c but forgot to update i915.rst.
Fixes: 70a2b431c364 ("drm/i915/gt: Rename lrc.c to execlists_submission.c")
Cc: Chris Wilson
Signed-off-by: J
Much more clear to read one function call than four lines doing this
conversion.
v7:
- function renamed
- calculating width and height before truncate
- inlined
Cc: Ville Syrjälä
Cc: dri-de...@lists.freedesktop.org
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
include/drm
The calculation the offsets of the main surface will be needed by PSR2
selective fetch code so here splitting and exporting it.
No functional changes were done here.
v3: Rebased
Cc: Gwan-gyeong Mun
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
Reviewed-by: Gwan-gyeong Mun
Tested-by
to calculate damaged area
- remove from damaged area the portion not in src clip
v7:
- intersec every damage clip with src to minimize damaged area
Cc: Ville Syrjälä
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 101 ---
1 f
It programs Plane's calculated x, y, offset to Plane SF register.
It does the calculation of x and y offsets using
skl_calc_main_surface_offset().
v3: Update commit message
Cc: Gwan-gyeong Mun
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
Reviewed-by: Gwan-gyeong Mun
Tested-by:
Enabling it to check if it causes regressions in CI but the feature is
still not ready to be enabled by default.
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i915_params.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_params.h
b
Much more clear to read one function call than four lines doing this
conversion.
v7:
- function renamed
- calculating width and height before truncate
- inlined
Cc: Ville Syrjälä
Cc: dri-de...@lists.freedesktop.org
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
include/drm
The calculation the offsets of the main surface will be needed by PSR2
selective fetch code so here splitting and exporting it.
No functional changes were done here.
v3: Rebased
Cc: Gwan-gyeong Mun
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
Reviewed-by: Gwan-gyeong Mun
Tested-by
art to fetch from
Cc: Ville Syrjälä
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 105 ---
1 file changed, 91 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i
Enabling it to check if it causes regressions in CI but the feature is
still not ready to be enabled by default.
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i915_params.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_params.h
b
It programs Plane's calculated x, y, offset to Plane SF register.
It does the calculation of x and y offsets using
skl_calc_main_surface_offset().
v3: Update commit message
Cc: Gwan-gyeong Mun
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
Reviewed-by: Gwan-gyeong Mun
Tested-by:
Much more clear to read one function call than four lines doing this
conversion.
v7:
- function renamed
- calculating width and height before truncate
- inlined
Cc: Ville Syrjälä
Cc: dri-de...@lists.freedesktop.org
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
include/drm
art to fetch from
v9:
- Only add plane dst or src to damaged_area if visible
- Early skip plane damage calculation if it was not visible in old and
new state
Cc: Ville Syrjälä
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c |
The calculation the offsets of the main surface will be needed by PSR2
selective fetch code so here splitting and exporting it.
No functional changes were done here.
v3: Rebased
Cc: Gwan-gyeong Mun
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
Reviewed-by: Gwan-gyeong Mun
Tested-by
It programs Plane's calculated x, y, offset to Plane SF register.
It does the calculation of x and y offsets using
skl_calc_main_surface_offset().
v3: Update commit message
Cc: Gwan-gyeong Mun
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
Reviewed-by: Gwan-gyeong Mun
Tested-by:
Enabling it to check if it causes regressions in CI but the feature is
still not ready to be enabled by default.
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i915_params.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_params.h
b
...@lists.freedesktop.org
Cc: Gwan-gyeong Mun
Reviewed-by: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
include/drm/drm_rect.h | 13 +
1 file changed, 13 insertions(+)
diff --git a/include/drm/drm_rect.h b/include/drm/drm_rect.h
index e7f4d24cdd00..39f2deee709c 100644
--- a
art to fetch from
v9:
- Only add plane dst or src to damaged_area if visible
- Early skip plane damage calculation if it was not visible in old and
new state
Cc: Ville Syrjälä
Cc: Gwan-gyeong Mun
Reviewed-by: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/disp
The calculation the offsets of the main surface will be needed by PSR2
selective fetch code so here splitting and exporting it.
No functional changes were done here.
v3: Rebased
Cc: Gwan-gyeong Mun
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
Reviewed-by: Gwan-gyeong Mun
Tested-by
It programs Plane's calculated x, y, offset to Plane SF register.
It does the calculation of x and y offsets using
skl_calc_main_surface_offset().
v3: Update commit message
Cc: Gwan-gyeong Mun
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
Reviewed-by: Gwan-gyeong Mun
Tested-by:
port type that HTI is using.
Cc: Anusha Srivatsa
Cc: Matt Roper
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_ddi.c | 3 +--
drivers/gpu/drm/i915/i915_reg.h | 3 +--
2 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915
DG1 is missing those two WA so instead of copy and paste it to the DG1
function, here calling the function that implements it.
While at it also renaming tgl_init_clock_gating to
gen12lp_init_clock_gating as it is also used by DG1, RKL and ADL-S.
Cc: Matt Roper
Signed-off-by: José Roberto de
Looks this FIXME is still valid as we need a way to tell LSPCON to
stop sending infoframes, so reverting it.
This reverts commit 3f409e4cd579b287a6c41d017e62c392f7997193.
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_ddi.c | 1 +
1 file changed
e topology")
Cc: Wayne Lin
Cc: Lyude Paul
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/drm_dp_mst_topology.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/d
The PSR2_CTL io buffer wake and fast wake values do not match
expected in pre production hardware, so here adding a table that
matches with HW to program it with values that HW expect.
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 29
We were only handling X and width granularity, what was causing issues
when sink had a granularity different than 4.
While at it, renaming su_x_granularity to su_w_granularity to better
match reality.
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
.../drm/i915/display
Another WA that is required for PSR2.
BSpec: 54369
Cc: Gwan-gyeong Mun
Cc: Matt Atwood
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 15 +++
drivers/gpu/drm/i915/i915_reg.h | 8
2 files changed, 23 insertions(+)
diff --git
PSR2 is not compatible with DC3CO or VRR in this stepping, so not
enabling PSR2 if VRR will be enabled or not enabling DC3CO if PSR2 is
possible.
BSpec: 54369
Cc: Gwan-gyeong Mun
Cc: Matt Atwood
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 12
but will need to
be aligned with DSC when the PSRS + DSC support lands
BSpec: 50422
BSpec: 50424
Cc: Gwan-gyeong Mun
Cc: Anusha Srivatsa
Signed-off-by: José Roberto de Souza
Signed-off-by: Gwan-gyeong Mun
---
drivers/gpu/drm/i915/display/intel_psr.c | 43 ++--
drivers
constrained modes.
BSpec: 49274
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
.../drm/i915/display/intel_display_types.h| 2 +
drivers/gpu/drm/i915/display/intel_psr.c | 37 +++
drivers/gpu/drm/i915/i915_reg.h | 1 +
3 files changed, 40 insertions
current mask is named like this.
Fixes: f8112cb9574b ("drm/i915/gen11+: Only load DRAM information from pcode")
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_dram.c | 7 +--
2 files changed, 6 insertions(+), 2 deletions(-)
dropping it as whole.
Cc: Yakui Zhao
Cc: Matt Roper
Fixes: f8112cb9574b ("drm/i915/gen11+: Only load DRAM information from pcode")
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i915_reg.h | 2 --
drivers/gpu/drm/i915/intel_dram.c | 12
2 files changed, 14
dropping it as whole.
v2:
- Also remove memory frequency calculation for gen9 LP platforms
Cc: Yakui Zhao
Cc: Matt Roper
Fixes: f8112cb9574b ("drm/i915/gen11+: Only load DRAM information from pcode")
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i915_reg.h | 8 ---
Graphics and media IPs can have different stepping so a new field is
needed in intel_step_info.
The next patch will take care of rename gt_step to graphics_step.
Cc: Radhakrishna Sripada
Cc: Matt Atwood
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i915_drv.h | 5
As now graphics and media can have different steppings this patch is
renaming all _GT_STEP macros to _GRAPHICS_STEP.
Future platforms will properly choose between _MEDIA_STEP and
_GRAPHICS_STEP for each new workaround.
Cc: Matt Atwood
Cc: Radhakrishna Sripada
Signed-off-by: José Roberto de
-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i915_drv.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 12 ++--
drivers/gpu/drm/i915/i915_pci.c | 18 +-
drivers/gpu/drm/i915/intel_device_info.c | 19
This power domain to disable DC states will be used in places outside
of DPLL, so making the name more generic.
Cc: Radhakrishna Sripada
Cc: Imre Deak
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_display_power.c | 6 +++---
drivers/gpu/drm/i915/display
Sripada
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index 7a205fd5023bb..49c2dfbd40554 100644
--- a/drivers/gpu/drm/i915
PSR2 is supported in transcoder A and B on Alderlake-P.
BSpec: 49185
Cc: Mika Kahola
Cc: Jouni Hogander
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display
PSR2 is supported in transcoder A and B on Alderlake-P.
v2:
- explicity checking for transcoder A and B to avoid invalid transcoder
BSpec: 49185
Reviewed-by: Jouni Högander # v1
Cc: Jani Nikula
Cc: Mika Kahola
Cc: Jouni Hogander
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index 8d08e3cf08c1f..ce6850ed72c60 100644
--- a/drivers
For every crtc in state, intel_atomic_check_async() was checking all
the crtc and plane states again.
Cc: Karthik B S
Cc: Vandita Kulkarni
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_display.c | 38 ++--
1 file changed, 20
New workaround added to specification, requiring bit 15 of
GEN8_CHICKEN_DCPR_1 to be programed before power well 1 is enabled.
BSpec: 54369
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_display_power.c | 5 +
drivers/gpu/drm/i915/i915_reg.h
For every crtc in state, intel_atomic_check_async() was checking all
the crtc and plane states again.
v2: comparing pipe ids instead of crtc pointers when iterating over
planes
Cc: Karthik B S
Cc: Vandita Kulkarni
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm
flip check that we had in PSR compute is not executed at
every flip so it was not doing anything useful and is also being
dropped here.
Cc: Karthik B S
Cc: Vandita Kulkarni
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 11 +--
1 file
Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index 9d589d471e335..e1338f5b2967c 100644
--- a/drivers/gpu/drm/i915
New DG1 PCI id.
BSpec: 44463
Cc: Caz Yokoyama
Cc: Matt Roper
Signed-off-by: José Roberto de Souza
---
include/drm/i915_pciids.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index cb45af9f2c44f..c00ac54692d70 100644
BSpec states that the minimum number of frames before selective update
is 2, so making sure this minimum limit is fulfilled.
BSpec: 50422
Reviewed-by: Gwan-gyeong Mun
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
1 file changed
As the SU_REGION_START begins at 0, the SU_REGION_END should be number
of lines - 1.
BSpec: 50424
Reviewed-by: Gwan-gyeong Mun
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
-gyeong Mun
Reviewed-by: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 25
1 file changed, 25 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index
ld be added to pipe_clip and
not saving power.
Cc: Daniel Vetter
Cc: Gwan-gyeong Mun
Reviewed-by: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 37 +---
1 file changed, 13 insertions(+), 24 deletions(-)
diff --git a/dr
ADLP_1_BASED_X_GRANULARITY
- added comment about all ADL-P supported panels being 1 based X
granularity
BSpec: 54369
BSpec: 50054
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 27 +++-
drivers/gpu/drm/i915/i915_reg.h | 4
Specification asks for DC_STATE_DEBUG_MASK_CORES to be set for all
platforms that supports DMC, not only for geminilake and broxton.
While at is also taking the oportunity to simply the code.
BSpec: 7402
BSpec: 49436
Cc: Imre Deak
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
n true when the desidered
condition is meet.
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
.../drm/i915/display/intel_display_debugfs.c | 3 +-
drivers/gpu/drm/i915/display/intel_psr.c | 64 ---
drivers/gpu/drm/i915/i915_reg.h | 5 +-
drive
found in Alderlake-P is
fixed.
Bspec: 55229
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_cursor.c | 4 ++-
drivers/gpu/drm/i915/display/intel_display.c | 12 +++
drivers/gpu/drm/i915/display/intel_psr.c | 33 ++-
drivers
g Mun
Cc: Ville Syrjälä
Cc: Jani Nikula
Cc: Rodrigo Vivi
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_cursor.c| 3 ++-
drivers/gpu/drm/i915/display/intel_fb.c| 8 +++-
.../gpu/drm/i915/display/intel_frontbuffer.c | 18 ++
driver
a biplanar plane that was not initialy part of the
atomic commit.
Signed-off-by: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display
state.
Cc: Ville Syrjälä
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_ddi.c | 2 -
drivers/gpu/drm/i915/display/intel_display.c | 14 +-
.../drm/i915/display/intel_display_types.h| 3 +-
drivers/gpu/drm/i915/display/intel_dp.c
found in Alderlake-P is
fixed.
Bspec: 55229
Tested-by: Gwan-gyeong Mun
Reviewed-by: Gwan-gyeong Mun
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_cursor.c | 4 ++-
drivers/gpu/drm/i915/display/intel_display.c | 12 +++
drivers/gpu/drm/i915
Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_dmc.c | 16 +++-
1 file changed, 3 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c
b/drivers/gpu/drm/i915/display/intel_dmc.c
index b0268552b2863..2dc9d632969db 100644
--- a/drivers/gpu/drm
oder state.
Reviewed-by: Gwan-gyeong Mun
Cc: Ville Syrjälä
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_ddi.c | 2 -
drivers/gpu/drm/i915/display/intel_display.c | 14 +-
.../drm/i915/display/intel_display_types.h| 3 +-
drivers/gp
fetch right now while we work in
the proper solution for frontbuffer rendering and PSR2.
Cc: Gwan-gyeong Mun
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/di
ch to be set to true, what some
of our tests does.
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/di
Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 45 ++--
1 file changed, 26 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index 1cc4130dec7b1..356e0e96abf4e 100644
--- a/drivers/gpu
n true when the desidered
condition is meet.
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
.../drm/i915/display/intel_display_debugfs.c | 3 +-
drivers/gpu/drm/i915/display/intel_psr.c | 64 ---
drivers/gpu/drm/i915/i915_reg.h | 5 +-
drive
all 3 features.
Same applies when allocating a framebuffer for fbdev emulation, after
allocation userspace will draw on it and trigger invaldate/flush calls
with ORIGIN_DIRTYFB.
Cc: Gwan-gyeong Mun
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display
From: Gwan-gyeong Mun
We are still missing the PSR2 selective fetch handling of biplanar
formats but until proper handle is added we can workaround it by
doing full frames fetch when state has biplanar formats.
Signed-off-by: Gwan-gyeong Mun
---
drivers/gpu/drm/i915/display/intel_psr.c | 4 +++
With all the past fixes now this feature is functional and can be
enabled by default in desktop enviroments that uses compositor.
Cc: Gwan-gyeong Mun
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i915_params.h | 2 +-
1 file changed, 1 insertion(+), 1
pipe fetch is required.
v2:
- also handling pipe restrictions
BSpec: 55229
Reviewed-by: Gwan-gyeong Mun # v1
Cc: Ville Syrjälä
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 65 +---
1 file changed, 46 insertions
this
point the fbdev was just allocated, userspace will draw on
it what will trigger frontbuffer invalidates and flushes later on.
Cc: Ville Syrjälä
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_display.c | 3 ---
drivers/gpu/drm/i915/display
the cursor workaround as not it is properly undestand
the issue and is know that it will never cover all the cases.
Cc: Ville Syrjälä
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_cursor.c | 5 +-
drivers/gpu/drm/i915/display/intel_fb
DC5/DC6.
Reverting Wa_14014971508 fixes that, as only a single frame will be
sent and then display can go to DC5/DC6 for those 30 seconds of
idleness.
BSpec: 54369
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 11 +++
1 file
ch to be set to true, what some
of our tests does.
Cc: Gwan-gyeong Mun
Reviewed-by: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr
need to disable PSR and wait a few miliseconds to enable it again.
Cc: Gwan-gyeong Mun
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b
With all the past fixes now this feature is functional and can be
enabled by default in desktop enviroments that uses compositor.
Cc: Gwan-gyeong Mun
Cc: Ville Syrjälä
Reviewed-by: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i915_params.h | 2 +-
1 file
From: Gwan-gyeong Mun
We are still missing the PSR2 selective fetch handling of multi-planar
formats but until proper handle is added we can workaround it by
doing full frames fetch when state has such formats.
Cc: Ville Syrjälä
Signed-off-by: Gwan-gyeong Mun
---
drivers/gpu/drm/i915/display/
Not waiting for vblank counter to increment could potentialy cause
issues as commits after the one that needs a modeset could change
state of entities that are not committed into hardware yet.
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display
_DEEP_SLEEP
Cc: Ville Syrjälä
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
.../drm/i915/display/intel_display_debugfs.c | 3 +-
drivers/gpu/drm/i915/display/intel_psr.c | 63 ---
drivers/gpu/drm/i915/i915_reg.h | 10 +--
drivers/gpu/drm/i915
- dropping the additional wait_for loops, only the _wait_for_atomic()
is necessary
- waiting for states below EDP_PSR2_STATUS_STATE_DEEP_SLEEP
v3:
- dropping intel_wait_for_condition_atomic() function
Cc: Ville Syrjälä
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
.../d
one function the parse of
information about integrated panels(eDP and DSI).
Cc: Ville Syrjälä
Cc: Jani Nikula
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_bios.c | 22 +++---
1 file changed, 15 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu
lvds_dither as it is not used.
Cc: Ville Syrjälä
Cc: Jani Nikula
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_bios.c | 185 +-
drivers/gpu/drm/i915/display/intel_bios.h | 2 +
drivers/gpu/drm/i915/display/intel_dp.c | 5
Continuing the conversion from single integrated VBT data to two.
Cc: Ville Syrjälä
Cc: Jani Nikula
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_bios.c| 53 +---
drivers/gpu/drm/i915/display/intel_bios.h| 1 +
drivers/gpu/drm/i915
Continuing the conversion from single integrated VBT data to two, now
handling eDP data.
Cc: Ville Syrjälä
Cc: Jani Nikula
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/g4x_dp.c | 9 +--
drivers/gpu/drm/i915/display/intel_bios.c | 62
On newer platform this opregion call always fails, also it do not
support multiple panels so dropping it.
Cc: Ville Syrjälä
Cc: Jani Nikula
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_bios.c | 19 +++
1 file changed, 7 insertions(+), 12
All the users was converted now we can drop it.
Cc: Jani Nikula
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_bios.c | 36 ---
drivers/gpu/drm/i915/i915_drv.h | 1 -
2 files changed, 37 deletions(-)
diff --git a
Continuing the conversion from single integrated VBT data to two, now
handling backlight data.
Cc: Ville Syrjälä
Cc: Jani Nikula
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_bios.c | 59 +++
drivers/gpu/drm/i915/display/intel_bios.h | 1
Continuing the conversion from single integrated VBT data to two, now
handling PSR data.
Cc: Ville Syrjälä
Cc: Jani Nikula
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_bios.c | 73 +--
drivers/gpu/drm/i915/display/intel_bios.h | 2 +
drivers
Continuing the conversion from single integrated VBT data to two, now
handling DSI data.
Cc: Ville Syrjälä
Cc: Jani Nikula
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/icl_dsi.c | 12 +-
drivers/gpu/drm/i915/display/intel_bios.c| 163
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