[Intel-gfx] [PATCH 2/3] drm: add async version of hpd_irq_event

In some cases, the callers of this function may not need the return value and delaying the uevent is ok. So add an async version of the function for use in those cases. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/drm_probe_helper.c | 8 include/drm/drm_crtc_helper.h | 2 ++ 2

Re: [Intel-gfx] [PATCH 3/3] drm/i915: use async hpd_irq_event function on resume

On Wed, 21 May 2014 08:52:34 +0200 Daniel Vetter wrote: > On Tue, May 20, 2014 at 03:25:35PM -0700, Jesse Barnes wrote: > > Gets the detect code (which may take awhile) out of the resume path, > > speeding things up a bit. > > > > Signed-off-by: Jesse Barnes > &

Re: [Intel-gfx] [PATCH] drm/i915/vlv: assert and de-assert sideband reset at boot and resume v3

On Wed, 21 May 2014 20:54:03 +0300 Ville Syrjälä wrote: > On Tue, May 20, 2014 at 11:09:03AM -0700, Jesse Barnes wrote: > > This is a bit like the CMN reset de-assert we do in DPIO_CTL, except > > that it resets the whole common lane section of the PHY. This is > > requi

Re: [Intel-gfx] [PATCH] drm/i915/vlv: assert and de-assert sideband reset at boot and resume v3

tly we do the opposite which could also explain why this > CMN well toggle fixes things. I don't think that matters, but we should ask the PHY guys. The lack of symmetry between the gate and ungate bothers me too. -- Jesse Barnes, Intel Open Source Technology Center

[Intel-gfx] [PATCH 2/2] drm/i915: use SNB A step FDI values on A step CPUs

More of an example of where to use the stepping macro than anything else. I think these early steppings never went outside of Intel. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_display.c | 17 +++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a

[Intel-gfx] [PATCH 1/2] drm/i915: add stepping macro

In some cases to enable or disable features & workarounds, we may need to check the GPU stepping. Add a macro to do that based on caching the PCI revision ID reg. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_dma.c | 2 ++ drivers/gpu/drm/i915/i915_drv.h | 2 ++ 2 files change

Re: [Intel-gfx] [PATCH 1/2] drm/i915: add stepping macro

On Wed, 21 May 2014 19:50:53 +0100 Chris Wilson wrote: > On Wed, May 21, 2014 at 11:42:25AM -0700, Jesse Barnes wrote: > > In some cases to enable or disable features & workarounds, we may need > > to check the GPU stepping. Add a macro to do that based on caching the >

Re: [Intel-gfx] [PATCH] drm/i915/vlv: assert and de-assert sideband reset at boot and resume v3

On Thu, 22 May 2014 09:51:22 +0300 Imre Deak wrote: > On Wed, 2014-05-21 at 21:43 +0300, Ville Syrjälä wrote: > > On Wed, May 21, 2014 at 11:11:15AM -0700, Jesse Barnes wrote: > > > And to answer more specifically... > > > > > > On Wed, 21 May 2014 20:54

Re: [Intel-gfx] [PATCH] drm/i915: Hold CRTC lock whilst freezing the planes

On Thu, 22 May 2014 09:44:40 +0100 Chris Wilson wrote: > Daniel keeps on ramping up the warning level of the DRM and our display > core to make it complain whenever the locking rules are not followed. > This caught > > commit 24576d23976746cb52e7700c4cadbf4bc1bc3472 > Au

Re: [Intel-gfx] [PATCH] drm/i915/vlv: assert and de-assert sideband reset at boot and resume v3

rting isn't enough to re-calibrate, since we tried that on the Chromebooks across suspend/resume and it wasn't enough to get things going again after the chip had lost power. Across simple power well transitions it ought to be enough though, and that's easy enough to verify i

[Intel-gfx] [PATCH 3/6] drm/i915/vlv: move CRI refclk enable into __vlv_set_power_well

This needs to be done before we power back on the CMN_BC well so the PHY can calibrate properly. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_display.c | 8 drivers/gpu/drm/i915/intel_pm.c | 11 +++ 2 files changed, 11 insertions(+), 8 deletions(-) diff

[Intel-gfx] [PATCH 6/6] drm/i915/vlv: add pll assertion when disabling DPIO common well

When doing this, all PLLs should be disabled. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_pm.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 948a4aa..452518f 100644 --- a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH 1/6] drm/i915/vlv: assert and de-assert sideband reset at boot and resume v3

ses have been tested and have still been found to have failures on some configurations. v2: extract simpler set_power_well function for use in reset_dpio (Imre) move to reset_dpio (Daniel & Ville) v3: don't reset if DPIO reset is already de-asserted (Imre) Signed-off-by: Jesse Barn

[Intel-gfx] [PATCH 2/6] drm/i915/vlv: drop power well enable in uncore_sanitize

We do this at runtime and later on now. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_uncore.c | 18 -- 1 file changed, 18 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index 27fe2df..bcd6945 100644 --- a

[Intel-gfx] [PATCH 5/6] drm/i915/vlv: move DPIO common reset de-assert into __vlv_set_power_well

We need to do this anytime we power gate the DPIO common well. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_display.c | 13 drivers/gpu/drm/i915/intel_pm.c | 39 +++- 2 files changed, 30 insertions(+), 22 deletions(-) diff --git a

[Intel-gfx] [PATCH 4/6] drm/i915/vlv: re-order power wells so DPIO common comes after TX

There may be a dependency here. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_pm.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index e8f0c85..fb7e23e 100644 --- a/drivers/gpu/drm

Re: [Intel-gfx] [PATCH 46/66] drm/i915: Move hsw_fdi_link_train into intel_crt.c

ch_encoder in the platform independent code paths makes sense. But a nice compromise would be to split out the FDI code as Paulo suggested; that would get it out of intel_display.c and maybe make for less confusion. On top of that, we could export the FDI training st

[Intel-gfx] [PATCH 1/2] drm/i915: use power well count instead of reading hw state when checking status

This saves many ms per call on my BYT by eliminating Punit communication from the hw readout paths. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_pm.c | 8 +++- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915

[Intel-gfx] [PATCH 2/2] drm/i915: rename is_enabled to hw_state

Mainly useful for catching all the callers in the previous patch. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_drv.h | 4 ++-- drivers/gpu/drm/i915/intel_pm.c | 22 +++--- 2 files changed, 13 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/i915

Re: [Intel-gfx] [PATCH 1/2] drm/i915: use power well count instead of reading hw state when checking status

On Wed, 28 May 2014 21:09:27 +0300 Imre Deak wrote: > On Wed, 2014-05-28 at 09:50 -0700, Jesse Barnes wrote: > > This saves many ms per call on my BYT by eliminating Punit communication > > from the hw readout paths. > > > > Signed-off-by: Jesse Barnes > &

[Intel-gfx] [PATCH] drm/i915: make fbdev initialization asynchronous v2

) Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_dma.c| 6 ++ drivers/gpu/drm/i915/intel_drv.h | 9 +++-- drivers/gpu/drm/i915/intel_fbdev.c | 9 +++-- 3 files changed, 16 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915

Re: [Intel-gfx] [PATCH] drm/i915: make fbdev initialization asynchronous v2

On Wed, 28 May 2014 23:40:47 +0200 Daniel Vetter wrote: > On Wed, May 28, 2014 at 02:39:03PM -0700, Jesse Barnes wrote: > > This gets us out of our init code and out to userspace quite a bit > > faster, but does open us up to some bugs given the state of our init > > time

[Intel-gfx] [PATCH] drm/i915/vlv: enable PPGTT

Need testing and possibly disabling on earlier steppings, but looks ok here on my B3. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_drv.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index

Re: [Intel-gfx] [PATCH] drm/i915/vlv: enable PPGTT

On Thu, 29 May 2014 08:30:10 -0700 "Volkin, Bradley D" wrote: > On Wed, May 28, 2014 at 03:02:24PM -0700, Jesse Barnes wrote: > > Need testing and possibly disabling on earlier steppings, but looks ok > > here on my B3. > > > > Signed-off-by: Jesse Barn

[Intel-gfx] [PATCH 4/4] drm/i915: make sure PC8 is enabled on suspend and disabled on resume

From: Kristen Carlson Accardi This matches the runtime suspend paths and allows the system to enter the lowest power mode at freeze time. Signed-off-by: Kristen Carlson Accardi Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_drv.c | 6 ++ 1 file changed, 6 insertions(+) diff

[Intel-gfx] [PATCH 3/4] drm/i915: send proper opregion notifications on suspend/resume

From: Kristen Carlson Accardi This indicates to the firmware that it can power down various other components or bring them back up, depending on the target system state. Signed-off-by: Kristen Carlson Accardi Signed-off-by: Jesse Barnes --- drivers/acpi/sleep.c| 1 + drivers/gpu

[Intel-gfx] [PATCH 1/4] drm/i915: disable power wells on suspend

From: Kristen Carlson Accardi We want to make sure everything is disabled and at its lowest power when freezing. Signed-off-by: Kristen Carlson Accardi Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_drv.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH 2/4] drm/i915: leave rc6 enabled at suspend time

From: Kristen Carlson Accardi This allows the system to enter the lowest power mode during system freeze. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_drv.c | 3 --- drivers/gpu/drm/i915/intel_drv.h | 1 + drivers/gpu/drm/i915/intel_pm.c | 16 +++- 3 files changed

[Intel-gfx] [PATCH] drm/i915: enable PPGTT on VLV

Working for real this time. i915_ppgtt_info has all sorts of good stuff in it and X is running nicely on top. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_drv.h | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu

[Intel-gfx] [PATCH 3/5] ACPI: export target system state for use by drivers

From: Kristen Carlson Accardi Needed in ->freeze routines to figure out the target system state and take appropriate action. v2: split out ACPI patch Signed-off-by: Kristen Carlson Accardi Signed-off-by: Jesse Barnes --- drivers/acpi/sleep.c | 1 + 1 file changed, 1 insertion(+) diff --

[Intel-gfx] [PATCH 4/5] drm/i915: send proper opregion notifications on suspend/resume

This indicates to the firmware that it can power down various other components or bring them back up, depending on the target system state. Signed-off-by: Kristen Carlson Accardi Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_drv.c | 10 ++ 1 file changed, 10 insertions

Re: [Intel-gfx] [PATCH 2/4] drm/i915: leave rc6 enabled at suspend time

On Fri, 30 May 2014 15:54:37 +0300 Imre Deak wrote: > On Thu, 2014-05-29 at 14:11 -0700, Jesse Barnes wrote: > > From: Kristen Carlson Accardi > > > > This allows the system to enter the lowest power mode during system freeze. > > > > Signed-off-by: Jesse Bar

[Intel-gfx] [PATCH 2/2] drm/i915: make userspace mode sets asynchronous

er de-couple driver updates of the hw state from userspace queueing of commands. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_display.c | 4 1 file changed, 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 8c52038..74

[Intel-gfx] [PATCH 1/2] drm/i915: make CRTC enable/disable asynchronous v2

when a full mode set is required. v2: use a single enable/disable queue (Jesse/Chris) fixup locking, test with lockdep (Jesse) move hw state checks to sync_crtcs (Jesse) make userspace initiated mode sets stay synchronous (Chris) Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915

Re: [Intel-gfx] [PATCH 2/4] drm/i915: leave rc6 enabled at suspend time

On Fri, 30 May 2014 16:40:27 +0100 Chris Wilson wrote: > On Fri, May 30, 2014 at 08:32:20AM -0700, Jesse Barnes wrote: > > But I can split that out if there's a reason to. Seems like we do a > > bit too much teardown at suspend these days (like tearing down opregion > >

Re: [Intel-gfx] [PATCH 4/4] drm/i915: make sure PC8 is enabled on suspend and disabled on resume

On Fri, 30 May 2014 16:37:53 +0300 Imre Deak wrote: > On Thu, 2014-05-29 at 14:11 -0700, Jesse Barnes wrote: > > From: Kristen Carlson Accardi > > > > This matches the runtime suspend paths and allows the system to enter > > the lowest power mode at freeze time. >

[Intel-gfx] [PATCH] drm/i915: make sure PC8 is enabled on suspend and disabled on resume v2

From: Kristen Carlson Accardi This matches the runtime suspend paths and allows the system to enter the lowest power mode at freeze time. v2: move disable_pc8 call to thaw_early (Imre) move enable_pc8 to freeze_late (Imre/Jesse) Signed-off-by: Kristen Carlson Accardi Signed-off-by: Jesse

[Intel-gfx] [PATCH] drm/i915: leave rc6 enabled at suspend time v2

From: Kristen Carlson Accardi This allows the system to enter the lowest power mode during system freeze. v2: delete force wake timer at suspend (Imre) Signed-off-by: Kristen Carlson Accardi Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_drv.c | 4 +--- drivers/gpu/drm/i915

[Intel-gfx] [PATCH] drm/i915: make sure PC8 is enabled on suspend and disabled on resume v3

freeze_late (Jesse) Signed-off-by: Kristen Carlson Accardi Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_drv.c | 19 +++ 1 file changed, 19 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index a573f5a..ff291c0 100644 --- a/drivers

[Intel-gfx] [PATCH] drm/i915: make sure PC8 is enabled on suspend and disabled on resume v4

freeze_late (Jesse) v4: move back to suspend_late (Imre was right) Signed-off-by: Kristen Carlson Accardi Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_drv.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index

Re: [Intel-gfx] [PATCH 1/2] drm/i915: make CRTC enable/disable asynchronous v2

On Fri, 30 May 2014 19:47:56 +0100 Chris Wilson wrote: > On Fri, May 30, 2014 at 11:05:21AM -0700, Jesse Barnes wrote: > > diff --git a/drivers/gpu/drm/i915/i915_drv.c > > b/drivers/gpu/drm/i915/i915_drv.c > > index e2bfdda..e7fa84f 100644 > > --- a/drivers/gpu/dr

Re: [Intel-gfx] [PATCH 1/2] drm/i915: make CRTC enable/disable asynchronous v2

On Fri, 30 May 2014 19:56:22 +0100 Chris Wilson wrote: > On Fri, May 30, 2014 at 11:05:21AM -0700, Jesse Barnes wrote: > > +static void intel_queue_crtc_enable(struct drm_crtc *crtc) > > +{ > > + struct drm_device *dev = crtc->dev; > > + struct drm_i915_privat

Re: [Intel-gfx] [PATCH 4/4] drm/i915: make sure PC8 is enabled on suspend and disabled on resume

On Fri, 30 May 2014 23:12:45 +0200 "Rafael J. Wysocki" wrote: > On Friday, May 30, 2014 11:29:15 AM Jesse Barnes wrote: > > On Fri, 30 May 2014 16:37:53 +0300 > > Imre Deak wrote: > > > > > On Thu, 2014-05-29 at 14:11 -0700, Jesse Barnes wrot

[Intel-gfx] [PATCH] drm/i915: make CRTC enable/disable asynchronous v3

ameters (Jesse) Signed-off-by: Jesse Barnes fix order of list add take mutex around sync in cursor_set --- drivers/gpu/drm/i915/i915_drv.c | 3 +- drivers/gpu/drm/i915/i915_drv.h | 12 ++- drivers/gpu/drm/i915/intel_display.c | 177 +++ drivers/gpu/d

Re: [Intel-gfx] [PATCH] drm/i915: make CRTC enable/disable asynchronous v3

On Fri, 30 May 2014 23:02:18 +0100 Chris Wilson wrote: > On Fri, May 30, 2014 at 02:28:52PM -0700, Jesse Barnes wrote: > > @@ -10326,7 +10466,7 @@ static int __intel_set_mode(struct drm_crtc *crtc, > > > > for_each_intel_crtc_masked(dev, prepare_pipes, intel_crtc)

[Intel-gfx] [PATCH] drm/i915: leave rc6 enabled at suspend time v3

This allows the system to enter the lowest power mode during system freeze. v2: delete force wake timer at suspend (Imre) v3: add GT work suspend function (Imre) Signed-off-by: Kristen Carlson Accardi Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_drv.c | 4 ++-- drivers/gpu/drm

[Intel-gfx] [PATCH] drm/i915: leave rc6 enabled at suspend time v4

This allows the system to enter the lowest power mode during system freeze. v2: delete force wake timer at suspend (Imre) v3: add GT work suspend function (Imre) v4: use uncore forcewake reset (Daniel) Signed-off-by: Kristen Carlson Accardi Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915

[Intel-gfx] [PATCH] resume timings

--- drivers/gpu/drm/i915/i915_drv.c | 6 ++ drivers/gpu/drm/i915/intel_display.c | 9 + 2 files changed, 15 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 0f9e836..a2036b2 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drive

Re: [Intel-gfx] [PATCH] drm/i915: leave rc6 enabled at suspend time v4

On Thu, 5 Jun 2014 11:21:02 +0200 Daniel Vetter wrote: > On Wed, Jun 04, 2014 at 01:45:22PM -0700, Jesse Barnes wrote: > > This allows the system to enter the lowest power mode during system freeze. > > > > v2: delete force wake timer at suspend (Imre) > > v3: add GT

Re: [Intel-gfx] [PATCH] drm/i915: Update bits to check in device class from VBT to detect eDP

On Thu, 5 Jun 2014 16:09:29 +0300 Ville Syrjälä wrote: > On Thu, Jun 05, 2014 at 06:25:13PM +0530, Shobhit Kumar wrote: > > The DEVICE_TYPE_eDP has been changed to 0x1806 in case of BYT which > > can causes wrong detection failures for eDP. Reduce the number of bits > > of interest in DEVICE_TYPE

[Intel-gfx] New async patch for resume

In digging into the async crtc stuff, I found it was going to be really difficult to prevent other functions from getting clobbered by a delayed crtc enable or disable. Daniel's work to remove a bunch of the ->mode_set callbacks is a good start, but we still end up doing some reg reads and writes

Re: [Intel-gfx] [RFC PATCH 2/2] drm/i915: respect the VBT minimum backlight brightness

ack on (PWM first, delay, then backlight on). IIRC the issue on BYT was that we saw the panel power line go down when we disabled the backlight and PWM which would obviously cause all sorts of problems. But that could have been user error on the scope, so we shoul

Re: [Intel-gfx] [PATCH] drm/i915: cache hw power well enabled state

HW state to get rid of this delay. > > This fixes at least one reported regression where boot time increased by > ~4 seconds due to frequent power well state queries on VLV during eDP > EDID read. > > Reported-by: Jesse Barnes > Signed-off-by: Imre Deak > --- > dr

[Intel-gfx] [PATCH 5/5] drm/i915: enable fastboot by default

Let them eat mincemeat pie. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_params.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c index d05a2af..081ab2f 100644 --- a/drivers/gpu/drm

[Intel-gfx] [PATCH 1/5] drm/i915: preserve SSC if previously set v2

) Reported-by: Kristian Høgsberg Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/intel_display.c | 11 ++- 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h

[Intel-gfx] [PATCH 4/5] drm/i915: use current mode if the size matches the preferred mode

From: Kristian Høgsberg The BIOS may set a native mode that doesn't quite match the preferred mode timings. It should be ok to use however if it uses the same size, so try to avoid a mode set in that case. Signed-off-by: Kristian Høgsberg Signed-off-by: Jesse Barnes --- drivers/gpu/drm

[Intel-gfx] [PATCH 3/5] drm: add drm_mode_same_size function

From: Kristian Høgsberg Like mode_equal but w/o the clock checks. Useful for checking if modes are close enough to re-use to avoid a boot time mode set for example. Signed-off-by: Kristian Høgsberg Signed-off-by: Jesse Barnes --- drivers/gpu/drm/drm_modes.c | 8 include/drm

[Intel-gfx] [PATCH 2/5] drm/i915: preserve swizzle settings if necessary v3

framebuffer (Daniel) check display swizzle setting in detect_bit_6_swizzle (Daniel) use gen6 as cutoff point (Daniel) Reported-by: Kristian Høgsberg Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_drv.h| 1 + drivers/gpu/drm/i915/i915_gem.c| 3 +++ drivers/gpu/drm/i9

[Intel-gfx] [PATCH] drm/i915/vlv: drop punit freq staus read after setting idle

This may take awhile (~10ms), and we don't need to make noise about it. References: https://bugs.freedesktop.org/show_bug.cgi?id=75244 Tested-by: huax...@intel.com Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_pm.c | 4 1 file changed, 4 deletions(-) diff --git a/driver

Re: [Intel-gfx] [PATCH] drm/i915/vlv: drop punit freq staus read after setting idle

On Fri, 6 Jun 2014 11:29:24 +0300 Ville Syrjälä wrote: > On Thu, Jun 05, 2014 at 01:49:34PM -0700, Jesse Barnes wrote: > > This may take awhile (~10ms), and we don't need to make noise about it. > > > > References: https://bugs.freedesktop.org/show_bug.cgi?id

Re: [Intel-gfx] New async patch for resume

On Fri, 6 Jun 2014 18:36:46 +0200 Daniel Vetter wrote: > On Thu, Jun 05, 2014 at 08:48:37AM -0700, Jesse Barnes wrote: > > In digging into the async crtc stuff, I found it was going to be really > > difficult to prevent other functions from getting clobbered by a delayed >

Re: [Intel-gfx] [PATCH v2 09/15] drm/i915: Ignore VBT int_crt_support on 830M

has changed over time, I'm trying to get the info from ancient times. -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH 2/5] drm/i915: preserve swizzle settings if necessary v3

On Tue, 10 Jun 2014 16:02:51 +0200 Daniel Vetter wrote: > On Thu, Jun 05, 2014 at 11:24:28AM -0700, Jesse Barnes wrote: > > Some machines (like MBAs) might use a tiled framebuffer but not enable > > display swizzling at boot time. We want to preserve that configuration >

Re: [Intel-gfx] [PATCH 4/5] drm/i915: use current mode if the size matches the preferred mode

On Tue, 10 Jun 2014 16:05:36 +0200 Daniel Vetter wrote: > On Thu, Jun 05, 2014 at 11:24:30AM -0700, Jesse Barnes wrote: > > From: Kristian Høgsberg > > > > The BIOS may set a native mode that doesn't quite match the preferred > > mode timings. It should be

Re: [Intel-gfx] [PATCH 5/5] drm/i915: enable fastboot by default

On Tue, 10 Jun 2014 16:07:44 +0200 Daniel Vetter wrote: > On Thu, Jun 05, 2014 at 11:24:31AM -0700, Jesse Barnes wrote: > > Let them eat mincemeat pie. > > > > Signed-off-by: Jesse Barnes > > --- > > drivers/gpu/drm/i915/i915_params.c | 4 ++-- > > 1 fil

Re: [Intel-gfx] [PATCH 5/5] drm/i915: enable fastboot by default

On Tue, 10 Jun 2014 11:01:06 -0700 Stéphane Marchesin wrote: > On Tue, Jun 10, 2014 at 10:31 AM, Jesse Barnes > wrote: > > On Tue, 10 Jun 2014 16:07:44 +0200 > > Daniel Vetter wrote: > > > >> On Thu, Jun 05, 2014 at 11:24:31AM -0700, Jesse Barnes wrote:

Re: [Intel-gfx] [PATCH 2/5] drm/i915: preserve swizzle settings if necessary v3

On Tue, 10 Jun 2014 21:33:27 +0200 Daniel Vetter wrote: > On Tue, Jun 10, 2014 at 7:27 PM, Jesse Barnes > wrote: > > Yes, that's what I do below... I even added it to the changelog: > > http://patchwork.freedesktop.org/patch/27223/ > > > > Did you mis

Re: [Intel-gfx] [PATCH 2/5] drm/i915: preserve swizzle settings if necessary v3

On Wed, 11 Jun 2014 11:23:26 +0200 Daniel Vetter wrote: > On Tue, Jun 10, 2014 at 12:45:38PM -0700, Jesse Barnes wrote: > > On Tue, 10 Jun 2014 21:33:27 +0200 > > Daniel Vetter wrote: > > > > > On Tue, Jun 10, 2014 at 7:27 PM, Jesse Barnes > > > wrote: &

Re: [Intel-gfx] [PATCH 2/5] drm/i915: preserve swizzle settings if necessary v3

On Wed, 11 Jun 2014 17:39:29 +0200 Daniel Vetter wrote: > On Wed, Jun 11, 2014 at 5:13 PM, Jesse Barnes > wrote: > >> - If you have a machine which uses tiled framebuffers and enables > >> swizzling in the BIOS your code will a) drop the swizzle setup in > >>

Re: [Intel-gfx] drm/i915/bdw: Enable resource streamer on Broadwell

, 18 insertions(+), 2 deletions(-) These seem trivial enough... have you seen cases where you'd like to enable it in Mesa? If so, it probably makes sense to merge this patch so you can do your tuning and enabling on the Mesa side... -- Jesse Barnes, Intel Open Source Technology Cent

Re: [Intel-gfx] [PATCH] drm/i915: leave rc6 enabled at suspend time v4

ork suspend function (Imre) > > > > > v4: use uncore forcewake reset (Daniel) > > > > > > > > > > Signed-off-by: Kristen Carlson Accardi > > > > > Signed-off-by: Jesse Barnes > > > > > --- > > > > > d

Re: [Intel-gfx] [PATCH] drm/i915: leave rc6 enabled at suspend time v4

On Wed, 11 Jun 2014 15:21:16 -0700 Jesse Barnes wrote: > On Tue, 10 Jun 2014 17:26:45 +0200 > Daniel Vetter wrote: > > > On Tue, Jun 10, 2014 at 05:41:49PM +0300, Imre Deak wrote: > > > On Tue, 2014-06-10 at 15:57 +0200, Daniel Vetter wrote: > > > > On T

[Intel-gfx] [PATCH 2/5] drm/i915: leave rc6 enabled at suspend time v4

This allows the system to enter the lowest power mode during system freeze. v2: delete force wake timer at suspend (Imre) v3: add GT work suspend function (Imre) v4: use uncore forcewake reset (Daniel) Reviewed-by: Imre Deak Signed-off-by: Kristen Carlson Accardi Signed-off-by: Jesse Barnes

[Intel-gfx] [PATCH 1/5] drm/i915: disable power wells on suspend

From: Kristen Carlson Accardi We want to make sure everything is disabled and at its lowest power when freezing. Reviewed-by: Imre Deak Signed-off-by: Kristen Carlson Accardi Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_drv.c | 2 ++ 1 file changed, 2 insertions(+) diff --git

[Intel-gfx] [PATCH 5/5] drm/i915: make sure PC8 is enabled on suspend and disabled on resume v4

freeze_late (Jesse) v4: move back to suspend_late (Imre was right) Reviewed-by: Imre Deak Signed-off-by: Kristen Carlson Accardi Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_drv.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm

[Intel-gfx] [PATCH 3/5] ACPI: export target system state for use by drivers

From: Kristen Carlson Accardi Needed in ->freeze routines to figure out the target system state and take appropriate action. v2: split out ACPI patch Reviewed-by: Imre Deak Signed-off-by: Kristen Carlson Accardi Signed-off-by: Jesse Barnes --- drivers/acpi/sleep.c | 1 + 1 file changed

[Intel-gfx] [PATCH 4/5] drm/i915: send proper opregion notifications on suspend/resume

This indicates to the firmware that it can power down various other components or bring them back up, depending on the target system state. Reviewed-by: Imre Deak Signed-off-by: Kristen Carlson Accardi Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_drv.c | 10 ++ 1 file

Re: [Intel-gfx] [PATCH] drm/i915: Unifiy GT powersave suspend logic

h_delayed_work while (since we want to make sure rps is set up) > while Imre's used a cancel+manuel refcount adjustment. > > Unify them again by simply reusing intel_suspend_gt_powersave in > intel_disable_gt_powersave. > > Cc: Imre Deak > Cc: Jesse Barnes > Sig

[Intel-gfx] [PATCH 2/6] drm/i915: get_plane_config for i9xx v10

: split out init ordering changes (Daniel) don't fetch config if !CONFIG_FB v8: use proper height in get_plane_config (Chris) v9: fix CONFIG_FB check for modular configs (Jani) v10: add comment about stolen allocation stomping Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_

[Intel-gfx] [PATCH 6/6] drm/i915: Wrap the preallocated BIOS framebuffer and preserve for KMS fbcon v10

x up size calculation for proposed fbs (Chris) go back to two pass pipe fb assignment (Chris) add warning for active pipes w/o fbs (Chris) clean up num_pipes checks in fbdev_init and fbdev_restore_mode (Chris) move i915.fastboot into fbdev_init (Chris) Signed-off-by: Jesse Barnes --- driver

[Intel-gfx] [PATCH 4/6] drm/i915: alloc intel_fb in the intel_fbdev struct

Allocate this struct instead, so we can re-use another allocated elsewhere if needed. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_display.c |4 ++-- drivers/gpu/drm/i915/intel_drv.h |2 +- drivers/gpu/drm/i915/intel_fbdev.c | 27 +++ 3

[Intel-gfx] [PATCH 5/6] drm/i915: allow re-use BIOS connector config for initial fbdev config

. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_fbdev.c | 91 1 file changed, 91 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_fbdev.c b/drivers/gpu/drm/i915/intel_fbdev.c index fb07ba6..8ce3405 100644 --- a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH 1/6] drm/i915: split aligned height calculation out v2

For use by get_plane_config. v2: cleanup tile_height bits (Chris) Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_display.c | 15 +++ 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915

[Intel-gfx] [PATCH 3/6] drm/i915: get_plane_config support for ILK+

This should allow BIOS fb inheritance to work on ILK+ machines too. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_display.c | 92 ++ 1 file changed, 92 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915

[Intel-gfx] [PATCH 2/2] drm/i915: add a display info file to debugfs v2

Can be expanded up on to include all sorts of things (HDMI infoframe data, more DP status, etc). Should be useful for bug reports to get a baseline on the display config and info. v2: use seq_putc (Rodrigo) describe mode field names (Rodrigo) Reviewed-by: Rodrigo Vivi Signed-off-by: Jesse

[Intel-gfx] [PATCH 1/2] drm: expose subpixel order name routine v2

Just like we have for connector type etc. v2: drop static array (Chris) Signed-off-by: Jesse Barnes --- drivers/gpu/drm/drm_crtc.c | 16 include/drm/drm_crtc.h |1 + 2 files changed, 17 insertions(+) diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Use normal fb deref for the fbcon framebuffer

ebuffers and kref about underflows. > > v2: Kill intel_framebuffer_fini - no longer needed now that we > refcount all fbs properly and only confusing. > > Cc: Jesse Barnes > Signed-off-by: Daniel Vetter > --- > drivers/gpu/drm/i915/intel_display.c | 11 +++ >

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Fix error path leak in fbdev fb allocation

locking is too much a mess. With ppgtt we even need > it to take a look at the global gtt offset of pinned objects, since > the vma list might chance from underneath us. At least with the > current global gtt lookup functions. Reported by Mika. > > Cc: Mika Kuoppala > Cc: Jesse Barne

[Intel-gfx] [PATCH] drm: expose subpixel order name routine v3

Just like we have for connector type etc. v2: drop static array (Chris) v3: add kdoc (Daniel) Signed-off-by: Jesse Barnes --- drivers/gpu/drm/drm_crtc.c | 23 +++ include/drm/drm_crtc.h |1 + 2 files changed, 24 insertions(+) diff --git a/drivers/gpu/drm

[Intel-gfx] [PATCH 2/6] drm/i915: Pass explicit mode into mode_from_pipe_config v3

From: Daniel Vetter We want to reuse this in the fbdev initial config code independently from any fastboot hacks. So allow a bit more flexibility. v2: Forgot to git add ... v3: make non-static (Jesse) Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_display.c | 31 ++-

[Intel-gfx] [PATCH 3/6] drm/i915: allow re-use BIOS connector config for initial fbdev config v2

ild out fbdev structs v2: use BIOS connector config unconditionally if possible (Daniel) check for crtc cloning and reject (Daniel) fix up comments (Daniel) Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_display.c | 10 ++-- drivers/gpu/drm/i915/intel_fbdev.c |

[Intel-gfx] [PATCH 6/6] drm/i915: Wrap the preallocated BIOS framebuffer and preserve for KMS fbcon v11

nditional (Daniel) Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_drv.h |1 + drivers/gpu/drm/i915/intel_fbdev.c | 154 +--- 2 files changed, 146 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu

[Intel-gfx] [PATCH 1/6] drm/i915: read out hw state earlier v2

We want to do this early on before we try to fetch the plane config, which depends on some of the pipe config state. v2: split back out from get_plane_config change (Daniel) update for recent locking & reset changes (Jesse) Signed-off-by: Jesse Barnes --- drivers/gpu/drm/

[Intel-gfx] [PATCH 5/6] drm/i915: get_plane_config support for ILK+

This should allow BIOS fb inheritance to work on ILK+ machines too. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_display.c | 92 ++ 1 file changed, 92 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915

[Intel-gfx] [PATCH 4/6] drm/i915: get_plane_config for i9xx v11

: split out init ordering changes (Daniel) don't fetch config if !CONFIG_FB v8: use proper height in get_plane_config (Chris) v9: fix CONFIG_FB check for modular configs (Jani) v10: add comment about stolen allocation stomping v11: drop hw state readout hunk (Daniel) Signed-off-by: Jesse B

[Intel-gfx] [PATCH 6/6] drm/i915: Wrap the preallocated BIOS framebuffer and preserve for KMS fbcon v12

nditional (Daniel) v12:fix up fb vs pipe size checking (Chris) Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_drv.h |1 + drivers/gpu/drm/i915/intel_fbdev.c | 174 ++-- 2 files changed, 166 insertions(+), 9 deletions(-) diff --git a/drivers/gpu

[Intel-gfx] [PATCH 4/6] drm/i915: get_plane_config for i9xx v12

S fbs (Kristian) pull out common bits (Jesse) Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_display.c | 67 ++ 1 file changed, 67 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index e9

[Intel-gfx] [PATCH 5/6] drm/i915: get_plane_config support for ILK+ v2

This should allow BIOS fb inheritance to work on ILK+ machines too. v2: handle tiled BIOS fbs (Kristian) split out common bits (Jesse) Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_display.c | 67 ++ 1 file changed, 67 insertions(+) diff

[Intel-gfx] [PATCH 1/6] drm: export cmdline and preferred mode functions from fb helper

This allows drivers to use them in custom initial_config functions. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/drm_fb_helper.c |6 -- include/drm/drm_fb_helper.h |6 ++ 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/drm_fb_helper.c b

[Intel-gfx] [PATCH 3/6] drm/i915: add plane_config fetching infrastructure

Early at init time, we can try to read out the plane config structure and try to preserve it if possible. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_drv.h |3 ++ drivers/gpu/drm/i915/intel_display.c | 82 ++ drivers/gpu/drm/i915

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