continue supporting degamma on MTL.
To avoid pipe config mismatch between 24 bit HW lut values and 16 bit
userspace sent values, convert back the 24 bit lut values read from HW
to 16 bit values.
Chaitanya Kumar Borah (2):
drm/i915/color: Upscale degamma values for MTL
drm/i915/color: Downscale
te a helper function for upscaling values
v3: Fix multi line comment style (Uma)
Signed-off-by: Chaitanya Kumar Borah
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_color.c | 20 +++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git a/drivers/
For MTL and beyond, convert back the 24 bit lut values
read from HW to 16 bit values to maintain parity with
userspace values. This way we avoid pipe config mismatch
for pre-csc lut values.
v2: Add helper function to downscale values (Jani)
Signed-off-by: Chaitanya Kumar Borah
Reviewed-by: Uma
te a helper function for upscaling values
v3: Fix multi line comment style (Uma)
v4: Remove extra line(Ankit)
Signed-off-by: Chaitanya Kumar Borah
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_color.c | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
Add newly added PCI-IDs for RPL
BSpec: 55376
Signed-off-by: Chaitanya Kumar Borah
---
include/drm/i915_pciids.h | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index 1661f9e552d2..1256770d3827 100644
--- a
Add a wrapper around intel_step_name that takes in driver data as an
argument. This wrapper will help maintain compatibility with the
proposed xe driver.
Signed-off-by: Chaitanya Kumar Borah
Signed-off-by: Animesh Manna
---
drivers/gpu/drm/i915/display/intel_dmc.c | 2 +-
drivers/gpu/drm/i915
continue supporting degamma on MTL.
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_color.c | 42 --
1 file changed, 40 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b/drivers/gpu/drm/i915/display/intel_color.c
For MTL and beyond, convert back the 24 bit lut values
read from HW to 16 bit values to maintain parity with
userspace values. This way we avoid pipe config mismatch
for pre-csc lut values.
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_color.c | 8
1 file
continue supporting degamma on MTL.
To avoid pipe config mismatch between 24 bit HW lut values and 16 bit
userspace sent values, convert back the 24 bit lut values read from HW
to 16 bit values.
Chaitanya Kumar Borah (2):
drm/i915/color: Add function to load degamma LUT in MTL
drm/i915/color: For
With change [1], visibility of struct seq_file is lost in
intel_display_power.h leading to build errors. Add header
file explicitly to restore visibility.
[1] ef104443bffa ("procfs: consolidate arch_report_meminfo declaration")
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gp
Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_display_power.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h
b/drivers/gpu/drm/i915/display/intel_display_power.h
index be1a87bde0c9..0ba268e566b0 100644
--- a/drivers/gpu/drm/i9
continue supporting degamma on MTL.
To avoid pipe config mismatch between 24 bit HW lut values and 16 bit
userspace sent values, convert back the 24 bit lut values read from HW
to 16 bit values.
Chaitanya Kumar Borah (2):
drm/i915/color: Upscale degamma values for MTL
drm/i915/color: Downscale
te a helper function for upscaling values
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_color.c | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b/drivers/gpu/drm/i915/display
For MTL and beyond, convert back the 24 bit lut values
read from HW to 16 bit values to maintain parity with
userspace values. This way we avoid pipe config mismatch
for pre-csc lut values.
v2: Add helper function to downscale values (Jani)
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu
According to Bspec, the voltage level for 480MHz is to be set as 1
instead of 2.
BSpec: 49208
Fixes: 06f1b06dc5b7 ("drm/i915/display: Add 480 MHz CDCLK steps for RPL-U")
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 30 +++-
According to Bspec, the voltage level for 480MHz is to be set as 1
instead of 2.
BSpec: 49208
Fixes: 06f1b06dc5b7 ("drm/i915/display: Add 480 MHz CDCLK steps for RPL-U")
v2: rebase
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_cd
ave, particularly with the "Fix me"
comment which indicates a bigger underlying problem. Hence, the
RFC.
[1] 3b0fb6ab25("fbcon: Use delayed work for cursor")
[2]
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13243/shard-glk2/igt@kms_fbcon_...@fbc-suspend.html
Signed-off-by
eDP specification supports HBR3 link rate since v1.4a. Moreover,
C10 phy can support HBR3 link rate for both DP and eDP. Therefore,
do not clamp the supported rates for eDP at 6.75Gbps.
Cc:
BSpec: 70073 74224
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_dp.c
From: Johannes Berg
This reverts commit f4acfcd4deb1 ("debugfs: annotate debugfs handlers
vs. removal with lockdep"), it appears to have false positives and
really shouldn't have been in the -rc series with the fixes anyway.
topic/core-for-CI note: cherry-picked from
https://patchwork.kernel.org
From: Johannes Berg
This reverts commit f4acfcd4deb1 ("debugfs: annotate debugfs handlers
vs. removal with lockdep"), it appears to have false positives and
really shouldn't have been in the -rc series with the fixes anyway.
Link:https://patchwork.kernel.org/project/linux-fsdevel/patch/202312021
dding this
distinction since they are currently in use. However, here the question
arises if we keep this change in upstream or not as this could just be dead
code down the line. Feedbacks are appreciated on this.
Chaitanya Kumar Borah (2):
drm/i915: Add RPL-U CDCLK table
drm/i915: Add additional check
Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 16 +++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 9bfeb1abba47..1890e5135cfc 100644
--- a/drivers/gp
A new step of 480MHz has been added on SKUs that have a RPL-U
device id. Add a new table which include this new CDCLK step.
BSpec: 55409
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 39 ++
1 file changed, 39 insertions(+)
diff --git
writing into the HW to continue supporting degamma on
MTL.
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_color.c | 42 --
1 file changed, 40 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b/drivers/gpu/drm
recated in future. Feedbacks are welcome.
Chaitanya Kumar Borah (4):
drm/i915/quirks: Add quirk for 480MHz CDCLK step
drm/i915/display: Add 480 MHz CDCLK steps for RPL-U
drm/i915: Initialize intel quirks before CDCLK initialization
drm/i915: Apply CDCLK quirk only on QS parts
drivers/g
. Therefore, quirks
are a good way to achieve the same.
BSpec: 55409
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_quirks.c | 14 ++
drivers/gpu/drm/i915/display/intel_quirks.h | 1 +
2 files changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/i915
A new step of 480MHz has been added on SKUs that have a RPL-U
device id to support 120Hz displays more efficiently. Use a
new quirk to identify the machine for which this change needs
to be applied.
BSpec: 55409
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display
With addition of new quirk QUIRK_480MHZ_CDCLK_STEP, it is imperative
that quirks should be initialized before CDCLK initialization. Refactor
the code accordingly.
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_display.c | 2 --
drivers/gpu/drm/i915/i915_driver.c
n Intel(R) Core(TM) i5-1345U"
BSpec: 55409
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_quirks.c | 32 +++--
1 file changed, 29 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_quirks.c
b/drivers/gpu/drm/i915/di
Remove force probe protection from DG1 platform as testing suggests
that the platform is stable enough.
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/i915_pci.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
Replace _PLANE_INPUT_CSC_RY_GY_2_* with _PLANE_CSC_RY_GY_2_*
for Plane CSC
Fixes: 6eba56f64d5d ("drm/i915/pxp: black pixels on pxp disabled")
Cc:
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/i915_reg.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
di
decision if this particular part needs
to be upstreamed.(see comments on previous versions)
Chaitanya Kumar Borah (2):
drm/i915: Add rplu sub platform
drm/i915/display: Add 480 MHz CDCLK steps for RPL-U
arch/x86/kernel/early-quirks.c | 1 +
drivers/gpu/drm/i915/display/intel_cdclk.c
Adding RPL-U as a sub platform. In RPL-U a new CDCLK step has
been added so we need to make a distinction between RPL-P
and RPL-U while CDCLK initialization.
Adding a sub-platform, enables us to make this differentiation
in the code.
Signed-off-by: Chaitanya Kumar Borah
---
arch/x86/kernel
A new step of 480MHz has been added on SKUs that have a RPL-U
device id to support 120Hz displays more efficiently. Use a
new quirk to identify the machine for which this change needs
to be applied.
BSpec: 55409
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display
decision if this particular part needs
to be upstreamed.(see comments on revision 2)
Chaitanya Kumar Borah (2):
drm/i915: Add sub platform for 480MHz CDCLK step
drm/i915/display: Add 480 MHz CDCLK steps for RPL-U
drivers/gpu/drm/i915/display/intel_cdclk.c | 26 ++
drivers
RPL-U part of RPL subplatform
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/i915_pci.c | 1 +
drivers/gpu/drm/i915/intel_device_info.c | 8
drivers/gpu/drm/i915/intel_device_info.h | 2 ++
include/drm
-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 26 ++
1 file changed, 26 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 0c107a38f9d0..ba365ef17abc 100644
--- a/drivers
Fix typo for reference clock from 24400 to 24000
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
b/drivers/gpu/drm/i915/display/intel_cdclk.c
index
decision if this particular part needs
to be upstreamed.(see comments on revision 2)
Chaitanya Kumar Borah (2):
drm/i915: Add RPL-U sub platform
drm/i915/display: Add 480 MHz CDCLK steps for RPL-U
drivers/gpu/drm/i915/display/intel_cdclk.c | 27 ++
drivers/gpu/drm/i915
: - Revert to RPL-U subplatform
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 27 ++
1 file changed, 27 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 0c107a38f9d0
: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/i915_pci.c | 1 +
drivers/gpu/drm/i915/intel_device_info.c | 8
drivers/gpu/drm/i915/intel_device_info.h | 2 ++
include/drm/i915_pciids.h| 11 +++
5 files
decision if this particular part needs
to be upstreamed.(see comments on revision 2)
Chaitanya Kumar Borah (2):
drm/i915: Add RPL-U sub platform
drm/i915/display: Add 480 MHz CDCLK steps for RPL-U
drivers/gpu/drm/i915/display/intel_cdclk.c | 26 ++
drivers/gpu/drm/i915
)
- Add RPL-U ids to RPL-P platform
- Remove redundant comment
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/intel_device_info.c | 7 +++
drivers/gpu/drm/i915/intel_device_info.h | 1 +
include/drm/i915_pciids.h
: - Revert to RPL-U subplatform (Jani)
v4: - Remove Bspec reference from code (Jani)
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 26 ++
1 file changed, 26 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
b/drivers
From: Heikki Krogerus
The function returns with the ppm_lock held if there's an
error or the PPM reports BUSY condition.
This is a core-for-ci patch for [1]
[1]
https://lore.kernel.org/linux-usb/20240806112029.2984319-1-heikki.kroge...@linux.intel.com/
Reported-by: Luciano Coelho
Fixes: 5e9c
dware. Therefore, change operator to AND.
While at it, add a comment explaining why we don't enable FEC in eDP v1.5.
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_dp.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i9
across
MST and SST use-cases for UHBR rates.
While at it, add a comment explaining why we don't enable FEC in eDP v1.5.
v2: Correct logic to cater to SST use-cases (Jani)
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_dp.c | 8 +++-
1 file changed, 7 inser
From: Ville Syrjälä
The cursor hardware only does sync updates, and thus the hardware
will be scanning out from the old fb until the next start of vblank.
So in order to make the legacy cursor fastpath actually safe we
should not unpin the old fb until we're sure the hardware has
ceased accessing
a discussion to arrive at one.
[1] https://patchwork.freedesktop.org/series/126934/
Chaitanya Kumar Borah (3):
drm/i915: do not destroy plane state if cursor unpin worker is
scheduled
drm/i915: Add sanity checks before accessing fb buffer object
drm/i915: do not defer cleanup work
The plane destroy hook can be called asynchronously even when vblank
worker responsible for unpinning the cursor fb is scheduled. Since
the vblank worker destroys the plane state, do not destroy the plane
state if it is scheduled.
Signed-off-by: Chaitanya Kumar Borah
---
.../gpu/drm/i915
Now that cursor plane fb unpinning can be deferred to vblank work
check if plane state and corresponding fb pointers are still valid
before cleanup.
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_atomic_plane.c | 8 +++-
1 file changed, 7 insertions(+), 1
0x18c/0x350
[ 278.750452] ? __pfx_worker_thread+0x10/0x10
[ 278.750455] kthread+0xfe/0x130
[ 278.750460] ? __pfx_kthread+0x10/0x10
[ 278.750464] ret_from_fork+0x2c/0x50
[ 278.750468] ? __pfx_kthread+0x10/0x10
[ 278.750472] ret_from_fork_asm+0x1b/0x30
Signed-off-by: Chaitanya
From: Maarten Lankhorst
In case of legacy cursor update, the cursor VMA needs to be unpinned
only after vblank. This exceeds the lifetime of the whole atomic commit.
Any trick I attempted to keep the atomic commit alive didn't work, as
drm_atomic_helper_setup_commit() force throttles on any old
From: Maarten Lankhorst
In case of legacy cursor update, the cursor VMA needs to be unpinned
only after vblank. This exceeds the lifetime of the whole atomic commit.
Any trick I attempted to keep the atomic commit alive didn't work, as
drm_atomic_helper_setup_commit() force throttles on any old
The plane destroy hook can be called asynchronously even when vblank
worker responsible for unpinning the cursor fb is scheduled. Since
the vblank worker destroys the plane state, do not destroy the plane
state if it is scheduled.
Signed-off-by: Chaitanya Kumar Borah
---
.../gpu/drm/i915
Now that cursor plane fb unpinning can be deferred to vblank work
check if plane state and corresponding fb pointers are still valid
before cleanup.
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_atomic_plane.c | 8 +++-
1 file changed, 7 insertions(+), 1
From: Maarten Lankhorst
In some cases we want to flush all vblank work, right before vblank_off
for example. Add a simple function to make this possible.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/drm_vblank_work.c | 22 ++
include/drm/drm_vblank_work.h | 2 +
From: Ville Syrjälä
The cursor hardware only does sync updates, and thus the hardware
will be scanning out from the old fb until the next start of vblank.
So in order to make the legacy cursor fastpath actually safe we
should not unpin the old fb until we're sure the hardware has
ceased accessing
0x18c/0x350
[ 278.750452] ? __pfx_worker_thread+0x10/0x10
[ 278.750455] kthread+0xfe/0x130
[ 278.750460] ? __pfx_kthread+0x10/0x10
[ 278.750464] ret_from_fork+0x2c/0x50
[ 278.750468] ? __pfx_kthread+0x10/0x10
[ 278.750472] ret_from_fork_asm+0x1b/0x30
Signed-off-by: Chaitanya
a discussion to arrive at one.
[1] https://patchwork.freedesktop.org/series/126934/
v2: Add missing patch
Chaitanya Kumar Borah (3):
drm/i915: do not destroy plane state if cursor unpin worker is
scheduled
drm/i915: Add sanity checks before accessing fb buffer object
drm/i915: do not
a discussion to arrive at one.
[1] https://patchwork.freedesktop.org/series/126934/
v2: Add missing patch
v3: Remove misleading error log
Change condition to access fb object
Chaitanya Kumar Borah (3):
drm/i915: do not destroy plane state if cursor unpin worker is
scheduled
drm/i915
From: Maarten Lankhorst
In some cases we want to flush all vblank work, right before vblank_off
for example. Add a simple function to make this possible.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/drm_vblank_work.c | 22 ++
include/drm/drm_vblank_work.h | 2 +
From: Ville Syrjälä
The cursor hardware only does sync updates, and thus the hardware
will be scanning out from the old fb until the next start of vblank.
So in order to make the legacy cursor fastpath actually safe we
should not unpin the old fb until we're sure the hardware has
ceased accessing
From: Maarten Lankhorst
In case of legacy cursor update, the cursor VMA needs to be unpinned
only after vblank. This exceeds the lifetime of the whole atomic commit.
Any trick I attempted to keep the atomic commit alive didn't work, as
drm_atomic_helper_setup_commit() force throttles on any old
The plane destroy hook can be called asynchronously even when vblank
worker responsible for unpinning the cursor fb is scheduled. Since
the vblank worker destroys the plane state, do not destroy the plane
state if it is scheduled.
Signed-off-by: Chaitanya Kumar Borah
---
.../gpu/drm/i915
Now that cursor plane fb unpinning can be deferred to vblank work
access the fb object only when vblank unpin worker is not scheduled.
v2: - Remove misleading error log
- Change condition for accessing fb object
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display
0x18c/0x350
[ 278.750452] ? __pfx_worker_thread+0x10/0x10
[ 278.750455] kthread+0xfe/0x130
[ 278.750460] ? __pfx_kthread+0x10/0x10
[ 278.750464] ret_from_fork+0x2c/0x50
[ 278.750468] ? __pfx_kthread+0x10/0x10
[ 278.750472] ret_from_fork_asm+0x1b/0x30
Signed-off-by: Chaitanya
From: Maarten Lankhorst
In some cases we want to flush all vblank work, right before vblank_off
for example. Add a simple function to make this possible.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/drm_vblank_work.c | 22 ++
include/drm/drm_vblank_work.h | 2 +
a discussion to arrive at one.
[1] https://patchwork.freedesktop.org/series/126934/
v2: Add missing patch
v3: Remove misleading error log
Change condition to access fb object
v4: Remove unused variables
Chaitanya Kumar Borah (3):
drm/i915: do not destroy plane state if cursor unpin worker
From: Ville Syrjälä
The cursor hardware only does sync updates, and thus the hardware
will be scanning out from the old fb until the next start of vblank.
So in order to make the legacy cursor fastpath actually safe we
should not unpin the old fb until we're sure the hardware has
ceased accessing
From: Maarten Lankhorst
In case of legacy cursor update, the cursor VMA needs to be unpinned
only after vblank. This exceeds the lifetime of the whole atomic commit.
Any trick I attempted to keep the atomic commit alive didn't work, as
drm_atomic_helper_setup_commit() force throttles on any old
The plane destroy hook can be called asynchronously even when vblank
worker responsible for unpinning the cursor fb is scheduled. Since
the vblank worker destroys the plane state, do not destroy the plane
state if it is scheduled.
Signed-off-by: Chaitanya Kumar Borah
---
.../gpu/drm/i915
Now that cursor plane fb unpinning can be deferred to vblank work
access the fb object only when vblank unpin worker is not scheduled.
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_atomic_plane.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git
0x18c/0x350
[ 278.750452] ? __pfx_worker_thread+0x10/0x10
[ 278.750455] kthread+0xfe/0x130
[ 278.750460] ? __pfx_kthread+0x10/0x10
[ 278.750464] ret_from_fork+0x2c/0x50
[ 278.750468] ? __pfx_kthread+0x10/0x10
[ 278.750472] ret_from_fork_asm+0x1b/0x30
Signed-off-by: Chaitanya
Maud and Naud SDPs on it's own.
Cc: sta...@vger.kernel.org # v5.17
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8097
Co-developed-by: Kai Vehmanen
Signed-off-by: Kai Vehmanen
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_audio.c
Maud and Naud SDPs on it's own.
Cc: sta...@vger.kernel.org # v5.17
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8097
Co-developed-by: Kai Vehmanen
Signed-off-by: Kai Vehmanen
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_audio.c
-2.html
Chaitanya Kumar Borah (1):
drm: Add helper to check if there are pending vblank work
Maarten Lankhorst (2):
drm: Add drm_vblank_work_flush_all().
drm/i915: Use the same vblank worker for atomic unpin
Ville Syrjälä (1):
drm/i915: Use vblank worker to unpin old legacy cursor fb
From: Maarten Lankhorst
In some cases we want to flush all vblank work, right before vblank_off
for example. Add a simple function to make this possible.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/drm_vblank_work.c | 22 ++
include/drm/drm_vblank_work.h | 2 +
Add helper to check if there are pending vblank work for a crtc
which are yet to be scheduled.
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/drm_vblank_work.c | 24
include/drm/drm_vblank_work.h | 1 +
2 files changed, 25 insertions(+)
diff --git a
crtc_vblank_off(), therefore, wait one vblank
if there are pending vblank workers.
This patch is slightly reworked by Maarten.
Cc: Maarten Lankhorst
Signed-off-by: Ville Syrjälä
Signed-off-by: Maarten Lankhorst
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_
From: Maarten Lankhorst
In case of legacy cursor update, the cursor VMA needs to be unpinned
only after vblank. This exceeds the lifetime of the whole atomic commit.
Any trick I attempted to keep the atomic commit alive didn't work, as
drm_atomic_helper_setup_commit() force throttles on any old
References: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11305
Signed-off-by: Chaitanya Kumar Borah
---
drivers/net/ethernet/intel/e1000e/ich8lan.c | 22 -
drivers/net/ethernet/intel/e1000e/netdev.c | 18 +
2 files changed, 18 insertions(+), 22 deletions
Maud and Naud SDPs on it's own.
Fixes: 6014ac122ed0 ("drm/i915/audio: set proper N/M in modeset")
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8097
Co-developed-by: Kai Vehmanen
Signed-off-by: Kai Vehmanen
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/d
nth]
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_ddi.c| 79 +
drivers/gpu/drm/i915/display/intel_ddi.h| 2 +-
drivers/gpu/drm/i915/display/intel_dp_mst.c | 4 +-
3 files changed, 67 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/
intel_hdmi_fastset_infoframes().
v2:
- Update HDMI AVI infoframe during fastset.
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_ddi.c | 3 +++
drivers/gpu/drm/i915/display/intel_display.c | 3 ++-
drivers/gpu/drm/i915/display/intel_hdmi.c| 19
nth]
- Wait for FEC_ENABLE_LIVE_STATUS to be cleared before
re-enabling FEC [Srikanth]
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_ddi.c | 57 +++-
drivers/gpu/drm/i915/display/intel_ddi.h | 6 +--
2 files changed, 50 insertions(+), 13 deleti
intel_hdmi_fastset_infoframes().
v3:
- Create a wrapper intel_ddi_update_pipe_hdmi to stick to
uniform naming (Jani)
- Do not disable HDMI AVI infoframe if already disabled (Uma)
v2:
- Update HDMI AVI infoframe during fastset.
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display
ble checks [Jani]
v2:
- Refactor code to avoid duplication and improve readability [Jani]
- In case of PTL, wait for FEC status directly after FEC enable [Srikanth]
- Wait for FEC_ENABLE_LIVE_STATUS to be cleared before
re-enabling FEC [Srikanth]
Signed-off-by: Chaitanya Kumar Borah
---
driv
bf22f8a90fc3a3edc8b9...@sj1pr11mb6129.namprd11.prod.outlook.com/
Signed-off-by: Rafael J. Wysocki
References: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12763
Link: https://lore.kernel.org/linux-pm/12554508.o9o76zd...@rjwysocki.net/
Signed-off-by: Chaitanya Kumar Borah
---
drivers/cp
PRX does not respond with an FEC_ENABLE
within the stipulated 5ms.
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_ddi.c | 61 +++-
1 file changed, 59 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/
Changes in Dynamic Range and Mastering infoframe
should not trigger a full modeset. Therefore, allow
fastset.
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_display.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display
w the
MAX_ORDER of the page allocator, but blows up with a warning if it is
too large.
Fixes: 63a5c7a4b4c4 ("nvme-pci: use dma_alloc_noncontigous if possible")
Reported-by: Leon Romanovsky
Reported-by: Chaitanya Kumar Borah
Signed-off-by: Christoph Hellwig
References: https://gitlab.freedeskt
LUT programming is also disabled in the vblank worker.
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_color.c | 28 +++-
drivers/gpu/drm/i915/display/intel_crtc.c| 4 ++-
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
3 files changed,
/
References: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14039
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/panel/panel-auo-a030jtn01.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-auo-a030jtn01.c
b/drivers/gpu
failure for this is probably less drastic than
for plane programming. (Ville)
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_display.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b
From: Ville Syrjälä
Extract the DSB tail alignment checks into helper. We already
have two uses of this, and soo we'll get a third.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dsb.c | 19 +++
1 file changed, 15 insertions(+), 4 deletions(-)
diff --git a
>From PTL, LUT registers are made double buffered. This helps us
to program them in the active region without any concern of tearing.
This particulary helps in case of displays with high refresh rates
where vblank periods are shorter. Add MMIO and DSB path to program them.
Chaitanya Kumar Bo
From: Ville Syrjälä
Add support for the new GOSUB DSB instruction (available on ptl+),
which instructs the DSB to jump to a different buffer, executie
the commands there, and then return execution to the next
instruction in the original buffer.
There are a few alignment related workarounds that
: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_dsb.c | 13 +
drivers/gpu/drm/i915/display/intel_dsb.h | 1 +
2 files changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c
b/drivers/gpu/drm/i915/display/intel_dsb.c
index 2cda6fc7857b..97ea3c655590
From: Ville Syrjälä
Extract the code that alings the next instruction to the next
QW boundary into a small helper. I'll have some more uses for
this later.
Also explain why we don't have to zero out the extra DW.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dsb.c | 16 +
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