Our code allows have a PPGTT that is smaller than the maximum size for
GEN6-GEN7. Though I don't think this actually ever occurs, the code may
as well work properly and more importantly look correct by using the
variable size instead of the HW max.
Signed-off-by: Ben Widawsky
---
driver
h
PPGTT. I cannot test it at the moment.
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 5427d6d..0f39090 100644
--- a/drivers/gp
On Sat, Mar 08, 2014 at 11:58:16AM -0800, Ben Widawsky wrote:
> I'm not clear if the hardware is still subject to the same prefetching
> issues that made us use a scratch page in the first place. In either
> case, we're using garbage with the current code (we will end
On Sat, Mar 08, 2014 at 08:58:24PM +0100, Daniel Vetter wrote:
> On Sat, Mar 8, 2014 at 7:50 PM, Ben Widawsky wrote:
> > I've seen this too. Though I think the WARN does coincide with what the
> > docs state - it doesn't seem to match reality. So I totally agree thi
i915: Use i915_hw_context to set reset stats
>
> Cc: Mika Kuoppala
> Cc: Ben Widawsky
> Signed-off-by: Daniel Vetter
Did you try playing around with setting last_context to
private_default_context? That is more in line with the original outlined
approach of "every platform has a
On Mon, Mar 10, 2014 at 11:05:42PM +0200, Imre Deak wrote:
> On Tue, 2014-02-25 at 19:52 -0800, Ben Widawsky wrote:
> > These page table helpers make the code much cleaner. There is some
> > room to use the arch/x86 header files. The reason I've opted not to is
>
On Mon, Mar 10, 2014 at 09:30:22PM +0100, Daniel Vetter wrote:
> On Mon, Mar 10, 2014 at 7:30 PM, Ben Widawsky wrote:
> > On Mon, Mar 10, 2014 at 09:44:22AM +0100, Daniel Vetter wrote:
> >> It can happen ...
> >>
> >> Fix up the check to match pre-gen6 reality
On Tue, Mar 11, 2014 at 5:24 AM, Chris Wilson wrote:
> On Sat, Mar 08, 2014 at 11:59:42AM -0800, Ben Widawsky wrote:
>> On Sat, Mar 08, 2014 at 11:58:16AM -0800, Ben Widawsky wrote:
>> > I'm not clear if the hardware is still subject to the same prefetching
>> > i
2014 at 9:46 AM, Chris Wilson wrote:
> On Tue, Mar 11, 2014 at 09:39:30AM -0700, Ben Widawsky wrote:
>> On Tue, Mar 11, 2014 at 5:24 AM, Chris Wilson
>> wrote:
>> > On Sat, Mar 08, 2014 at 11:59:42AM -0800, Ben Widawsky wrote:
>> >> On Sat, Mar 08, 201
ot sure the logic holds.
Chris could explain that one a bit further?
The only reason I bring this up is I'd like to rip this out completely
and have Thiago retest, or at least change the comment/commit message to
be to reflect whatever light Chris sheds on the matter.
Anyway, the bits
On Thu, Mar 13, 2014 at 12:51 AM, Chris Wilson wrote:
> Upon resume, the hardware continues writing the breadcrumbs into the old
> hws page (due to the stale TLB) and we try to read the seqno from the
> new page, so as shown by the error-states it appears that the breadcrumb
> writes are not happe
The preliminary HW support check is no longer needed, and the
calculation is simplified while here.
Reported-by: David Woodhouse
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915
On Fri, Mar 14, 2014 at 07:40:30PM +0100, Daniel Vetter wrote:
> On Fri, Mar 14, 2014 at 09:58:06AM -0700, Ben Widawsky wrote:
> > The preliminary HW support check is no longer needed, and the
> > calculation is simplified while here.
> >
> > Reported-by: David Woodho
I have been seeing this for a long time, but ignored it because it's
typically not terribly important. Recently, I really needed this info,
and it was garbage. Proof that I should have fixed it sooner. Originally
wrong from:
commit 6c7a01ec3743a5a6ce9e53a69d7a6c2d8c715eb1
Author: Ben Wid
On Sat, Mar 15, 2014 at 12:08:56AM +0100, Daniel Vetter wrote:
> Currently not an issue since we don't emit sempahores, but better
> not forget about those.
>
> As a little prep work extract the ipehr decoding for cleaner control
> flow. And apply a bit of polish.
>
>
t; > printf("%s Enable_CTS_or_M_programming\t%lu\n", prefix, BIT(dword,
> > 20));
> > - printf("%s CTS_M value Index\t\t\t%s\n",prefix, BIT(dword, 21)
> > ? "CTS" : "M");
> > + printf("%s
Broken by:
commit 0294ae7b44bba7ab0d4cef9a8736287f38bdb4fd
Author: Chris Wilson
Date: Thu Mar 13 12:00:29 2014 +
drm/i915: Consolidate forcewake resetting to a single function
Cc: Chris Wilson
Cc: Mika Kuoppala
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/intel_uncore.c
On Sat, Mar 15, 2014 at 03:20:23PM +, Chris Wilson wrote:
> On Sat, Mar 15, 2014 at 12:47:22PM +0100, Daniel Vetter wrote:
> > On Fri, Mar 14, 2014 at 05:21:36PM -0700, Ben Widawsky wrote:
> > > Broken by:
> > > commit 0294ae7b44bba7ab0d4cef9a8736287f38bdb4fd
Therefore we can do it from our general init function. Eventually, I
hope to have a lot more commonality like this. It won't arrive yet, but
this was a nice easy one.
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 5 +
1 file changed, 1 insertion(+), 4 dele
trivial.
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b3e31fd..084e82f 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu
r the intended purpose, but I
thought it was a nice patch to keep around.
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_drv.h| 3 +++
drivers/gpu/drm/i915/i915_gem.c| 8
drivers/gpu/drm/i915/i915_gem_context.c| 2 +-
drivers/gpu/drm
it's more
reusable.
I'd really like to get ppgtt info into our error state, but I found it too
difficult to make work in the limited time I have. Maybe Mika can find a way.
Cc: Mika Kuoppala
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_debugfs.c | 28 ++---
This patch existed for another reason which no longer exists. I liked
it, so I kept it in the series. It can skipped if undesirable.
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/i915_gem.c | 2 +-
2 files changed, 3 insertions(+), 1 deletion
The current code will both potentially print a WARN, and setup part of
the PPGTT structure. Neither of these harm the current code, it is
simply for clarity, and to perhaps prevent later bugs, or weird
debug messages.
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 5
TODO: Do header files need a copyright?
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_drv.h | 162 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 57 -
drivers/gpu/drm/i915/i915_gem_gtt.h | 225
3 files changed, 227
Split out single mappings which will help with upcoming work. Also while
here, rename the function because it is a better description - but this
function is going away soon.
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 39 ++---
1 file
Upcoming patches will use the terms map and unmap in references to the
page table entries. Having this distinction will really help with code
clarity at that point.
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 12 ++--
1 file changed, 6 insertions(+), 6
f future patches.
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index bd016e2..b26b186 100644
--- a/drivers/gpu/drm/
Similar to the patch a few back in the series, we can always map and
unmap page directories when we do their allocation and teardown. Page
directory pages only exist on gen8+, so this should only effect behavior
on those platforms.
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915
way. And, one thing to keep
in mind is currently we don't have any GPU faulting capability. This
will greatly limit the ability to map things sparsely, which also will
greatly limit the effective virtual address space we can use.
Ben Widawsky (26):
drm/i915: Split out verbose PPGTT dumping
d
meliorated shortly.
NOTE: The pun in the subject was intentional.
Signed-off-by: Ben Widawsky
Conflicts:
drivers/gpu/drm/i915/i915_drv.h
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 175 ++--
drivers/gpu/drm/i915/i915_gem_gtt.h | 24 +++--
2 files ch
cific init, now that GEN8 exists.
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 22 +-
1 file changed, 9 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 1620211..5f73284 1
statically declared as part of the page directory.
This has non-zero overhead, but things gain non-trivial complexity as a
result.
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 226 +++-
drivers/gpu/drm/i915/i915_gem_gtt.h | 4 +-
2 files changed
base + 0, 511<<22) == 511);
assert(gen6_pde_count(base + 0, 512<<22) == 512);
assert(gen6_pde_count(base + 0x1000, 512<<22) == 512);
assert(gen6_pde_count(base + (1<<22), 512<<22) == 511);
}
int main()
{
test_pde(0);
while (1)
quire newlines, or local
variables to make it fit cleanly.
Notice that even the page allocation shares this same attribute. For
now, I am leaving that code untouched because the macro version would be
a bit on the big side - but it's a nice cleanup as well (IMO)
Signed-off-by: Ben Widawsky
--
be a
discrete operation.
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 147 +---
1 file changed, 85 insertions(+), 62 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 35acccb..92
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_debugfs.c | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 5f3666a..04d40fa 100644
--- a/drivers/gpu/drm/i915
Start using size/length through the GEN8 code. The same approach was
taken for gen7. The difference with gen8 to this point is we need to
take care to the do the page directory allocations, as well as the page
tables.
This patch is meant to show how things will look (more or less) if I
keep up in
Move the remaining members over to the new page table structures.
This can be squashed with the previous commit if desire. The reasoning
is the same as that patch. I simply felt it is easier to review if split.
Signed-off-by: Ben Widawsky
Conflicts:
drivers/gpu/drm/i915/i915_drv.h
There is never a case where we don't want to do it. Since we've broken
up the allocations into nice clean helper functions, it's both easy and
obvious to do the dma mapping at the same time.
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915
sing PPGTT is not managed here. The patch which actually
begins dynamic allocation/teardown explains the reasoning forthis.
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 170 +---
drivers/gpu/drm/i915/i915_gem_gtt.h | 117 +++---
point I will try to
combine functionality.
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 61 +++--
drivers/gpu/drm/i915/i915_gem_gtt.h | 2 ++
2 files changed, 34 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/i915
We have some fanciness coming up. This patch just breaks out the logic.
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_gem_context.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c
b/drivers/gpu/drm/i915
ther than a
few tidbits which lead me to believe there are some corner cases that
will require it. I'm mostly depending on the reload of DCLV to
invalidate the old TLBs. We can try to remove this patch and see what
happens.
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i91
ve at most 2MB-4k of memory for the aliasing PPGTT
page tables.
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/i915_gem_context.c | 2 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 123 +---
drivers/gpu/drm
_irq_preinstall(struct drm_device *dev)
> GEN8_IRQ_INIT_NDX(DE_PIPE, pipe);
> }
>
> - GEN8_IRQ_INIT(DE_PORT);
> - GEN8_IRQ_INIT(DE_MISC);
> - GEN8_IRQ_INIT(PCU);
> -#undef GEN8_IRQ_INIT
> -#undef GEN8_IRQ_INIT_NDX
> -
> + GEN5_IRQ_INIT(
- GEN5_IRQ_FINI(GT);
> + GEN5_IRQ_RESET(GT);
> if (INTEL_INFO(dev)->gen >= 6)
> - GEN5_IRQ_FINI(GEN6_PM);
> + GEN5_IRQ_RESET(GEN6_PM);
> + POSTING_READ(GTIIR);
>
> if (HAS_PCH_NOP(dev))
> return;
>
> - GEN5_IRQ_FINI(SDE);
> + GEN5_IRQ_RESET(SDE);
> if (HAS_PCH_CPT(dev) || HAS_PCH_LPT(dev))
> I915_WRITE(SERR_INT, I915_READ(SERR_INT));
> }
> --
> 1.8.5.3
>
> ___
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ben Widawsky, Intel Open Source Technology Center
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Fri, Mar 07, 2014 at 08:10:21PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni
>
> It's the only thihg missing, apparently.
s/thihg/thing
There is a potential fixup in patch 3, but with or without,
everything up through here is:
Reviewed-by: Ben Widawsky
>
> Signed-
pe, dev_priv->de_irq_mask[pipe],
> + de_pipe_enables);
> }
> POSTING_READ(GEN8_DE_PIPE_ISR(0));
>
> - I915_WRITE(GEN8_DE_PORT_IMR, ~GEN8_AUX_CHANNEL_A);
> - I915_WRITE(GEN8_DE_PORT_IER, GEN8_AUX_C
ve been masked in
> pre-install 0x%08x\n",
> - pipe, tmp);
> + for_each_pipe(pipe)
> GEN8_IRQ_INIT_NDX(DE_PIPE, pipe, dev_priv->de_irq_mask[pipe],
> de_pipe_enables);
> - }
> POSTIN
r IIR registers. For this
> one, there's no need to double-clear since it can't store more than
> one interrupt.
>
> Signed-off-by: Paulo Zanoni
Without the assert that I don't like, this is
Reviewed-by: Ben Widawsky
> ---
> drivers/gpu/drm/i915/i915_irq.c | 8 +++
y: Paulo Zanoni
This one just like patch 9 is:
Reviewed-by: Ben Widawsky
Like that, I'd prefer to get rid of the IIR assertion
> ---
> drivers/gpu/drm/i915/i915_irq.c | 7 +--
> 1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i91
{
> struct drm_i915_private *dev_priv = dev->dev_private;
>
> + ibx_irq_pre_postinstall(dev);
> +
> gen8_gt_irq_postinstall(dev_priv);
> gen8_de_irq_postinstall(dev_priv);
>
> --
> 1.8.5.3
>
> ___
> Intel-gfx mailing list
PCU_);
> -
> - POSTING_READ(GEN8_PCU_IIR);
> -
> - ibx_irq_reset(dev);
> + gen8_irq_reset(dev);
BTW: This looks like a bad hunk. I've merged up to this point, and I do
not have ibx_irq_reset().
> }
>
> static void valleyview_irq_uninstall(struct dr
On Fri, Mar 07, 2014 at 08:10:32PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni
>
> Missing from gen8_irq_uninstall.
>
> Signed-off-by: Paulo Zanoni
Reviewed-by: Ben Widawsky
> ---
> drivers/gpu/drm/i915/i915_irq.c | 2 ++
> 1 file changed, 2 insertions(+)
>
AD calls to the macros
> makes the code safer, and the additional useless register reads
> shouldn't be noticeable. So move the POSTING_READ calls to the
> callers.
Can you just squash this into the earlier patch? Either way,
Reviewed-by: Ben Widawsky
>
> Signed-off-by: Pau
of my review. At first I was complaining to
myself about how many patches you used to do a simple thing. But, I must
admit it made reviewing the thing a lot easier, and when I look back at
how much stuff you combined, I'm really glad you did it this way. I'm
sure I've missed something
Apparently it is wiped out from under us, and we get some really fun
caching artifacts upon resume (it seems to be WB for all types by
default).
Reported-by: James Ausmus
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion
ather than just whether it
> is bound into the global GTT.
>
> Signed-off-by: Chris Wilson
> Cc: Ben Widawsky
> Signed-off-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 34
> ++---
> drivers/gpu/drm/i915/i915_drv
his moves the sanitize_early call around in the
> driver load call. This way we avoid calling setup_timer again in the
> resume code (where we also call sanitize_early).
>
> Cc: Chris Wilson
> Cc: Mika Kuoppala
> Cc: Ben Widawsky
> Tested-by: Rodrigo Vivi
> Bugzilla: htt
On Tue, Mar 18, 2014 at 11:29:58AM -0700, Jesse Barnes wrote:
> On Tue, 18 Mar 2014 09:05:58 +
> Chris Wilson wrote:
>
> > On Mon, Mar 17, 2014 at 10:48:44PM -0700, Ben Widawsky wrote:
> > > --- a/drivers/gpu/drm/i915/i915_gem_gtt.h
> > > +++ b/dr
On Sat, Feb 22, 2014 at 01:37:16PM +, Chris Wilson wrote:
> On Mon, Feb 17, 2014 at 07:01:44PM -0800, Ben Widawsky wrote:
> > The names of the struct members for RPS are stupid. Every time I need to
> > do anything in this code I have to spend a significant amount of time to
&g
option set :-( The woe of using localmodconfig. I
> should have picked the box with the i915. :-/
>
> Below is the fix. I'll repost a v2 of the original patch.
>
> Sorry about that.
>
I was about to send out the same fix when I saw this.
Reviewed-by: Ben Widawsky
&
On Tue, Mar 18, 2014 at 06:27:03PM -0700, Ben Widawsky wrote:
> On Sat, Feb 22, 2014 at 01:37:16PM +, Chris Wilson wrote:
> > On Mon, Feb 17, 2014 at 07:01:44PM -0800, Ben Widawsky wrote:
> > > The names of the struct members for RPS are stupid. Every time I need to
> &g
s bound into the global GTT.
>
> v2: Restore the non-full-ppgtt path for simplicity as we may not even
> create vma with older hardware.
>
> v3: Tweak handling of global entries and default context entries.
>
> Signed-off-by: Chris Wilson
> Cc: Ben Widawsky
Reviewe
On Wed, Mar 19, 2014 at 09:36:04AM +0100, Daniel Vetter wrote:
> On Tue, Mar 18, 2014 at 01:53:53PM -0700, Ben Widawsky wrote:
> > On Fri, Mar 07, 2014 at 08:10:16PM -0300, Paulo Zanoni wrote:
> > > From: Paulo Zanoni
> > >
> > > Hi
> > >
> >
On Wed, Mar 19, 2014 at 09:28:32AM +0100, Daniel Vetter wrote:
> On Tue, Mar 18, 2014 at 11:20:09AM -0700, Ben Widawsky wrote:
> > On Fri, Mar 07, 2014 at 08:10:24PM -0300, Paulo Zanoni wrote:
> > > From: Paulo Zanoni
> > >
> > > Instead of trying to clear i
> may be anywhere within the per-process address spaces. In order to find
> the full location, we need to read the high bits from a second register.
> We then also need to expand our storage to keep track of the larger
> address.
>
> Signed-off-by: Chris Wilson
> Cc: Ben
On Tue, Mar 04, 2014 at 03:30:14PM +0100, Daniel Vetter wrote:
> On Wed, Feb 19, 2014 at 10:27:20PM -0800, Ben Widawsky wrote:
> > RC6 works a lot like HW contexts in that when the GPU enters RC6 it
> > saves away the state to a context, and loads it upon wake.
> >
&g
, I wanted to make it a separate patch for
the bisectable 'just-in-case'
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_sysfs.c | 21 +
1 file changed, 9 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c
b/drivers/gp
dling the interrupts. Since the code is
currently disabled (and broken) I think the patch stands better by
itself.
v2: Move the commit about not touching the ringbuffer interrupt to the
snb_* function where it belongs (Rodrigo)
v3: Rebased on Paulo's runtime PM changes
Signed-off-by: Be
ommit dd0a1aa19bd3d7203e58157b84cea78bbac605ac
Author: Jeff McGee
Date: Tue Feb 4 11:32:31 2014 -0600
drm/i915: Restore rps/rc6 on reset
Note with the above change the fix for gen8 is also handled (which was
not the case in Jeff's original patch).
Signed-off-by: Ben Widawsky
---
drivers/gp
It is tested and looking fairly stable now, so turn it on. It wasn't
intentionally turned off originally :P
Reviewed-by: Rodrigo Vivi
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/intel_pm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm
Ben Widawsky (12):
drm/i915: Reorganize the overclock code
drm/i915: Fix coding style for RPS
drm/i915: Store the HW min frequency as min_freq
drm/i915: Rename and comment all the RPS *stuff*
drm/i915: Remove extraneous MMIO for RPS
drm/i915: remove rps local variables
drm/i915/bdw
Introduced:
commit b8a5ff8d7c676a04e0da5ec16bb068dd39459042
Author: Jeff McGee
Date: Tue Feb 4 11:37:01 2014 -0600
drm/i915: Update rps interrupt limits
Cc: Jeff McGee
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_sysfs.c | 20 ++--
1 file changed, 10
work properly, which is broken in v3.
Disable rc6 on reset, and defer re-enabling until the first batch.
The fact that RC6 residency continues to increment, and that this patch
prevents a hang on BDW silicon has been:
Tested-by: Kenneth Graunke (v1)
Signed-off-by: Ben Widawsky
---
drivers/gpu
Reviewed-by: Rodrigo Vivi
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/intel_pm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index ab9e992..9486396 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
fails, the later is likely invalid.
Having a bit more confidence in my understanding of how things work, I
now feel it's better to have clear, readable, code than to try to skip
over this one operation in an unusual case.
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/intel_pm.c
McGee
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_sysfs.c | 36 ---
drivers/gpu/drm/i915/intel_pm.c | 40 ---
2 files changed, 33 insertions(+), 43 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_sysfs
e at times. min_freq and max_freq (which may be equal to rp0, or
rp1 depending on the platform) represent the actual HW min and max.
Cc: Chris Wilson
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_debugfs.c | 26
drivers/gpu/drm/i915/i915_drv.h | 26 +---
drivers/gp
s are outside the
norms given in the programming guide (ie. early silicon)
v2: Use RP1 instead of RPn
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/intel_pm.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel
this leaves a temporarily awkward min_delay (the soft limit) with the
new min_freq (the hardware limit). It's fixed in the next patch.
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_pm.c | 2 +-
2 files changed, 2 insertions(+), 1 del
p(void)
> +{
> + int dma_buf_fd;
> + char *ptr;
> + uint32_t handle;
> + int ret = 1;
> +
> + handle = gem_create(fd, BO_SIZE);
> + dma_buf_fd = prime_handle_to_fd(fd, handle);
> + ptr = mmap(NULL, BO_SIZE, PROT_READ, MAP_SHARED, dma_buf_fd, 0)
On Wed, Mar 19, 2014 at 01:45:46PM +, Chris Wilson wrote:
> Signed-off-by: Chris Wilson
Any clue how you intend to use this for a commit message (I'm actually
curious)? Also, the subject is wrong, you're counting size, not
quantity. Anyhoo, looks correct.
Reviewed-by:
Cc: Kenneth Graunke
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_gem_context.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c
b/drivers/gpu/drm/i915/i915_gem_context.c
index 185c926..ae4597c 100644
--- a
On Tue, Feb 04, 2014 at 12:11:03PM +0100, Daniel Vetter wrote:
> On Fri, Jan 31, 2014 at 05:14:02PM +0200, Mika Kuoppala wrote:
> > Found with smatch.
> >
> > Signed-off-by: Mika Kuoppala
>
> Both smatch patches merged to dinq, thanks.
> -Daniel
CC stable?
--
B
Ville)
Improved commit message.
References: https://bugs.freedesktop.org/show_bug.cgi?id=74007
Cc: Ville Syrjälä
Signed-off-by: Mika Kuoppala
Signed-off-by: Daniel Vetter
[BDW 3.14 backport]
Cc: sta...@vger.kernel.org
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/intel_uncore.c
From: Ville Syrjälä
According to BSpec we need to always set this magic bit in ring buffer
mode.
Signed-off-by: Ville Syrjälä
Reviewed-by: Mika Kuoppala
Signed-off-by: Daniel Vetter
[BDW 3.14 backport]
Cc: sta...@vger.kernel.org
Signed-off-by: Ben Widawsky
Conflicts:
drivers/gpu
Widawsky
Signed-off-by: Daniel Vetter
[BDW 3.14 backport]
Cc: sta...@vger.kernel.org
Signed-off-by: Ben Widawsky
Conflicts:
drivers/gpu/drm/i915/intel_pm.c
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_pm.c | 5 -
2 files changed, 5 insertions(+), 1 deletion
s fixes that require more than a single patch.
I will not have a machine to test these on until Monday, but I am
mailing them out now in case our QA can get it tested sooner.
Ben Widawsky (2):
drm/i915/bdw: Use scratch page table for GEN8 PPGTT
drm/i915/bdw: Restore PPAT on thaw
Damien Lespiau
From: Ville Syrjälä
Signed-off-by: Ville Syrjälä
Reviewed-by: Ben Widawsky
Signed-off-by: Daniel Vetter
[BDW 3.14 backport]
Cc: sta...@vger.kernel.org
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_reg.h | 3 +++
drivers/gpu/drm/i915/intel_pm.c | 4
2 files changed, 7
From: Ben Widawsky
I'm not clear if the hardware is still subject to the same prefetching
issues that made us use a scratch page in the first place. In either
case, we're using garbage with the current code (we will end up using
offset 0).
This may be the cause of our current gem
: https://bugs.freedesktop.org/show_bug.cgi?id=72220
Signed-off-by: Ville Syrjälä
Reviewed-by: Damien Lespiau
Signed-off-by: Daniel Vetter
[BDW 3.14 backport]
Cc: sta...@vger.kernel.org
Signed-off-by: Ben Widawsky
Conflicts:
drivers/gpu/drm/i915/intel_pm.c
---
drivers/gpu/drm/i915
From: Jani Nikula
BDW is no longer flagged as preliminary hw, but without
i915.preliminary_hw_support module param set the logs are filled with
WARNs about it.
Just make semaphores off the BDW per-chip default for now.
CC: Ben Widawsky
Reported-by: Sebastien Dufour
Signed-off-by: Jani Nikula
From: Kenneth Graunke
I believe this will be necessary on production hardware.
Signed-off-by: Kenneth Graunke
Reviewed-by: Ville Syrjälä
Reviewed-by: Ben Widawsky
[danvet: Fix whitespace fail spotted by checkpatch. Also add missing
:bdw w/a tag that Ville spotted.]
Signed-off-by: Daniel
Widawsky
Signed-off-by: Daniel Vetter
[BDW 3.14 backport]
Cc: sta...@vger.kernel.org
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/intel_uncore.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_uncore.c
b/drivers/gpu/drm/i915
From: Ben Widawsky
Apparently it is wiped out from under us, and we get some really fun
caching artifacts upon resume (it seems to be WB for all types by
default).
Reported-by: James Ausmus
Signed-off-by: Ben Widawsky
Tested-by: James Ausmus
Bugzilla: https://bugs.freedesktop.org
From: Ville Syrjälä
Signed-off-by: Ville Syrjälä
Reviewed-by: Ben Widawsky
Signed-off-by: Daniel Vetter
[BDW 3.14 backport]
Cc: sta...@vger.kernel.org
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a
amien Lespiau
Reviewed-by: Ben Widawsky
Signed-off-by: Daniel Vetter
[BDW 3.14 backport]
Cc: sta...@vger.kernel.org
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm
}
>
> --
> 1.8.3.2
>
> _______
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ben Widawsky, Intel Open Source Technology Center
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