On 11/1/2021 1:24 PM, Dixit, Ashutosh wrote:
On Sun, 31 Oct 2021 21:39:34 -0700, Belgaumkar, Vinay wrote:
Waitboost is a legacy feature implemented in the Host Turbo algorithm. This
patch set implements it for the SLPC path. A "boost" happens when user
calls gem_wait ioctl on a
On 11/1/2021 1:28 PM, Dixit, Ashutosh wrote:
On Sun, 31 Oct 2021 21:39:36 -0700, Belgaumkar, Vinay wrote:
@@ -945,6 +960,17 @@ void intel_rps_boost(struct i915_request *rq)
if (!test_and_set_bit(I915_FENCE_FLAG_BOOST, &rq->fence.flags)) {
struct intel_r
On 11/1/2021 1:26 PM, Dixit, Ashutosh wrote:
On Sun, 31 Oct 2021 21:39:35 -0700, Belgaumkar, Vinay wrote:
Define helpers and struct members required to record boost info.
Boost frequency is initialized to RP0 at SLPC init. Also define num_waiters
which can track the pending boost requests
On 9/14/2021 12:51 PM, Lucas De Marchi wrote:
The clflush calls here aren't doing anything since we are not writting
something and flushing the cache lines to be visible to GuC. Here the
intention seems to be to make sure whatever GuC has written is visible
to the CPU before we read them. Howe
On 7/10/2021 10:52 AM, Michal Wajdeczko wrote:
On 10.07.2021 03:20, Vinay Belgaumkar wrote:
Add helpers to read the min/max frequency being used
by SLPC. This is done by send a h2g command which forces
s/h2g/H2G
done.
SLPC to update the shared data struct which can then be
read.
Si
On 7/10/2021 11:08 AM, Michal Wajdeczko wrote:
On 10.07.2021 03:20, Vinay Belgaumkar wrote:
This prints out relevant SLPC info from the SLPC shared structure.
We will send a h2g message which forces SLPC to update the
shared data structure with latest information before reading it.
Signed
On 7/10/2021 11:15 AM, Michal Wajdeczko wrote:
On 10.07.2021 03:20, Vinay Belgaumkar wrote:
Cache rp0, rp1 and rpn platform limits into slpc structure
for range checking while setting min/max frequencies.
Also add "soft" limits which keep track of frequency changes
made from userland. Thes
On 7/10/2021 11:20 AM, Michal Wajdeczko wrote:
On 10.07.2021 03:20, Vinay Belgaumkar wrote:
Update the get/set min/max freq hooks to work for
slpc case as well. Consolidate helpers for requested/min/max
frequency get/set to intel_rps where the proper action can
be taken depending on whether
On 7/10/2021 11:29 AM, Michal Wajdeczko wrote:
On 10.07.2021 03:20, Vinay Belgaumkar wrote:
Tests that exercise the slpc get/set frequency interfaces.
Clamp_max will set max frequency to multiple levels and check
that slpc requests frequency lower than or equal to it.
Clamp_min will set mi
On 7/10/2021 11:41 AM, Michal Wajdeczko wrote:
On 10.07.2021 03:20, Vinay Belgaumkar wrote:
This feature hands over the control of HW RC6 to the GUC.
GUC decides when to put HW into RC6 based on it's internal
busyness algorithms.
GUCRC needs GUC submission to be enabled, and only
supported
On 7/21/2021 10:24 AM, Michal Wajdeczko wrote:
On 21.07.2021 18:11, Vinay Belgaumkar wrote:
Add macros to check for SLPC support. This feature is currently supported
for Gen12+ and enabled whenever GuC submission is enabled/selected.
Include templates for SLPC init/fini and enable.
v2: Mov
On 7/21/2021 10:25 AM, Michal Wajdeczko wrote:
On 21.07.2021 18:11, Vinay Belgaumkar wrote:
Add constants and params that are needed to configure SLPC.
v2: Add a new abi header for SLPC. Replace bitfields with
genmasks. Address other comments from Michal W.
Signed-off-by: Vinay Belgaumkar
On 7/21/2021 10:38 AM, Michal Wajdeczko wrote:
On 21.07.2021 18:11, Vinay Belgaumkar wrote:
Add methods for interacting with GuC for enabling SLPC. Enable
SLPC after GuC submission has been established. GuC load will
fail if SLPC cannot be successfully initialized. Add various
helper method
On 7/21/2021 10:26 AM, Michal Wajdeczko wrote:
On 21.07.2021 18:11, Vinay Belgaumkar wrote:
Allocate data structures for SLPC and functions for
initializing on host side.
v2: Address review comments (Michal W)
Signed-off-by: Vinay Belgaumkar
Signed-off-by: Sundaresan Sujaritha
---
dri
On 7/21/2021 10:42 AM, Michal Wajdeczko wrote:
On 21.07.2021 18:11, Vinay Belgaumkar wrote:
Add param set h2g helpers to set the min and max frequencies
for use by SLPC.
v2: Address review comments (Michal W)
Signed-off-by: Sundaresan Sujaritha
Signed-off-by: Vinay Belgaumkar
---
driv
On 7/21/2021 11:00 AM, Michal Wajdeczko wrote:
On 21.07.2021 18:11, Vinay Belgaumkar wrote:
Add helpers to read the min/max frequency being used
by SLPC. This is done by send a H2G command which forces
SLPC to update the shared data struct which can then be
read.
add note that functions w
On 7/21/2021 11:05 AM, Michal Wajdeczko wrote:
On 21.07.2021 18:11, Vinay Belgaumkar wrote:
This prints out relevant SLPC info from the SLPC shared structure.
We will send a h2g message which forces SLPC to update the
shared data structure with latest information before reading it.
v2: Ad
On 7/21/2021 11:09 AM, Michal Wajdeczko wrote:
On 21.07.2021 18:11, Vinay Belgaumkar wrote:
Cache rp0, rp1 and rpn platform limits into SLPC structure
for range checking while setting min/max frequencies.
Also add "soft" limits which keep track of frequency changes
made from userland. Thes
On 7/21/2021 11:13 AM, Michal Wajdeczko wrote:
On 21.07.2021 18:11, Vinay Belgaumkar wrote:
Update the get/set min/max freq hooks to work for
SLPC case as well. Consolidate helpers for requested/min/max
frequency get/set to intel_rps where the proper action can
be taken depending on whether
On 7/21/2021 11:21 AM, Michal Wajdeczko wrote:
On 21.07.2021 18:11, Vinay Belgaumkar wrote:
This feature hands over the control of HW RC6 to the GuC.
GuC decides when to put HW into RC6 based on it's internal
busyness algorithms.
GUCRC needs GuC submission to be enabled, and only
supported
On 7/27/2021 8:37 AM, Matt Roper wrote:
On Mon, Jul 26, 2021 at 12:08:00PM -0700, Vinay Belgaumkar wrote:
This feature hands over the control of HW RC6 to the GuC.
GuC decides when to put HW into RC6 based on it's internal
busyness algorithms.
GUCRC needs GuC submission to be enabled, and onl
On 7/27/2021 6:43 AM, Michal Wajdeczko wrote:
On 26.07.2021 21:07, Vinay Belgaumkar wrote:
Add macros to check for SLPC support. This feature is currently supported
for Gen12+ and enabled whenever GuC submission is enabled/selected.
Include templates for SLPC init/fini and enable.
v2: Move
On 7/27/2021 6:59 AM, Michal Wajdeczko wrote:
On 26.07.2021 21:07, Vinay Belgaumkar wrote:
Add constants and params that are needed to configure SLPC.
v2: Add a new abi header for SLPC. Replace bitfields with
genmasks. Address other comments from Michal W.
v3: Add slpc H2G format in abi, o
On 7/27/2021 8:12 AM, Michal Wajdeczko wrote:
On 26.07.2021 21:07, Vinay Belgaumkar wrote:
Add methods for interacting with GuC for enabling SLPC. Enable
SLPC after GuC submission has been established. GuC load will
fail if SLPC cannot be successfully initialized. Add various
helper methods
On 7/27/2021 1:19 PM, Michal Wajdeczko wrote:
On 27.07.2021 22:00, Belgaumkar, Vinay wrote:
On 7/27/2021 8:12 AM, Michal Wajdeczko wrote:
On 26.07.2021 21:07, Vinay Belgaumkar wrote:
Add methods for interacting with GuC for enabling SLPC. Enable
SLPC after GuC submission has been
On 7/27/2021 12:16 PM, Matthew Brost wrote:
On Mon, Jul 26, 2021 at 12:07:59PM -0700, Vinay Belgaumkar wrote:
Tests that exercise the SLPC get/set frequency interfaces.
Clamp_max will set max frequency to multiple levels and check
that SLPC requests frequency lower than or equal to it.
Clamp
On 7/27/2021 8:24 AM, Michal Wajdeczko wrote:
On 26.07.2021 21:07, Vinay Belgaumkar wrote:
Add param set h2g helpers to set the min and max frequencies
s/h2g/H2G
for use by SLPC.
v2: Address review comments (Michal W)
v3: Check for positive error code (Michal W)
Signed-off-by: Sundare
On 7/27/2021 3:44 PM, Matthew Brost wrote:
On Mon, Jul 26, 2021 at 12:07:48PM -0700, Vinay Belgaumkar wrote:
Also ensure uc_init is called before we initialize RPS so that we
can check for SLPC support. We do not need to enable up/down
interrupts when SLPC is enabled. However, we still need t
On 7/27/2021 8:32 AM, Michal Wajdeczko wrote:
On 26.07.2021 21:07, Vinay Belgaumkar wrote:
Add helpers to read the min/max frequency being used
by SLPC. This is done by send a H2G command which forces
SLPC to update the shared data struct which can then be
read. These helpers will be used i
On 7/27/2021 8:37 AM, Michal Wajdeczko wrote:
On 26.07.2021 21:07, Vinay Belgaumkar wrote:
This prints out relevant SLPC info from the SLPC shared structure.
We will send a h2g message which forces SLPC to update the
s/h2g/H2G
ok.
shared data structure with latest information before
On 7/27/2021 8:40 AM, Matthew Brost wrote:
On Mon, Jul 26, 2021 at 12:07:56PM -0700, Vinay Belgaumkar wrote:
This interrupt is enabled during RPS initialization, and
now needs to be done by SLPC code. It allows ARAT timer
expiry interrupts to get forwarded to GuC.
Signed-off-by: Vinay Belgau
On 7/27/2021 5:20 PM, Matthew Brost wrote:
On Mon, Jul 26, 2021 at 12:07:52PM -0700, Vinay Belgaumkar wrote:
The assumption when it was added was there would be no wakerefs
held. However, if we fail to enable SLPC, we will still be
holding a wakeref.
So this is if intel_guc_slpc_enable() f
On 7/27/2021 9:00 AM, Michal Wajdeczko wrote:
On 26.07.2021 21:07, Vinay Belgaumkar wrote:
Cache rp0, rp1 and rpn platform limits into SLPC structure
for range checking while setting min/max frequencies.
Also add "soft" limits which keep track of frequency changes
made from userland. These
On 7/27/2021 8:24 AM, Michal Wajdeczko wrote:
On 26.07.2021 21:07, Vinay Belgaumkar wrote:
Add param set h2g helpers to set the min and max frequencies
s/h2g/H2G
for use by SLPC.
v2: Address review comments (Michal W)
v3: Check for positive error code (Michal W)
Signed-off-by: Sundare
On 7/27/2021 9:59 AM, Michal Wajdeczko wrote:
On 26.07.2021 21:07, Vinay Belgaumkar wrote:
Update the get/set min/max freq hooks to work for
SLPC case as well. Consolidate helpers for requested/min/max
frequency get/set to intel_rps where the proper action can
be taken depending on whether
On 7/29/2021 9:21 AM, Michal Wajdeczko wrote:
On 28.07.2021 23:11, Vinay Belgaumkar wrote:
Cache rp0, rp1 and rpn platform limits into SLPC structure
for range checking while setting min/max frequencies.
Also add "soft" limits which keep track of frequency changes
made from userland. These
On 7/29/2021 4:40 PM, Matthew Brost wrote:
On Wed, Jul 28, 2021 at 02:11:43PM -0700, Vinay Belgaumkar wrote:
Tests that exercise the SLPC get/set frequency interfaces.
Clamp_max will set max frequency to multiple levels and check
that SLPC requests frequency lower than or equal to it.
Clamp_
On 7/10/2021 7:27 AM, Michal Wajdeczko wrote:
Hi Vinay,
On 10.07.2021 03:20, Vinay Belgaumkar wrote:
Add macros to check for slpc support. This feature is currently supported
for gen12+ and enabled whenever guc submission is enabled/selected.
please try to use consistent names across all p
On 7/10/2021 7:27 AM, Michal Wajdeczko wrote:
Hi Vinay,
On 10.07.2021 03:20, Vinay Belgaumkar wrote:
Add macros to check for slpc support. This feature is currently supported
for gen12+ and enabled whenever guc submission is enabled/selected.
please try to use consistent names across all p
On 7/10/2021 7:35 AM, Michal Wajdeczko wrote:
On 10.07.2021 03:20, Vinay Belgaumkar wrote:
Declare header and source files for SLPC, along with init and
enable/disable function templates.
later you claim that "disable" is not needed
Changed.
Signed-off-by: Vinay Belgaumkar
Signed-o
On 7/10/2021 8:52 AM, Michal Wajdeczko wrote:
On 10.07.2021 03:20, Vinay Belgaumkar wrote:
Replicate the SLPC header file in GuC for the most part. There are
what you mean by "replicate" here?
some SLPC mode based parameters which haven't been included since
we are not using them.
Signe
On 7/10/2021 9:05 AM, Michal Wajdeczko wrote:
On 10.07.2021 03:20, Vinay Belgaumkar wrote:
Allocate data structures for SLPC and functions for
initializing on host side.
Signed-off-by: Vinay Belgaumkar
Signed-off-by: Sundaresan Sujaritha
---
drivers/gpu/drm/i915/gt/uc/intel_guc.c |
On 7/10/2021 10:37 AM, Michal Wajdeczko wrote:
On 10.07.2021 03:20, Vinay Belgaumkar wrote:
Add methods for interacting with guc for enabling SLPC. Enable
SLPC after guc submission has been established. GuC load will
s/guc/GuC
fail if SLPC cannot be successfully initialized. Add various
On 7/10/2021 10:47 AM, Michal Wajdeczko wrote:
On 10.07.2021 03:20, Vinay Belgaumkar wrote:
Add param set h2g helpers to set the min and max frequencies
for use by SLPC.
Signed-off-by: Sundaresan Sujaritha
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
On 7/10/2021 11:15 AM, Michal Wajdeczko wrote:
On 10.07.2021 03:20, Vinay Belgaumkar wrote:
Cache rp0, rp1 and rpn platform limits into slpc structure
for range checking while setting min/max frequencies.
Also add "soft" limits which keep track of frequency changes
made from userland. Thes
On 6/17/2022 1:53 PM, Dixit, Ashutosh wrote:
On Fri, 17 Jun 2022 13:25:34 -0700, Vinay Belgaumkar wrote:
We have seen multiple RC6 issues where it is useful to know
which global forcewake bits are set. Add this to the 'drpc'
debugfs output.
A couple of optional nits below to look at but other
On 6/21/2022 5:26 PM, Dixit, Ashutosh wrote:
On Sat, 14 May 2022 23:05:06 -0700, Vinay Belgaumkar wrote:
SLPC min/max frequency updates require H2G calls. We are seeing
timeouts when GuC channel is backed up and it is unable to respond
in a timely fashion causing warnings and affecting CI.
Th
On 6/22/2022 1:32 PM, Dixit, Ashutosh wrote:
On Fri, 10 Jun 2022 16:47:12 -0700, Vinay Belgaumkar wrote:
This test will validate we can achieve actual frequency of RP0. Pcode
grants frequencies based on what GuC is requesting. However, thermal
throttling can limit what is being granted. Add a
On 6/24/2022 8:59 PM, Dixit, Ashutosh wrote:
On Thu, 23 Jun 2022 16:33:20 -0700, Vinay Belgaumkar wrote:
+static int max_granted_freq(struct intel_guc_slpc *slpc, struct intel_rps
*rps, u32 *max_act_freq)
+{
+ struct intel_gt *gt = rps_to_gt(rps);
+ u32 perf_limit_reasons;
+
On 6/24/2022 8:59 PM, Dixit, Ashutosh wrote:
On Thu, 23 Jun 2022 16:21:46 -0700, Belgaumkar, Vinay wrote:
On 6/22/2022 1:32 PM, Dixit, Ashutosh wrote:
On Fri, 10 Jun 2022 16:47:12 -0700, Vinay Belgaumkar wrote:
This test will validate we can achieve actual frequency of RP0. Pcode
grants
On 6/24/2022 8:59 PM, Dixit, Ashutosh wrote:
On Thu, 23 Jun 2022 16:33:20 -0700, Vinay Belgaumkar wrote:
+static int max_granted_freq(struct intel_guc_slpc *slpc, struct intel_rps
*rps, u32 *max_act_freq)
+{
+ struct intel_gt *gt = rps_to_gt(rps);
+ u32 perf_limit_reasons;
+
From: Patchwork
Sent: Monday, June 27, 2022 10:00 PM
To: Belgaumkar, Vinay
Cc: intel-gfx@lists.freedesktop.org
Subject: ✗ Fi.CI.BAT: failure for drm/i915/guc/slpc: Add a new SLPC selftest
(rev4)
Patch Details
Series:
drm/i915/guc/slpc: Add a new SLPC selftest (rev4)
URL:
https
On 5/5/2022 5:13 AM, Tvrtko Ursulin wrote:
On 05/05/2022 06:40, Vinay Belgaumkar wrote:
SLPC min/max frequency updates require H2G calls. We are seeing
timeouts when GuC channel is backed up and it is unable to respond
in a timely fashion causing warnings and affecting CI.
Is it the "Unable
On 5/6/2022 12:18 AM, Tvrtko Ursulin wrote:
On 05/05/2022 19:36, John Harrison wrote:
On 5/5/2022 10:21, Belgaumkar, Vinay wrote:
On 5/5/2022 5:13 AM, Tvrtko Ursulin wrote:
On 05/05/2022 06:40, Vinay Belgaumkar wrote:
SLPC min/max frequency updates require H2G calls. We are seeing
On 5/6/2022 9:43 AM, John Harrison wrote:
On 5/6/2022 00:18, Tvrtko Ursulin wrote:
On 05/05/2022 19:36, John Harrison wrote:
On 5/5/2022 10:21, Belgaumkar, Vinay wrote:
On 5/5/2022 5:13 AM, Tvrtko Ursulin wrote:
On 05/05/2022 06:40, Vinay Belgaumkar wrote:
SLPC min/max frequency updates
On 8/14/2022 4:46 PM, Vinay Belgaumkar wrote:
Host Turbo operates at efficient frequency when GT is not idle unless
the user or workload has forced it to a higher level. Replicate the same
behavior in SLPC by allowing the algorithm to use efficient frequency.
We had disabled it during boot due
On 8/15/2022 9:51 AM, Rodrigo Vivi wrote:
On Tue, Aug 09, 2022 at 05:03:06PM -0700, Vinay Belgaumkar wrote:
Host Turbo operates at efficient frequency when GT is not idle unless
the user or workload has forced it to a higher level. Replicate the same
behavior in SLPC by allowing the algorithm
On 8/15/2022 10:32 AM, Rodrigo Vivi wrote:
On Sun, Aug 14, 2022 at 04:46:54PM -0700, Vinay Belgaumkar wrote:
Host Turbo operates at efficient frequency when GT is not idle unless
the user or workload has forced it to a higher level. Replicate the same
behavior in SLPC by allowing the algorithm
On 4/13/2022 11:41 PM, Anshuman Gupta wrote:
On 2022-04-13 at 04:18:52 +0530, Vinay Belgaumkar wrote:
This will ensure we don't have false positives when we run
error injection tests.
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 42 ++---
On 11/17/2021 2:49 PM, Vinay Belgaumkar wrote:
From: Chris Wilson
Currently, we inspect each engine individually and measure the occupancy
of that engine over the last evaluation interval. If that exceeds our
busyness thresholds, we decide to increase the GPU frequency. However,
under a load
On 11/17/2021 2:49 PM, Vinay Belgaumkar wrote:
From: Chris Wilson
While the power consumption is proportional to the frequency, there is
also a static draw for active gates. The longer we are able to powergate
(rc6), the lower the static draw. Thus there is a sweetspot in the
frequency/power
On 2/17/2022 1:41 AM, Tvrtko Ursulin wrote:
On 16/02/2022 18:15, Vinay Belgaumkar wrote:
SLPC unset param H2G only needs one parameter - the id of the
param.
Fixes: 025cb07bebfa ("drm/i915/guc/slpc: Cache platform frequency
limits")
How serious is this? Does it need backporting? If so:
C
On 1/20/2022 11:40 AM, Patchwork wrote:
Project List - Patchwork *Patch Details*
*Series:* drm/i915/selftests: Don't restart WL for every frequency step
*URL:* https://patchwork.freedesktop.org/series/99109/
*State:*failure
*Details:*
https://intel-gfx-ci.01.org/tree/drm-tip/Patc
On 1/20/2022 2:24 PM, Daniele Ceraolo Spurio wrote:
Starting from xehpsdv, bit 0 of of the GuC shim control register has
been repurposed, while bit 2 is now reserved, so we need to avoid
setting those for their old meaning on newer platforms.
Cc: Vinay Belgaumkar
Cc: Stuart Summers
Signed-of
On 4/3/2018 3:52 AM, kevin.rogo...@intel.com wrote:
From: Kevin Rogovin
Add a narration to i915.rst about Intel GEN GPU's: engines,
driver context and relocation.
Signed-off-by: Kevin Rogovin
---
Documentation/gpu/i915.rst | 116
drivers/gpu/
Message-
From: Tvrtko Ursulin [mailto:tvrtko.ursu...@linux.intel.com]
Sent: Wednesday, December 9, 2015 5:36 AM
To: Thierry, Michel; Chris Wilson; Daniel, Thomas;
intel-gfx@lists.freedesktop.org; Belgaumkar, Vinay; Goel, Akash; Kristian
Høgsberg
Subject: Re: [Intel-gfx] [PATCH v7] drm/i915: Add
On Thu, Dec 10, 2015 at 04:43:29PM +, Tvrtko Ursulin wrote:
>
> Hi,
>
> On 10/12/15 14:58, Mika Kuoppala wrote:
> >We get build error as we try to cast from ptr to integer
> >of different size on 32 bit platforms. Use unsigned long
> >as the cast, it will work with both 32 and 64 bit
> >syste
-Original Message-
From: Tvrtko Ursulin [mailto:tvrtko.ursu...@linux.intel.com]
Sent: Wednesday, February 24, 2016 5:18 AM
To: Belgaumkar, Vinay ;
intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH i-g-t] tests/gem_buffered_svm: Buffered SVM
tests
Hi,
On 10/02/16 18:01
6:46 AM
To: Belgaumkar, Vinay
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH i-g-t] tests/gem_buffered_svm_test: New tests
for buffered SVM feature
On Tue, Nov 10, 2015 at 07:37:54AM -0800, Vinay Belgaumkar wrote:
> v1: These tests exercise the userptr ioctl to create shared
-Original Message-
From: Thierry, Michel
Sent: Tuesday, January 5, 2016 10:02 AM
To: Belgaumkar, Vinay
Subject: RE: [Intel-gfx] [PATCH i-g-t] tests/gem_softpin: Use offset addresses
in canonical form
> -Original Message-
> From: Intel-gfx [mailto:intel-gf
On Wed, Jan 06, 2016 at 03:00:39PM +, Michel Thierry wrote:
> i915 validates that requested offset is in canonical form, so tests need
> to convert the offsets as required.
>
> Also add test to verify non-canonical 48-bit address will be rejected.
>
> v2: Use sign_extend64 for converting to c
Hi Chris,
These tests were developed for testing buffered SVM(using userptr and soft
pinning API). I think Dan wanted me to rename the tests to gem_softpin, since
they were being checked in as tests which validated the softpin kernel patches.
Can we rename the existing tests to gem_buffered_
etter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter
Sent: Tuesday, January 26, 2016 2:06 AM
To: Barnes, Jesse
Cc: Daniel Vetter; Belgaumkar, Vinay; Chris Wilson;
intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH igt] igt/gem_softpin: Remove false dependencies
on esoteric feature
On 6/22/2017 4:30 AM, Petri Latvala wrote:
The current documentation for tests is limited to a single string per
test binary. This patch adds support for documenting individual
subtests.
The syntax for subtest documentation is:
igt_subtest_documentation("Frob knobs to see if one of the "
On 10/11/2017 4:23 PM, Daniele Ceraolo Spurio wrote:
On 11/10/17 14:31, Vinay Belgaumkar wrote:
This limitation does not exist in latest kernel. It was removed by
this patch-
commit f7978a0c581a8a840a28306f8da43e06e7fef3bf
v2: Added commit id that removes the limitation(Chris Wilson)
V3: G
Bump.
On 7/11/2017 3:08 PM, Belgaumkar, Vinay wrote:
On 6/22/2017 4:30 AM, Petri Latvala wrote:
The current documentation for tests is limited to a single string per
test binary. This patch adds support for documenting individual
subtests.
The syntax for subtest documentation is
On 8/9/2017 7:32 AM, Arkadiusz Hiler wrote:
On Tue, Aug 08, 2017 at 03:09:00PM -0700, Vinay Belgaumkar wrote:
This is an RFC for adding documentation to IGT subtests. Each subtest can have
something similar to a WHAT - explaining what the subtest actually does,
and a WHY - which explains a use
On 8/9/2017 4:40 AM, Petri Latvala wrote:
The current documentation for tests is limited to a single string per
test binary. This patch adds support for documenting individual
subtests.
The syntax for subtest documentation is:
igt_document_subtest("Frob knobs to see if one of the "
On 8/10/2017 1:32 AM, Arkadiusz Hiler wrote:
On Wed, Aug 09, 2017 at 10:00:16AM -0700, Belgaumkar, Vinay wrote:
On 8/9/2017 7:32 AM, Arkadiusz Hiler wrote:
On Tue, Aug 08, 2017 at 03:09:00PM -0700, Vinay Belgaumkar wrote:
This is an RFC for adding documentation to IGT subtests. Each
On 8/10/2017 3:26 AM, Petri Latvala wrote:
The current documentation for tests is limited to a single string per
test binary. This patch adds support for documenting individual
subtests.
The syntax for subtest documentation is:
igt_document_subtest("Frob knobs to see if one of the "
On 8/10/2017 3:26 AM, Petri Latvala wrote:
testdisplay has no subtests so hook them to existing subtest handling.
Signed-off-by: Petri Latvala
---
tests/testdisplay.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tests/testdisplay.c b/tests/testdisplay.c
index f2a41fa..85b118f 1006
On 8/10/2017 3:26 AM, Petri Latvala wrote:
Signed-off-by: Petri Latvala
---
tests/igt_command_line.sh | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/tests/igt_command_line.sh b/tests/igt_command_line.sh
index 7f80fc8..b3a794c 100755
--- a/tests/igt_command_
On 8/30/2017 4:12 AM, Michał Winiarski wrote:
On Tue, Aug 29, 2017 at 02:25:19PM -0700, Vinay Belgaumkar wrote:
Added the missing IGT_TEST_DESCRIPTION and some subtest
descriptions.
Signed-off-by: Vinay Belgaumkar
---
tests/gem_flink_basic.c | 36
1 fi
On 8/30/2017 12:39 PM, Michał Winiarski wrote:
On Wed, Aug 30, 2017 at 10:49:20AM -0700, Belgaumkar, Vinay wrote:
On 8/30/2017 4:12 AM, Michał Winiarski wrote:
On Tue, Aug 29, 2017 at 02:25:19PM -0700, Vinay Belgaumkar wrote:
Added the missing IGT_TEST_DESCRIPTION and some subtest
On 9/4/2017 1:30 AM, Daniel Vetter wrote:
On Thu, Aug 31, 2017 at 02:33:23PM -0700, Vinay Belgaumkar wrote:
Added the missing IGT_TEST_DESCRIPTION and some subtest
descriptions. Trying to establish a method to document
subtests, it should describe the feature being tested
rather than how. The
On 9/1/2017 4:55 AM, Arkadiusz Hiler wrote:
On Thu, Aug 31, 2017 at 02:33:23PM -0700, Vinay Belgaumkar wrote:
Added the missing IGT_TEST_DESCRIPTION and some subtest
descriptions. Trying to establish a method to document
Hey Vinay,
Please add appropriate tag to the subject, as this is clear
On 9/7/2017 5:15 AM, Katarzyna Dec wrote:
Added comments in tricky places for better feature understanding.
Added IGT_TEST_DESCRIPTION and short description for non-obvious
subtests.
Changed name of 'magic' checkit() function to something meaningfull.
Changed junk struct and stuff array names.
On 9/8/2017 12:19 AM, Katarzyna Dec wrote:
On Thu, Sep 07, 2017 at 11:28:38AM -0700, Belgaumkar, Vinay wrote:
On 9/7/2017 5:15 AM, Katarzyna Dec wrote:
Added comments in tricky places for better feature understanding.
Added IGT_TEST_DESCRIPTION and short description for non-obvious
On 1/15/2018 2:38 AM, Tvrtko Ursulin wrote:
On 11/01/2018 19:17, Daniele Ceraolo Spurio wrote:
On 10/01/18 02:12, Chris Wilson wrote:
Quoting Paulo Zanoni (2018-01-09 23:23:17)
From: Tvrtko Ursulin
Since it is not possible to mask individual engine instances
and they are all permanently
On 2/1/2018 3:58 PM, Belgaumkar, Vinay wrote:
On 1/15/2018 2:38 AM, Tvrtko Ursulin wrote:
On 11/01/2018 19:17, Daniele Ceraolo Spurio wrote:
On 10/01/18 02:12, Chris Wilson wrote:
Quoting Paulo Zanoni (2018-01-09 23:23:17)
From: Tvrtko Ursulin
Since it is not possible to mask
On 2/10/2018 1:00 AM, Chris Wilson wrote:
We run the per-engine scheduling smoketests across all engines, the
opposite of what was intended!
Signed-off-by: Chris Wilson
---
tests/gem_exec_schedule.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/tests/gem_
On 8/10/2023 5:22 PM, Rodrigo Vivi wrote:
On Wed, Aug 02, 2023 at 12:41:09AM +, Belgaumkar, Vinay wrote
On 8/14/2023 12:24 AM, Riana Tauro wrote:
Hi Vinay
On 8/9/2023 6:20 AM, Vinay Belgaumkar wrote:
Register read for requested_freq can return 0 when system is
in runtime_pm. Make allowance for this case.
Link: https://gitlab.freedesktop.org/drm/intel/issues/8736
Link: https://gitlab.freedeskto
On 4/14/2023 11:10 AM, Dixit, Ashutosh wrote:
On Thu, 13 Apr 2023 15:44:12 -0700, Vinay Belgaumkar wrote:
Use default of 0 where GT id is not being used.
Signed-off-by: Vinay Belgaumkar
---
lib/igt_pm.c | 20 ++--
lib/igt_pm.h | 2 +-
tests/i915/i
On 4/14/2023 4:49 PM, Dixit, Ashutosh wrote:
On Fri, 14 Apr 2023 15:34:15 -0700, Vinay Belgaumkar wrote:
@@ -457,6 +458,34 @@ int intel_guc_slpc_get_max_freq(struct intel_guc_slpc
*slpc, u32 *val)
return ret;
}
+int intel_guc_slpc_set_ignore_eff_freq(struct intel_guc_slpc *slpc, bo
On 4/14/2023 1:25 PM, Dixit, Ashutosh wrote:
On Fri, 14 Apr 2023 12:16:37 -0700, Vinay Belgaumkar wrote:
Hi Vinay,
Use default of 0 where GT id is not being used.
v2: Add a helper for GT 0 (Ashutosh)
Signed-off-by: Vinay Belgaumkar
---
lib/igt_pm.c | 36 ++
On 4/17/2023 6:39 PM, Andi Shyti wrote:
Hi Vinay,
Looks good, just few minor comments below,
[...]
@@ -267,13 +267,11 @@ static int run_test(struct intel_gt *gt, int test_type)
}
/*
-* Set min frequency to RPn so that we can test the whole
-* range of RPn-RP0.
On 4/14/2023 1:25 PM, Dixit, Ashutosh wrote:
On Fri, 14 Apr 2023 12:16:37 -0700, Vinay Belgaumkar wrote:
Hi Vinay,
Use default of 0 where GT id is not being used.
v2: Add a helper for GT 0 (Ashutosh)
Signed-off-by: Vinay Belgaumkar
---
lib/igt_pm.c | 36 ++
On 4/25/2023 6:40 PM, Patchwork wrote:
Project List - Patchwork *Patch Details*
*Series:* series starting with [v6,1/2] drm/i915/guc/slpc: Provide
sysfs for efficient freq
*URL:* https://patchwork.freedesktop.org/series/116957/
*State:*failure
*Details:*
https://intel-gfx-ci.01.org/
On 4/26/2023 6:13 PM, Patchwork wrote:
Project List - Patchwork *Patch Details*
*Series:* series starting with [v6,1/2] drm/i915/guc/slpc: Provide
sysfs for efficient freq (rev2)
*URL:* https://patchwork.freedesktop.org/series/116957/
*State:*failure
*Details:*
https://intel-gfx-ci.
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