Obj flags for shmem objects is not being set correctly.
Cc: Matthew Auld
Signed-off-by: Aravind Iddamsetty
---
drivers/gpu/drm/i915/gem/i915_gem_shmem.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
b/drivers/gpu/drm/i915/gem
ko Ursulin
Reviewed-by: Matthew Auld
Signed-off-by: Aravind Iddamsetty
---
drivers/gpu/drm/i915/gem/i915_gem_shmem.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
index 114443096841..37
which includes
setting the "lmem" bit on page table entries). We use the term
"local stolen memory" to refer to this model.
Cc: Matt Roper
Cc: Lucas De Marchi
Signed-off-by: CQ Tang
Signed-off-by: Aravind Iddamsetty
Original-author: CQ Tang
---
drivers/gpu/drm/i915/ge
as GEN12_LMEM_BAR (Lucas)
Cc: Matt Roper
Cc: Lucas De Marchi
Signed-off-by: CQ Tang
Signed-off-by: Aravind Iddamsetty
Original-author: CQ Tang
---
drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 88 ++
drivers/gpu/drm/i915/gt/intel_ggtt.c | 2 +-
drivers/gpu/drm/i915/i
as GEN12_LMEM_BAR (Lucas)
v3:(Jani)
1. rename get_mtl_gms_size to mtl_get_gms_size
2. define register for MMIO address
Cc: Matt Roper
Cc: Lucas De Marchi
Cc: Jani Nikula
Signed-off-by: CQ Tang
Signed-off-by: Aravind Iddamsetty
Original-author: CQ Tang
---
drivers/gpu/drm/i915/g
as GEN12_LMEM_BAR (Lucas)
v3:(Jani)
1. rename get_mtl_gms_size to mtl_get_gms_size
2. define register for MMIO address
Cc: Matt Roper
Cc: Lucas De Marchi
Cc: Jani Nikula
Signed-off-by: CQ Tang
Signed-off-by: Aravind Iddamsetty
Original-author: CQ Tang
---
drivers/gpu/drm/i915/g
d-off-by: CQ Tang
Signed-off-by: Aravind Iddamsetty
Original-author: CQ Tang
---
drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 83 ++
drivers/gpu/drm/i915/gt/intel_ggtt.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h| 3 +
drivers/gpu/drm/i915/i915_reg.h
ikula
Signed-off-by: CQ Tang
Signed-off-by: Aravind Iddamsetty
Original-author: CQ Tang
---
drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 83 ++
drivers/gpu/drm/i915/gt/intel_ggtt.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h| 3 +
drivers/gpu/drm/i915/i915_re
From: Pallavi Mishra
Caching mode for an object shall be selected via upcoming VM_BIND
interface.
Cc: Lucas De Marchi
Cc: Matt Roper
Cc: Joonas Lahtinen
Signed-off-by: Pallavi Mishra
Signed-off-by: Aravind Iddamsetty
---
drivers/gpu/drm/i915/gem/i915_gem_domain.c | 3 +++
1 file changed
Signed-off-by: Fei Yang
Signed-off-by: Aravind Iddamsetty
---
drivers/gpu/drm/i915/display/intel_dpt.c | 2 +-
drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 43
drivers/gpu/drm/i915/gt/gen8_ppgtt.h | 4 +++
drivers/gpu/drm/i915/gt/intel_ggtt.c | 36
: Madhumitha Tolakanahalli Pradeep
Signed-off-by: Aravind Iddamsetty
---
drivers/gpu/drm/i915/gt/intel_gtt.c | 23 +++-
drivers/gpu/drm/i915/gt/intel_gtt.h | 9 +++
drivers/gpu/drm/i915/gt/intel_mocs.c| 76 +++--
drivers/gpu/drm/i915/gt/selftest_mocs.c | 2
: Madhumitha Tolakanahalli Pradeep
Signed-off-by: Aravind Iddamsetty
---
drivers/gpu/drm/i915/gt/intel_gtt.c | 23 +++-
drivers/gpu/drm/i915/gt/intel_gtt.h | 9 +++
drivers/gpu/drm/i915/gt/intel_mocs.c| 76 +++--
drivers/gpu/drm/i915/gt/selftest_mocs.c | 2
New platforms will use different encode functions.
Cc: Lucas De Marchi
Cc: Matt Roper
Signed-off-by: Aravind Iddamsetty
---
drivers/gpu/drm/i915/display/intel_dpt.c | 2 +-
drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 10 +-
drivers/gpu/drm/i915/gt/intel_ggtt.c | 4 ++--
3 files
Signed-off-by: Fei Yang
Signed-off-by: Aravind Iddamsetty
---
drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 33 +++-
drivers/gpu/drm/i915/gt/gen8_ppgtt.h | 4
drivers/gpu/drm/i915/gt/intel_ggtt.c | 32 ++-
drivers/gpu/drm/i915/gt/intel_gtt.h | 13
oonas Lahtinen
Signed-off-by: Pallavi Mishra
Signed-off-by: Aravind Iddamsetty
---
drivers/gpu/drm/i915/gem/i915_gem_domain.c | 4 ++--
include/uapi/drm/i915_drm.h| 3 +++
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
b/dr
On XE_LPM+ platforms the media engines are carved out into a separate
GT but have a common GGTMMADR address range which essentially makes
the GGTT address space to be shared between media and render GT.
BSPEC: 63834
Cc: Matt Roper
Signed-off-by: Aravind Iddamsetty
---
drivers/gpu/drm/i915/gt
ggtt->gt_list, as suggested
by Lucas
3. as ggtt_flush() is used only for ggtt drop i915_is_ggtt check within
it.
4. setup_private_pat moved out of intel_gt_tiles_init
Cc: Matt Roper
Signed-off-by: Aravind Iddamsetty
---
drivers/gpu/drm/i915/gt/intel_ggtt.c | 47 ++---
dri
ggtt->gt_list, as suggested
by Lucas
3. as ggtt_flush() is used only for ggtt drop i915_is_ggtt check within
it.
4. setup_private_pat moved out of intel_gt_tiles_init
v3:
1. Move out for_each_gt from i915_driver.c (Jani Nikula)
Cc: Matt Roper
Signed-off-by: Aravind Iddamsetty
---
drivers/gpu/
list
(Matt Roper)
Cc: Matt Roper
Signed-off-by: Aravind Iddamsetty
---
drivers/gpu/drm/i915/gt/intel_ggtt.c | 54 +--
drivers/gpu/drm/i915/gt/intel_gt.c| 13 +-
drivers/gpu/drm/i915/gt/intel_gt_types.h | 3 ++
drivers/gpu/drm/i915/gt/intel_gtt.h
On 02/09/24 13:18, Raag Jadav wrote:
> Now that we have device wedged event supported by DRM core, make use
> of it. With this in place, userspace will be notified of wedged device
> on gt reset failure.
>
> Signed-off-by: Raag Jadav
> ---
> drivers/gpu/drm/i915/gt/intel_reset.c | 2 ++
> 1 fil
On 02/09/24 13:18, Raag Jadav wrote:
This patch looks entirely new from what was sent earlier
so you could send it as a fresh patch.
Thanks,
Aravind,
> From: Himal Prasad Ghimiray
>
> This was previously attempted as xe specific reset uevent but dropped
> in commit 77a0d4d1cea2 ("drm/xe/uapi:
On 02/09/24 13:18, Raag Jadav wrote:
> Introduce device wedged event, which will notify userspace of wedged
> (hanged/unusable) state of the DRM device through a uevent. This is
> useful especially in cases where the device is in unrecoverable state
> and requires userspace intervention for recov
On 17/09/24 13:33, Ghimiray, Himal Prasad wrote:
>
>
> On 17-09-2024 12:08, Raag Jadav wrote:
>> On Tue, Sep 17, 2024 at 10:11:05AM +0530, Ghimiray, Himal Prasad wrote:
>>> On 17-09-2024 09:32, Raag Jadav wrote:
This was previously attempted as xe specific reset uevent but dropped
in co
On 22/11/24 21:32, Raag Jadav wrote:
> On Fri, Nov 22, 2024 at 11:09:32AM +0100, Christian König wrote:
>> Am 22.11.24 um 08:07 schrieb Raag Jadav:
>>> On Mon, Nov 18, 2024 at 08:26:37PM +0530, Aravind Iddamsetty wrote:
>>>> On 15/11/24 10:37, Raag Jadav wrote:
> + else
> + drm_dev_wedged_event(>->i915->drm,
> + DRM_WEDGE_RECOVERY_REBIND |
> DRM_WEDGE_RECOVERY_BUS_RESET);
Reviewed-by: Aravind Iddamsetty
Thanks,
Aravind.
> }
>
> /**
.0/:03:00.0/drm/card0
> SUBSYSTEM=drm
> WEDGED=rebind,bus-reset
> DEVNAME=/dev/dri/card0
> DEVTYPE=drm_minor
> SEQNUM=5208
> MAJOR=226
> MINOR=0
LGTM.
Reviewed-by: Aravind Iddamsetty
Thanks,
Aravind.
>
> v2: Change authorship to Himal (Aravind)
> Add uevent fo
On 15/11/24 10:37, Raag Jadav wrote:
> Introduce device wedged event, which notifies userspace of 'wedged'
> (hanged/unusable) state of the DRM device through a uevent. This is
> useful especially in cases where the device is no longer operating as
> expected and has become unrecoverable from dri
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