ious version.
v4: Added support for RGB->YCBCR conversion through PCON
v5: Addressed review comments on previous version.
Ankit Nautiyal (11):
drm/edid: Parse DSC1.2 cap fields from HFVSDB block
drm/dp_helper: Add Helpers for FRL Link Training support for
DP-HDMI2.1 PCON
drm/dp_help
that are required for
HDMI2.1.
v2: Minor fixes + consistent naming for DPCD register masks
(Uma Shankar)
Signed-off-by: Sharma, Swati2
Signed-off-by: Ankit Nautiyal
Reviewed-by: Uma Shankar
---
include/drm/drm_edid.h | 30 ++
1 file changed, 30 insertions(+)
diff
Shankar)
Signed-off-by: Sharma, Swati2
Signed-off-by: Ankit Nautiyal
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/drm_edid.c | 44 +
include/drm/drm_connector.h | 6 +
2 files changed, 50 insertions(+)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu
:
-Added a new struct for hdmi dsc cap
-Fixed bugs in macros usage.
Signed-off-by: Ankit Nautiyal
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/drm_edid.c | 59 +
include/drm/drm_connector.h | 43 +++
2 files changed, 102 insertions
argument supplied to a drm helper function.
-fixed return value for max frl read from pcon.
v3: Removed DPCD 0x3035 for MAX Sink FRL b/w as per new version of spec.
Signed-off-by: Ankit Nautiyal
Reviewed-by: Uma Shankar (v2)
---
drivers/gpu/drm/drm_dp_helper.c | 263
suggested by Uma Shankar.
v3: Only setting the DSC bits for the Protocol Convertor control
registers, avoiding overwritining color conversion bits.
Signed-off-by: Ankit Nautiyal
Reviewed-by: Uma Shankar (v2)
---
drivers/gpu/drm/drm_dp_helper.c | 203
include/drm
might
help in debugging the link failure issues.
v2: Addressed comments from Uma Shankar:
-rephrased the commit message, as per the code.
-fixed styling issues
-added documentation for the helper function.
Signed-off-by: Swati Sharma
Signed-off-by: Ankit Nautiyal
Reviewed-by: Uma Shankar
---
dr
ded spec details for the new cap for color conversion. (Uma Shankar)
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/drm_dp_helper.c | 61 +
include/drm/drm_dp_helper.h | 19 +-
2 files changed, 79 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/
target bw and pcon frl bw to avoid roundup errors.
-minor modification of field names and comments.
Signed-off-by: Ankit Nautiyal
Reviewed-by: Uma Shankar
---
.../drm/i915/display/intel_display_types.h| 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 30 +--
2 files
after FEC READY, before
starting DP link training.
v3: rebase
Signed-off-by: Ankit Nautiyal
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_ddi.c | 2 ++
drivers/gpu/drm/i915/display/intel_dp.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/display
cture initialization to intel_dp_init_connector().
v4: Fixed typo in initialization of frl structure.
v5: Always use FRL if its possible, instead of enabling only for
higher modes as done in v3.
Signed-off-by: Ankit Nautiyal
Reviewed-by: Uma Shankar (v2)
---
.../drm/i915/display/intel_display_types.h
)
v3: Rearranged code to re-start FRL link training or fall back to
TMDS mode.
v4: Resused function to check frl which inturn restarts FRL and
fallback to TMDS mode.
Signed-off-by: Swati Sharma
Signed-off-by: Ankit Nautiyal
Reviewed-by: Uma Shankar (v2)
---
drivers/gpu/drm/i915/display
calculate these PPS paremeters as
per the HDMI2.1 specification.
v2: Addressed review comments given by Uma Shankar:
-added documentation for functions
-fixed typos and errors
Signed-off-by: Ankit Nautiyal
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 233
override the existing PPS-metadata, by either
writing the entire new PPS metadata, or by writing only the
PPS override parameters.
v2: Restructured the code to read all capability DPCDs at once and store
in an array in intel_dp structure.
v3: rebase
Signed-off-by: Ankit Nautiyal
Reviewed-by: Uma
y consider non-zero DSC FRL b/w for determining max FRL b/w
supported by sink.
Signed-off-by: Ankit Nautiyal
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_ddi.c | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 118 ++-
drivers/gpu/drm/i915/display/intel_d
display' in commit message.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_ddi.c | 3 +-
.../drm/i915/display/intel_display_types.h| 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 68 +++
drivers/gpu/drm/i915/display/intel_dp.h
display' in commit message.
v3: Fixed typo in condition for printing one of the error msg.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_ddi.c | 3 +-
.../drm/i915/display/intel_display_types.h| 1 +
drivers/gpu/drm/i915/display/intel
ious version.
v4: Added support for RGB->YCBCR conversion through PCON
v5: Addressed review comments on previous version.
v6: Fix typo in one of the patch.
v7: Rebased on latest drm-tip and addressed the review comments.
Ankit Nautiyal (11):
drm/edid: Parse DSC1.2 cap fields from HFVSDB bloc
that are required for
HDMI2.1.
v2: Minor fixes + consistent naming for DPCD register masks
(Uma Shankar)
Signed-off-by: Sharma, Swati2
Signed-off-by: Ankit Nautiyal
Reviewed-by: Uma Shankar
---
include/drm/drm_edid.h | 30 ++
1 file changed, 30 insertions(+)
diff
Shankar)
Signed-off-by: Sharma, Swati2
Signed-off-by: Ankit Nautiyal
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/drm_edid.c | 44 +
include/drm/drm_connector.h | 6 +
2 files changed, 50 insertions(+)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu
:
-Added a new struct for hdmi dsc cap
-Fixed bugs in macros usage.
Signed-off-by: Ankit Nautiyal
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/drm_edid.c | 59 +
include/drm/drm_connector.h | 43 +++
2 files changed, 102 insertions
argument supplied to a drm helper function.
-fixed return value for max frl read from pcon.
v3: Removed DPCD 0x3035 for MAX Sink FRL b/w as per new version of spec.
Signed-off-by: Ankit Nautiyal
Reviewed-by: Uma Shankar (v2)
---
drivers/gpu/drm/drm_dp_helper.c | 263
might
help in debugging the link failure issues.
v2: Addressed comments from Uma Shankar:
-rephrased the commit message, as per the code.
-fixed styling issues
-added documentation for the helper function.
Signed-off-by: Swati Sharma
Signed-off-by: Ankit Nautiyal
Reviewed-by: Uma Shankar
---
dr
suggested by Uma Shankar.
v3: Only setting the DSC bits for the Protocol Convertor control
registers, avoiding overwritining color conversion bits.
Signed-off-by: Ankit Nautiyal
Reviewed-by: Uma Shankar (v2)
---
drivers/gpu/drm/drm_dp_helper.c | 203
include/drm
ded spec details for the new cap for color conversion. (Uma Shankar)
Signed-off-by: Ankit Nautiyal
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/drm_dp_helper.c | 61 +
include/drm/drm_dp_helper.h | 19 +-
2 files changed, 79 insertions(+), 1 delet
target bw and pcon frl bw to avoid roundup errors.
-minor modification of field names and comments.
Signed-off-by: Ankit Nautiyal
Reviewed-by: Uma Shankar
---
.../drm/i915/display/intel_display_types.h| 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 30 +--
2 files
cture initialization to intel_dp_init_connector().
v4: Fixed typo in initialization of frl structure.
v5: Always use FRL if its possible, instead of enabling only for
higher modes as done in v3.
Signed-off-by: Ankit Nautiyal
Reviewed-by: Uma Shankar (v2)
---
.../drm/i915/display/intel_display_types.h
)
v3: Rearranged code to re-start FRL link training or fall back to
TMDS mode.
v4: Resused function to check frl which inturn restarts FRL and
fallback to TMDS mode.
Signed-off-by: Swati Sharma
Signed-off-by: Ankit Nautiyal
Reviewed-by: Uma Shankar (v2)
---
drivers/gpu/drm/i915/display
after FEC READY, before
starting DP link training.
v3: rebase
Signed-off-by: Ankit Nautiyal
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_ddi.c | 2 ++
drivers/gpu/drm/i915/display/intel_dp.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/display
override the existing PPS-metadata, by either
writing the entire new PPS metadata, or by writing only the
PPS override parameters.
v2: Restructured the code to read all capability DPCDs at once and store
in an array in intel_dp structure.
v3: rebase
Signed-off-by: Ankit Nautiyal
Reviewed-by: Uma
calculate these PPS paremeters as
per the HDMI2.1 specification.
v2: Addressed review comments given by Uma Shankar:
-added documentation for functions
-fixed typos and errors
Signed-off-by: Ankit Nautiyal
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 233
y consider non-zero DSC FRL b/w for determining max FRL b/w
supported by sink.
Signed-off-by: Ankit Nautiyal
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_ddi.c | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 118 ++-
drivers/gpu/drm/i915/display/intel_d
sted by Uma Shankar:
-Fixed bug in determining the colorspace for RGB->YCbCr conversion.
-Fixed minor formatting issues
Also updated the commit message as per latest changes.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_ddi.c | 3 +-
.../drm/i915/display/intel_d
: Ankit Nautiyal
---
.../gpu/drm/i915/display/intel_combo_phy.c| 4 +++
drivers/gpu/drm/i915/display/intel_dp.c | 32 ++-
2 files changed, 7 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_combo_phy.c
b/drivers/gpu/drm/i915/display
This patch series is continuation of the discussion in:
https://patchwork.freedesktop.org/patch/457398/?series=95444&rev=1
Along with a patch to add debug print voltage configuration for
combo PHY ports.
Ankit Nautiyal (2):
drm/i915/display: Remove check for low voltage sku for max dp so
The low voltage sku check can be ignored as OEMs need to consider that
when designing the board and then put any limits in VBT.
Same is now changed in Bspec pages.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 32 +++--
1 file changed, 3
Add debug print for Procmon Ref values, to help get the
voltage configurations of combo PHYs.
Signed-off-by: Ankit Nautiyal
Suggested-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_combo_phy.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/display
Add debug print for Procmon Ref values, to help get the
voltage configurations of combo PHYs.
v2: Corrected drm_dbg to drm_dbg_kms (Jani)
Suggested-by: Imre Deak
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_combo_phy.c | 4
1 file changed, 4 insertions(+)
diff
Some optimizations in HDMI2.1 PCON configuration and avoiding
resetting the config DPCD.
Ankit Nautiyal (2):
drm/i915/dp: Optimize the FRL configuration for HDMI2.1 PCON
drm/i915/dp: For PCON TMDS mode set only the relavant bits in config
DPCD
drivers/gpu/drm/i915/display/intel_dp.c
HDMI Link Mode in wait for loop along with HDMI Link status DPCD.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 37 +++--
1 file changed, 23 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm
only
TMDS mode bit, Source control bit in the configuration DPCD.
It then enables the HDMI Link Enable bit.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 25 -
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915
The low voltage sku check can be ignored as OEMs need to consider that
when designing the board and then put any limits in VBT.
Same is now changed in Bspec (53720).
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 32 +++--
1 file changed, 3
tag. (Uma Shankar)
Fixes: 756f85cffef2 ("drm/i915/bdw: Broadwell has PIPEMISC")
Cc: Paulo Zanoni (v1)
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Jani Nikula
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc: intel-gfx@lists.freedesktop.org
Cc: # v3.13+
Signed-off-by: Ankit Nautiyal
---
drivers/
.
This series is continuation of the RFC :
https://patchwork.freedesktop.org/series/85073/
It adds support for writing infoframe for HDMI2.1 sink, connected via
HDMI2.1 PCON. This series also adds AVI infoframe version 3,
which is requied for new modes supported by HDMI2.1.
Ankit Nautiyal (3):
video
infoframes to PCON in source control mode.
Signed-off-by: Swati Sharma
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 8
drivers/gpu/drm/i915/display/intel_hdmi.h | 3 +++
2 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915
the type AVI infoframe instead of GMP in crtc_state, and only used
type GMP while writing infoframe (Gwan-gyeong Mun).
-Avoided writing the AVI infoframe Header twice in sdp packet (Ankit).
-Corrected the buffer size for AVI infoframe packing (Ankit).
Signed-off-by: Swati Sharma
Signed-off-by: An
need to only
unpack the data bytes as the header bits for DP SDP will be different.
Signed-off-by: Ankit Nautiyal
---
drivers/video/hdmi.c | 65
include/linux/hdmi.h | 2 ++
2 files changed, 49 insertions(+), 18 deletions(-)
diff --git a/drivers/video
: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 1 +
drivers/video/hdmi.c | 29 ---
include/linux/hdmi.h | 1 +
3 files changed, 28 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c
(Ankit).
-Added new infoframes_enabled function for DP with HDMI2.1 as branched
device (Ankit).
Signed-off-by: Swati Sharma
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_ddi.c | 4 +
drivers/gpu/drm/i915/display/intel_dp.c | 98 +++-
drivers/gpu/drm
Modify the check for CEA modes, to avoid writing VICs added in
CEA-861-G (meant for HDMI2.1) in AVI infoframes for older HDMI sinks.
This patch also adds a function to determine if sink is HDMI2.1
and uses corrects the drm message to show HDMI2.1 sink detetction.
Signed-off-by: Ankit Nautiyal
Fix the typo in DPCD caps used for checking SRC CTL mode of
HDMI2.1 PCON
v2: Corrected Fixes tag (Jani Nikula).
Fixes: 04b6603d13be ("drm/i915/display: Configure HDMI2.1 Pcon for FRL
only if Src-Ctl mode is available")
Cc: Ankit Nautiyal
Cc: Uma Shankar
Cc: Jani Nikula
Cc: "Vil
Fix the typo in DPCD caps used for checking SRC CTL mode of
HDMI2.1 PCON
v2: Corrected Fixes tag (Jani Nikula).
v3: Rebased.
Fixes: 04b6603d13be ("drm/i915/display: Configure HDMI2.1 Pcon for FRL only if
Src-Ctl mode is available")
Cc: Ankit Nautiyal
Cc: Uma Shankar
Cc: Jani
Fix the typo in DPCD caps used for checking SRC CTL mode of
HDMI2.1 PCON
Fixes: 04b6603d13be (drm/i915/display: Configure HDMI2.1 Pcon for FRL
only if Src-Ctl mode is available)
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
1 file changed, 1 insertion(+), 1
ressed bpp,
use minimum lanes, and rate.
Current series, only touches the DSC for DisplayPort. eDP might require
some more changes and also a different policy.
Ankit Nautiyal (3):
drm/i915/dp: Rename helper to calculate dsc output bpp
drm/i915/dp: Rename helper to get max pipe bpp with DSC
d
appends 'max' suffix to the function, and also avoid
unnecessary left shifting by 4, which we are anyway shifting back
later.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 49 +++--
1 file changed, 22 insertions(+), 27 deletions(-)
di
The helper intel_dp_dsc_compute_bpp gives the maximum pipe bpp that is
allowed with DSC. Renaming the function to reflect the same.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git
where bpp is forced
via debugfs.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 220
1 file changed, 182 insertions(+), 38 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index
bspec.
However, some eDP panels are getting issues [1] with higher link rate.
So keep the low voltage check for eDP, but ignore for DP sinks.
[1] https://gitlab.freedesktop.org/drm/intel/-/issues/6205
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/5272
Signed-off-by: Ankit Nautiyal
HDMI2.1 requires some higher resolution video modes to be enumerated
only if HDMI2.1 Fixed Rate Link (FRL) is supported.
Current platforms do not support FRL transmission so prune modes
that require HDMI2.1 FRL.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 21
Currently 12 BPC PORT_OUTPUT_BPC bits are set in PIPE_MISC register
for all Display > 12. DG2 is an exception.
This patch tweaks the condition to read and write the above bits
for DG2.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_display.c | 8
1 file changed
The low voltage sku check can be ignored as OEMs need to consider that
when designing the board and then put any limits in VBT.
Same is now changed in Bspec pages.
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/5272
Signed-off-by: Ankit Nautiyal
Reviewed-by: Imre Deak
---
drivers
This patch series is continuation of the discussion in:
https://patchwork.freedesktop.org/patch/457398/?series=95444&rev=1
along with a patch to add debug print voltage configuration for
combo PHY ports.
Rev3: Added names for voltage levels (Imre)
Ankit Nautiyal (2):
drm/i915/display: Re
Add debug print for Procmon Ref values, to help get the
voltage configurations of combo PHYs.
v2: Used drm_dbg_kms for logs. (Jani)
Added names for different voltage levels. (Imre)
Suggested-by: Imre Deak
Signed-off-by: Ankit Nautiyal
---
.../gpu/drm/i915/display/intel_combo_phy.c| 36
Add debug print for Procmon Ref values, to help get the
voltage configurations of combo PHYs.
v2: Used drm_dbg_kms for logs. (Jani)
Added names for different voltage levels. (Imre)
v3: Used const char * for names. (Jani)
Suggested-by: Imre Deak
Signed-off-by: Ankit Nautiyal
---
.../gpu/drm
Print I/O voltage and process info for each combo phy ports.
v2: Used drm_dbg_kms for logs. (Jani)
Added names for different voltage levels. (Imre)
v3: Used const char * for names. (Jani)
v4: Dropped the procom values and changed commit msg (Imre)
Suggested-by: Imre Deak
Signed-off-by: Ankit
HF-VSDB/SCDB has bits to advertise support for 16, 12 and 10 bpc.
If none of the bits are set, the minimum bpc supported with DSC is 8.
This patch corrects the min bpc supported to be 8, instead of 0.
Fixes: 76ee7b905678 ("drm/edid: Parse DSC1.2 cap fields from HFVSDB block")
Cc: Anki
timings,
I have used the check for clock >= 2376 MHz (or 1188 MHz with 420
format), instead of using individual VICs.
While at it, fix a bug while parsing the compressed bpc supported
from edid.
Ankit Nautiyal (2):
drm/edid: Fix minimum bpc supported with DSC1.2 for HDMI sink
drm/i915/h
.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 48 +++
1 file changed, 48 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c
b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 1ae09431f53a..2ee1262f6427 100644
--- a/drivers/gpu
From: Vandita Kulkarni
This patch adds a fix to support 297MHz of dot clock by calculating
the pll values using synopsis algorithm.
This will help to support 4k@30 mode for HDMI monitors on DG2.
Signed-off-by: Vandita Kulkarni
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display
297Mhz. (Matt)
Signed-off-by: Vandita Kulkarni
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_snps_phy.c | 32 +++
1 file changed, 32 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.c
b/drivers/gpu/drm/i915/display/intel_snps_phy.c
297Mhz. (Matt)
v3: Fix typo. (Ankit)
Signed-off-by: Vandita Kulkarni
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_snps_phy.c | 32 +++
1 file changed, 32 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.c
b/drivers/gpu/drm/i915
ode status.
Signed-off-by: Ankit Nautiyal
Reviewed-by: Arun R Murthy (v1)
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c
b/drivers/gpu/drm/i915/display/intel_hdmi.c
index ebd91aa69dd2..a88f58935
corrects min DSC BPC to 8, and minor refactoring for
better readability, and proper log messages.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/drm_edid.c | 124 +++--
1 file changed, 77 insertions(+), 47 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b
restriction for JSL/EHL (Arun).
Signed-off-by: Ankit Nautiyal
Reviewed-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/intel_dp.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display
not occur.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_combo_phy.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_combo_phy.c
b/drivers/gpu/drm/i915/display/intel_combo_phy.c
index 64890f39c3cc..1b8bdc47671d
not occur.
v2: Added helper function for DCC_MODE (Imre).
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_combo_phy.c | 16 ++--
.../gpu/drm/i915/display/intel_combo_phy_regs.h | 1 +
2 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu
Fix issues in HFVSDB parsing for DSC support.
Also minor refactoring in Logging.
Split from original patch into a new series.
https://patchwork.freedesktop.org/patch/495193/
Ankit Nautiyal (4):
drm/edid: Fix minimum bpc supported with DSC1.2 for HDMI sink
drm/edid: Split DSC parsing into
-by: Ankit Nautiyal
---
drivers/gpu/drm/drm_edid.c | 93 --
1 file changed, 49 insertions(+), 44 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 1d08b3a4..c9c3a9c8fa26 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b
Replace multiple log lines with a single log line at the end of
parsing HF-VSDB. Also use drm_dbg_kms instead of DRM_DBG_KMS, and
add log for DSC1.2 support.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/drm_edid.c | 21 +
1 file changed, 13 insertions(+), 8 deletions
Move the DSC parsing logic into separate function.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/drm_edid.c | 128 -
1 file changed, 69 insertions(+), 59 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index cdf10279e1bd
HF-VSDB/SCDB has bits to advertise support for 16, 12 and 10 bpc.
If none of the bits are set, the minimum bpc supported with DSC is 8.
This patch corrects the min bpc supported to be 8, instead of 0.
Fixes: 76ee7b905678 ("drm/edid: Parse DSC1.2 cap fields from HFVSDB block")
Cc: Anki
ing to use DFP conversion capabilities
for every mode during compute config, instead of having that decision
during DP initializing phase.
Patch 4-5 calculate the max BPC that can be sufficient with either
RGB or YCbcr420 format for the maximum FRL rate supported.
Ankit Nautiyal (5):
drm/i915/dp:
ted conversions.
-pulls the decision making to use DFP conversion capabilities
for every mode during compute config.
Signed-off-by: Ankit Nautiyal
---
.../drm/i915/display/intel_display_types.h| 7 ++
drivers/gpu/drm/i915/display/intel_dp.c | 88 +++
2 files changed, 59 inserti
Add helper function to check if Downstream HDMI 2.1 sink supports
DSC1.2.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915
work even with the maximum FRL rate supported by HDMI2.1
sink.
This patch calculates the max BPC that can be sufficient with either
RGB or YCBCR420 format for the maximum FRL rate supported.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 90 -
1
For cases where DP has HDMI2.1 sink and FRL Link issues are detected,
reset the flag to state FRL trained status before restarting FRL
training.
Fixes: 9488a030ac91 ("drm/i915: Add support for enabling link status and
recovery")
Cc: Swati Sharma
Cc: Ankit Nautiyal
Cc: Uma Shanka
-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 52 ++---
1 file changed, 39 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index f0a62f71904e..7f24f7633078 100644
--- a/drivers/gpu
een with
eDP HBR3 panels.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_combo_phy.c | 4 ++--
drivers/gpu/drm/i915/display/intel_combo_phy_regs.h | 1 +
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_combo_phy.c
only
the source control bit, with FRL Enable bit set to 0 (TMDS mode) in the
configuration DPCD. It then enables the HDMI Link Enable bit.
v2: Removed the redundant resetting of the bits as the buffer is already
initialized to 0. (Uma)
Updated comments and commit message.
Signed-off-by: Ankit
Some optimizations in HDMI2.1 PCON configuration and avoiding
resetting the config DPCD.
v2: Addressed comments from Uma.
v3: Rebased.
Ankit Nautiyal (2):
drm/i915/dp: Optimize the FRL configuration for HDMI2.1 PCON
drm/i915/dp: For PCON TMDS mode set only the relavant bits in config
DPCD
HDMI Link Mode in wait for loop along with HDMI Link status DPCD.
v2: Rebase
Signed-off-by: Ankit Nautiyal
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_dp.c | 37 +++--
1 file changed, 23 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/di
: Ankit Nautiyal
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_dp.c | 24 +++-
1 file changed, 23 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 020c357348b2..0a424bf69396
Add helper functions for calculating FRL capacity and DFM
requirements with given compressed bpp.
v2: Fixed:
-Build warnings/errors: Removed unused variables.
-Checkpatch warnings.
Signed-off-by: Ankit Nautiyal
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/drm_frl_dfm_helper.c | 303
Misc fixes and refactoring in HDMI2.1 PCON helper functions.
Ankit Nautiyal (3):
drm/i915_hdmi: Fix the definition of intel_hdmi_dsc_get_bpp
drm/drm_edid: Add helper to get max FRL rate for an HDMI sink
drm/i915/display: Simplify helpers for getting DSC slices and bpp
drivers/gpu/drm
Fix the data-type of the argument output_format to enum, for the
function intel_hdmi_dsc_get_bpp.
Fixes: 6e6cb758e035 ("drm/i915: Add helper functions for calculating DSC
parameters for HDMI2.1")
Cc: Ankit Nautiyal
Cc: Uma Shankar
Cc: Jani Nikula
Cc: "Ville Syrj_l_"
calculated instead of crtc_state.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 7 +--
drivers/gpu/drm/i915/display/intel_hdmi.c | 24 ---
drivers/gpu/drm/i915/display/intel_hdmi.h | 5 +++--
3 files changed, 21 insertions(+), 15
Move the common function for getting the max FRL rate for an HDMI sink,
from intel_dp.c to drm/drm_edid.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/drm_edid.c | 38 +
drivers/gpu/drm/i915/display/intel_dp.c | 19 -
include/drm/drm_edid.h
Misc fixes and refactoring in HDMI2.1 PCON helper functions.
V2:
Addressed review comments from Jani.
Splitted the drm_helper addition and usage in separate patches.
Ankit Nautiyal (4):
drm/i915/hdmi: Fix the definition of intel_hdmi_dsc_get_bpp
drm/edid: Add helper to get max FRL rate for an
Add the helpers for getting the max FRL rate with and without DSC
for an HDMI sink.
v2: Fix the subject line and documentation of the helpers (Jani).
Split the helper definitions and usage into separate patches. (Jani).
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/drm_edid.c | 38
Re-use the drm helpers for getting max FRL rate for an HDMI sink.
This patch removes the duplicate code and calls the already defined
drm helpers for the task.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 19 +--
1 file changed, 5 insertions(+), 14
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