✓ i915.CI.BAT: success for PSR DSB support (rev8)

== Series Details == Series: PSR DSB support (rev8) URL : https://patchwork.freedesktop.org/series/142520/ State : success == Summary == CI Bug Log - changes from CI_DRM_16033 -> Patchwork_142520v8 Summary --- **SUCCESS** No regre

[PATCH v5 3/7] drm/i915/display: get old_plane_state to the check_plane routine

We are adding support to track and store the plane damage clips in to plane state as part of plane atomich check routine. This damage areas could be utilized for FBC dirty rect in xe3. We would need to use a drm_helper function which generates a merged damage area from damage clips set from the use

[PATCH v5 5/7] drm/i915/xe3: avoid calling fbc activate if fbc is active

If FBC is already active, we don't need to call FBC activate routine again. This is more relevant in case of dirty rect support in FBC. Xe doesn't support legacy fences. Hence fence programming also not required as part of this fbc_hw_activate. Any FBC related register updates done after enabling t

[PATCH v5 4/7] drm/i915/display: update and store the plane damage clips

Userspace can pass damage area clips per plane to track changes in a plane and some display components can utilze these damage clips for efficiently handling use cases like FBC, PSR etc. A merged damage area is generated and its coordinates are updated relative to viewport and HW and stored in the

[PATCH v5 2/7] drm/i915/xe3: introduce HAS_FBC_DIRTY_RECT() for FBC dirty rect support

Introduce a macro to check if the platform supports FBC dirty rect capability. Signed-off-by: Vinod Govindapillai --- drivers/gpu/drm/i915/display/intel_display_device.h | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i91

[PATCH v5 6/7] drm/i915/xe3: dirty rect support for FBC

Dirty rectangle feature allows FBC to recompress a subsection of a frame. When this feature is enabled, display will read the scan lines between dirty rectangle start line and dirty rectangle end line in subsequent frames. Use the merged damage clip stored in the plane state to configure the FBC d

[PATCH v5 0/7] drm/i915/xe3: FBC Dirty rect feature support

Dirty rect support for FBC in xe3 onwards based on the comments after the initial RFC series. v2: Dirty rect related compute and storage moved to fbc state (Ville) V3: Dont call fbc activate if FBC is already active v4: Dirty rect compute and programming moved within DSB scope New changes ar

Re: [PATCH] drm/i915/display: Disable AuxCCS framebuffers if built for Xe

On Tue, Jan 28, 2025 at 3:08 PM Tvrtko Ursulin wrote: > > > Hi, > > On 05/03/2024 16:44, Jani Nikula wrote: > > On Wed, 28 Feb 2024, Juha-Pekka Heikkila > > wrote: > >> AuxCCS framebuffers don't work on Xe driver hence disable them > >> from plane capabilities until they are fixed. FlatCCS frame

[PATCH v5 7/7] drm/i915/xe3: disable FBC if PSR2 selective fetch is enabled

It is not recommended to have both FBC dirty rect and PSR2 selective fetch be enabled at the same time. If PSR2 selective fetch or panel replay is on, mark FBC as not possible. v2: fix the condition to disable FBC if PSR2 enabled (Jani) v3: use HAS_FBC_DIRTY_RECT() Bspec: 68881 Signed-off-by: Vi

RE: Regression on linux-next (next-20250120)

Hello Al, > -Original Message- > From: Al Viro On Behalf Of Al Viro > Sent: Monday, January 27, 2025 10:34 AM > To: Greg Kroah-Hartman > Cc: Borah, Chaitanya Kumar ; intel- > g...@lists.freedesktop.org; intel...@lists.freedesktop.org; Kurmi, Suresh > Kumar ; Saarinen, Jani > ; linux-fsde

✗ Fi.CI.SPARSE: warning for drm/i915/xe3: FBC Dirty rect feature support (rev6)

== Series Details == Series: drm/i915/xe3: FBC Dirty rect feature support (rev6) URL : https://patchwork.freedesktop.org/series/141527/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

✗ Fi.CI.CHECKPATCH: warning for drm/i915/xe3: FBC Dirty rect feature support (rev6)

== Series Details == Series: drm/i915/xe3: FBC Dirty rect feature support (rev6) URL : https://patchwork.freedesktop.org/series/141527/ State : warning == Summary == Error: dim checkpatch failed 85fc2c1e57cd drm/i915/xe3: add register definitions for fbc dirty rect support -:24: WARNING:LONG_L

✗ i915.CI.BAT: failure for drm/i915/xe3: FBC Dirty rect feature support (rev6)

== Series Details == Series: drm/i915/xe3: FBC Dirty rect feature support (rev6) URL : https://patchwork.freedesktop.org/series/141527/ State : failure == Summary == CI Bug Log - changes from CI_DRM_16035 -> Patchwork_141527v6 Summary -

✗ Fi.CI.BUILD: warning for Display Global Histogram (rev13)

== Series Details == Series: Display Global Histogram (rev13) URL : https://patchwork.freedesktop.org/series/135793/ State : warning == Summary == Error: patch https://patchwork.freedesktop.org/api/1.0/series/135793/revisions/13/mbox/ not found

✓ i915.CI.BAT: success for Display Global Histogram (rev13)

== Series Details == Series: Display Global Histogram (rev13) URL : https://patchwork.freedesktop.org/series/135793/ State : success == Summary == CI Bug Log - changes from CI_DRM_16035 -> Patchwork_135793v13 Summary --- **SUCCESS**

RE: [PATCH] drm/i915: Give i915 and xe each their own display tracepoints

On Mon, 27 Jan 2025, "Cavitt, Jonathan" wrote: > Though it would probably be good to file an issue report detailing > the issue this fixes, then mark this patch as having fixed that > reported issue. While I occasionally do request that when we get patches out of left field, and I want to ensure

Re: [PATCH 0/2] drm/i915/selftests: Correct frequency handling in RPS power measurement

Hi Sk, > Sk Anirban (2): > drm/i915/selftests: Correct frequency handling in RPS power > measurement > drm/i915/guc/slpc: Add helper function slpc_measure_power merged to drm-intel-gt-next. Thanks, Andi

Re: [PATCH] drm/i915/selftests: avoid using uninitialized context

Hi Sebastian, thanks for review. > I don't thing it's a best idea to just initialize ww here, you still have > incorrect path that try to fini ww before it was initialize. Fair point - we still call i915_gem_ww_ctx_fini(), which is useless without actual ww. > > I would probably do something lik

[PATCH v2] drm/i915/selftests: avoid using uninitialized context

There is an error path in igt_ppgtt_alloc(), which leads to ww object being passed down to i915_gem_ww_ctx_fini() without initialization. Correct that by putting ppgtt->vm and returning early. Fixes: 480ae79537b2 ("drm/i915/selftests: Prepare gtt tests for obj->mm.lock removal") Signed-off-by: Kr

Re: [PATCH v10 2/4] drm/doc: Document device wedged event

On Mon, Jan 27, 2025 at 12:23:28PM +0200, Pekka Paalanen wrote: > On Wed, 22 Jan 2025 07:22:25 +0200 > Raag Jadav wrote: > > > On Tue, Jan 21, 2025 at 02:14:56AM +0100, Xaver Hugl wrote: > > > > +It is the responsibility of the consumer to make sure that the device > > > > or > > > > +its resour

Re: [PATCH] drm/i915: replace in_atomic() with manually set flag

Hi Maciej, > The locked==true looks OK. > thanks for review! > However, I fear that there is some corner case with locked==false. 1 or 2 > calls back in chain looks good. > > CI failures needs to be analyzed. > Yup, I already did that recently. I thought those were suspicious, but I could not r

Re: [PATCH 1/5] drm/i915: Move VT-d alignment into plane->min_alignment()

On Mon, 27 Jan 2025, Ville Syrjälä wrote: > On Mon, Jan 27, 2025 at 06:44:21PM +0200, Ville Syrjälä wrote: >> On Mon, Jan 27, 2025 at 11:50:34AM +0200, Jani Nikula wrote: >> > On Wed, 22 Jan 2025, Ville Syrjala wrote: >> > > From: Ville Syrjälä >> > > >> > > Currently we don't account for the VT

Re: [PATCH v10 2/4] drm/doc: Document device wedged event

On Tue, 28 Jan 2025 11:37:53 +0200 Raag Jadav wrote: > On Mon, Jan 27, 2025 at 12:23:28PM +0200, Pekka Paalanen wrote: > > On Wed, 22 Jan 2025 07:22:25 +0200 > > Raag Jadav wrote: > > > > > On Tue, Jan 21, 2025 at 02:14:56AM +0100, Xaver Hugl wrote: > > > > > +It is the responsibility of th

Re: Re: Re: Re: [PATCH v2] treewide: const qualify ctl_tables where applicable

On Mon, Jan 27, 2025 at 03:42:39PM +, Matthew Wilcox wrote: > On Mon, Jan 27, 2025 at 04:55:58PM +0200, Jani Nikula wrote: > > You could have static const within functions too. You get the rodata > > protection and function local scope, best of both worlds? > > timer_active is on the stack, so

Re: [PATCH v2] drm/i915/selftests: avoid using uninitialized context

I sent an earlier version of this patch by mistake (it includes indentation errors) - I apologize for that, will fix this in v3 later. Sorry for the noise. Krzysztof On 2025-01-28 at 12:53:44 +, Krzysztof Karas wrote: > There is an error path in igt_ppgtt_alloc(), which leads to ww > object b

Re: [PATCH] drm/i915/display: Disable AuxCCS framebuffers if built for Xe

Hi, On 05/03/2024 16:44, Jani Nikula wrote: On Wed, 28 Feb 2024, Juha-Pekka Heikkila wrote: AuxCCS framebuffers don't work on Xe driver hence disable them from plane capabilities until they are fixed. FlatCCS framebuffers work and they are left enabled. CCS is left untouched for i915 driver.

Re: [PATCH 3/3] drm/xe: Use i915-display shutdown sequence directly

On Mon, Jan 20, 2025 at 02:42:14PM +0100, Maarten Lankhorst wrote: > Hey, > > Den 2025-01-17 kl. 23:09, skrev Rodrigo Vivi: > > Start the xe-i915-display reconciliation by using the same > > shutdown sequences. > > > > v2: include the stubs for !CONFIG_DRM_XE_DISPLAY (Kunit) > > > > Reviewed-by:

[PATCH v8 09/14] drm/i915/histogram: Hook i915 histogram with drm histogram

Handle histogram caps and histogram config property in i915 driver. Fill the histogram hardware capability and act upon the histogram config property to enable/disable histogram in i915. Signed-off-by: Arun R Murthy --- drivers/gpu/drm/i915/display/intel_crtc.c| 7 +++ drivers/gpu/drm/i

[PATCH v8 12/14] drm/i915/histogram: histogram delay counter doesnt reset

The delay counter for histogram does not reset and as a result the histogram bin never gets updated. Workaround would be to use save and restore histogram register. v2: Follow the seq in interrupt handler Restore DPST bit 0 read/write dpst ctl rg Restore DPST bit 1 and Guar

✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: avoid using uninitialized context (rev2)

== Series Details == Series: drm/i915/selftests: avoid using uninitialized context (rev2) URL : https://patchwork.freedesktop.org/series/143990/ State : warning == Summary == Error: dim checkpatch failed 8d91301c8c71 drm/i915/selftests: avoid using uninitialized context -:25: ERROR:CODE_INDENT

[PATCH v5 1/7] drm/i915/xe3: add register definitions for fbc dirty rect support

Register definitions for FBC dirty rect support Bspec: 71675, 73424 Signed-off-by: Vinod Govindapillai --- drivers/gpu/drm/i915/display/intel_fbc_regs.h | 9 + 1 file changed, 9 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_fbc_regs.h b/drivers/gpu/drm/i915/display/inte

✗ Fi.CI.SPARSE: warning for PSR DSB support (rev8)

== Series Details == Series: PSR DSB support (rev8) URL : https://patchwork.freedesktop.org/series/142520/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +./arch/x86/include/asm/bitops.h:116:1: warning: unr

Re: Re: Re: Re: [PATCH v2] treewide: const qualify ctl_tables where applicable

On Tue, Jan 28, 2025 at 6:22 AM Joel Granados wrote: > On Mon, Jan 27, 2025 at 03:42:39PM +, Matthew Wilcox wrote: > > On Mon, Jan 27, 2025 at 04:55:58PM +0200, Jani Nikula wrote: > > > You could have static const within functions too. You get the rodata > > > protection and function local sco

Re: [PATCH] drm/i915: Give i915 and xe each their own display tracepoints

On Mon, Jan 27, 2025 at 05:00:38PM -0600, Lucas De Marchi wrote: > On Mon, Jan 27, 2025 at 11:30:55PM +0200, Ville Syrjälä wrote: > >From: Ville Syrjälä > > > >Currently we just define the display tracpoints with > >TRACE_SYSTEM i915. However the code gets included separately > >in i915 and xe, an

Re: [PATCH] drm/i915: Give i915 and xe each their own display tracepoints

On Mon, Jan 27, 2025 at 09:40:12PM +, Cavitt, Jonathan wrote: > -Original Message- > From: Intel-xe On Behalf Of Ville > Syrjala > Sent: Monday, January 27, 2025 1:31 PM > To: intel-gfx@lists.freedesktop.org > Cc: intel...@lists.freedesktop.org > Subject: [PATCH] drm/i915: Give i915 a

Re: ✗ i915.CI.Full: failure for drm/i915: Add Wa_22010465259 in its respective WA list (rev3)

On Tue, Jan 28, 2025 at 04:47:52PM +, Maurya, Ranu wrote: > It’s a false alarm, since the patch only modifies a few comments, and > doesn't impact anything which might cause errors on EDID or FLIP Applied to drm-intel-gt-next. Thanks for the patch and reviews. Matt > > > From: Patchwork

Re: [PATCH 1/5] drm/i915: Move VT-d alignment into plane->min_alignment()

On Tue, Jan 28, 2025 at 11:46:23AM +0200, Jani Nikula wrote: > On Mon, 27 Jan 2025, Ville Syrjälä wrote: > > On Mon, Jan 27, 2025 at 06:44:21PM +0200, Ville Syrjälä wrote: > >> On Mon, Jan 27, 2025 at 11:50:34AM +0200, Jani Nikula wrote: > >> > On Wed, 22 Jan 2025, Ville Syrjala wrote: > >> > > F

✓ i915.CI.BAT: success for drm/i915/selftests: avoid using uninitialized context (rev2)

== Series Details == Series: drm/i915/selftests: avoid using uninitialized context (rev2) URL : https://patchwork.freedesktop.org/series/143990/ State : success == Summary == CI Bug Log - changes from CI_DRM_16034 -> Patchwork_143990v2 Summ

[PATCH v8 02/14] drm: Define ImageEnhancemenT LUT structures exposed to user

ImageEnhancemenT(IET) hardware interpolates the LUT value to generate the enhanced output image. LUT takes an input value, outputs a new value based on the data within the LUT. 1D LUT can remap individual input values to new output values based on the LUT sample. LUT can be interpolated by the hard

[PATCH v8 01/14] drm: Define histogram structures exposed to user

Display Histogram is an array of bins and can be generated in many ways referred to as modes. Ex: HSV max(RGB), Wighted RGB etc. Understanding the histogram data format(Ex: HSV max(RGB)) Histogram is just the pixel count. For a maximum resolution of 10k (10240 x 4320 = 44236800) 25 bits should be

[PATCH v8 05/14] drm/i915/histogram: Define registers for histogram

Add the register/bit definitions for global histogram. v2: Intended the register contents, removed unused regs (Jani) Bspec: 4270 Signed-off-by: Arun R Murthy Reviewed-by: Suraj Kandpal --- .../gpu/drm/i915/display/intel_histogram_regs.h| 48 ++ 1 file changed, 48 inser

[PATCH v8 04/14] drm/crtc: Expose API to create drm crtc property for IET LUT

Add drm-crtc property for IET 1DLUT and for the properties added add corresponding get/set_property. Signed-off-by: Arun R Murthy --- drivers/gpu/drm/drm_atomic_state_helper.c | 9 ++ drivers/gpu/drm/drm_atomic_uapi.c | 13 drivers/gpu/drm/drm_crtc.c| 54 +++

[PATCH v8 08/14] drm/i915/histogram: histogram interrupt handling

Upon enabling histogram an interrupt is trigerred after the generation of the statistics. This patch registers the histogram interrupt and handles the interrupt. v2: Added intel_crtc backpointer to intel_histogram struct (Jani) Removed histogram_wq and instead use dev_priv->unodered_eq (Jani)

[PATCH v8 11/14] drm/i915/crtc: Hook i915 IET LUT with the drm IET properties

Upon drm getting the IET LUT value from the user through the IET_LUT property, i915 driver will write the LUT table to the hardware registers. Signed-off-by: Arun R Murthy --- drivers/gpu/drm/i915/display/intel_crtc.c| 3 +++ drivers/gpu/drm/i915/display/intel_display.c | 2 ++ 2 files chang

[PATCH v8 03/14] drm/crtc: Expose API to create drm crtc property for histogram

Add drm-crtc property for histogram and for the properties added add the corresponding get/set_property. v8: Rebased Signed-off-by: Arun R Murthy --- drivers/gpu/drm/drm_atomic_state_helper.c | 14 ++ drivers/gpu/drm/drm_atomic_uapi.c | 15 +++ drivers/gpu/drm/drm_crtc.c

[PATCH v8 07/14] drm/xe: Add histogram support to Xe builds

Histogram added as part of i915/display driver. Adding the same for xe as well. Signed-off-by: Arun R Murthy Reviewed-by: Suraj Kandpal Acked-by: Dmitry Baryshkov --- drivers/gpu/drm/xe/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/x

[PATCH v8 14/14] drm/i915/histogram: Enable pipe dithering

Enable pipe dithering while enabling histogram to overcome some atrifacts seen on the screen. Signed-off-by: Arun R Murthy --- drivers/gpu/drm/i915/display/intel_histogram.c | 11 +++ 1 file changed, 11 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_histogram.c b/drivers

Re: [PATCH v5 4/7] drm/i915/display: update and store the plane damage clips

On Tue, Jan 28, 2025 at 05:54:15PM +0200, Vinod Govindapillai wrote: > Userspace can pass damage area clips per plane to track > changes in a plane and some display components can utilze > these damage clips for efficiently handling use cases like > FBC, PSR etc. A merged damage area is generated a

[PATCH v8 13/14] drm/i915/histogram: Histogram changes for Display 20+

In Display 20+, new registers are added for setting index, reading histogram and writing the IET. v2: Removed duplicate code (Jani) v3: Moved histogram core changes to earlier patches (Jani/Suraj) v4: Rebased after addressing comments on patch 1 v5: Added the retry logic from patch3 and rebased th

[PATCH v8 06/14] drm/i915/histogram: Add support for histogram

Statistics is generated from the image frame that is coming to display and an event is sent to user after reading this histogram data. v2: forward declaration in header file along with error handling (Jani) v3: Replaced i915 with intel_display (Suraj) v4: Removed dithering enable/disable (Vandita)

[PATCH v8 10/14] drm/i915/iet: Add support to writing the IET LUT data

User created LUT can be fed back to the hardware so that the hardware can apply this LUT data to see the enhancement in the image. Signed-off-by: Arun R Murthy --- drivers/gpu/drm/i915/display/intel_histogram.c | 70 ++ drivers/gpu/drm/i915/display/intel_histogram.h | 4

[PATCH v8 00/14] Display Global Histogram

Display histogram is a hardware functionality where a statistics for 'n' number of frames is generated to form a histogram data. This is notified to the user via histogram event. Compositor will then upon sensing the histogram event will read the histogram data from KMD via crtc property. User can

Re: [PATCH v3] drm/i915: Fix page cleanup on DMA remap failure

On Mon, Jan 27, 2025 at 03:43:32PM -0500, Brian Geffon wrote: > When converting to folios the cleanup path of shmem_get_pages() was > missed. When a DMA remap fails and the max segment size is greater than > PAGE_SIZE it will attempt to retry the remap with a PAGE_SIZEd segment > size. The cleanup

Re: Regression on linux-next (next-20250120)

On Tue, Jan 28, 2025 at 04:00:58PM +, Borah, Chaitanya Kumar wrote: > Unfortunately this change does not help us. I think it is the methods member > that causes the problem. So the following change solves the problem for us. > > > --- a/fs/debugfs/file.c > +++ b/fs/debugfs/file.c > @@ -102,

Re: [PATCH v10 2/4] drm/doc: Document device wedged event

On Tue, Jan 28, 2025 at 01:38:09PM +0200, Pekka Paalanen wrote: > On Tue, 28 Jan 2025 11:37:53 +0200 > Raag Jadav wrote: > > > On Mon, Jan 27, 2025 at 12:23:28PM +0200, Pekka Paalanen wrote: > > > On Wed, 22 Jan 2025 07:22:25 +0200 > > > Raag Jadav wrote: > > > > > > > On Tue, Jan 21, 2025 at

Re: Regression on linux-next (next-20250120)

On Wed, Jan 29, 2025 at 04:37:12AM +, Al Viro wrote: > On Tue, Jan 28, 2025 at 04:00:58PM +, Borah, Chaitanya Kumar wrote: > > > Unfortunately this change does not help us. I think it is the methods > > member that causes the problem. So the following change solves the problem > > for us