== Series Details ==
Series: Panel Replay eDP support (rev10)
URL : https://patchwork.freedesktop.org/series/133684/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14967 -> Patchwork_133684v10
Summary
---
**FAILURE**
On Wed, 05 Jun 2024, "Hogander, Jouni" wrote:
> On Wed, 2024-06-05 at 13:06 +0300, Jani Nikula wrote:
>>
>> Jouni, Animesh, there are some PSR commits with Fixes: pointing at
>> commits in v6.9 or v6.10-rc1.
>>
>> This does not apply cleanly to -rc1:
>> d07a578703db ("drm/i915/display: Do not prin
On Wed, 19 Jun 2024, Jouni Högander wrote:
> Our HW doesn't support Panel Replay without AUX_LESS ALPM on eDP. Check
> panel support for this and prevent eDP panel replay if it doesn't exits.
>
> Bspec: 68920
>
> v2: use intel_alpm_aux_less_wake_supported
>
> Signed-off-by: Jouni Högander
> ---
>
On Tue, 18 Jun 2024, Jouni Högander wrote:
> Wa 16021440873 is writing wrong register. Instead of PIPE_SRCSZ_ERLY_TPT
> write CURPOS_ERLY_TPT.
I know this is merged already... but the commit message fails to explain
the changes to psr2_pipe_srcsz_early_tpt_calc().
BR,
Jani.
>
> v2: use right o
On Fri, 14 Jun 2024, Imre Deak wrote:
> Add helpers to convert between x16 fixed point and integer/fraction
> values. Also add the format/argument macros required to printk x16
> fixed point variables.
>
> These are needed by later patches dumping the Display Stream Compression
> configuration in
The dispcnlunit1_cp_xosc_clk should be de-asserted in display off
and only asserted in display on. But during observation it found
clk remains active in display OFF. As workaround, Display driver
shall execute set-reset sequence at the end of the Initialize
Sequence.
Wa_14020225554
Mitul Golani (
The dispcnlunit1_cp_xosc_clk should be de-asserted in display off
and only asserted in display on. But during observation it found
clk remains active in display OFF. As workaround, Display driver
shall execute set-reset sequence at the end of the Initialize
Sequence.
Wa_14020225554
--v2:
- Update
On 18/06/2024 13:54, Sebastian Andrzej Siewior wrote:
On 2024-06-18 10:00:09 [+0100], Tvrtko Ursulin wrote:
I did a re-test but am not 100% certain yet. CI looks frustratingly noisy at
the moment.
igt@debugfs_test@read_all_entries appears to be a fluke which is not new.
But igt@gem_exec_para
On 13/06/2024 11:20, Sebastian Andrzej Siewior wrote:
Luca Abeni reported this:
| BUG: scheduling while atomic: kworker/u8:2/15203/0x0003
| CPU: 1 PID: 15203 Comm: kworker/u8:2 Not tainted 4.19.1-rt3 #10
| Call Trace:
| rt_spin_lock+0x3f/0x50
| gen6_read32+0x45/0x1d0 [i915]
| g4x_get_vbl
On 13/06/2024 11:20, Sebastian Andrzej Siewior wrote:
The !irqs_disabled() check triggers on PREEMPT_RT even with
i915_sched_engine::lock acquired. The reason is the lock is transformed
into a sleeping lock on PREEMPT_RT and does not disable interrupts.
There is no need to check for disabled i
On 13/06/2024 11:20, Sebastian Andrzej Siewior wrote:
Once the known issues are addressed, it should be safe to enable the
driver.
Signed-off-by: Sebastian Andrzej Siewior
---
drivers/gpu/drm/i915/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/Kconfig b/dri
The dispcnlunit1_cp_xosc_clk should be de-asserted in display off
and only asserted in display on. But during observation it found
clk remains active in display OFF. As workaround, Display driver
shall execute set-reset sequence at the end of the Initialize
Sequence.
Wa_15013987218
Signed-off-by:
Hi!
> > > Let's bring in the actual gpu people.. Dave/Jani/others - does any of
> > > this sound familiar? Pavel says things have gotten much slower in
> > > 6.10: "something was very wrong with the performance, likely to do
> > > with graphics"
> >
> > Actually, maybe it's not graphics at all. R
Hi Dave & Sima -
Surprisingly few fixes lately, here's one for joiner+MSO.
drm-intel-fixes-2024-06-19:
drm/i915 fixes for v6.10-rc5:
- Fix conditions for joiner usage, it's not possible with eDP MSO
BR,
Jani.
The following changes since commit 6ba59ff4227927d3a8530fc2973b80e94b54d58f:
Linu
Hi Janusz,
On Mon, Jun 03, 2024 at 09:54:45PM +0200, Janusz Krzysztofik wrote:
> CI has been sporadically reporting the following issue triggered by
> igt@i915_selftest@live@hangcheck on ADL-P and similar machines:
>
> <6> [414.049203] i915: Running
> intel_hangcheck_live_selftests/igt_reset_evi
Hi,
On Tue, Jun 18, 2024 at 07:34:22PM +, Cavitt, Jonathan wrote:
> > Commit 05da7d9f717b ("drm/i915/gem: Downgrade stolen lmem setup
> > warning") produces two sparse warnings. The first one being a bit
> > more sever as it might cause a segmentation fault.
> >
> > The difference between v1
== Series Details ==
Series: drm/i915/display: WA for Re-initialize dispcnlunitt1 xosc clock
URL : https://patchwork.freedesktop.org/series/135056/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14969 -> Patchwork_135056v1
S
> -Original Message-
> From: Pekka Paalanen
> Sent: Thursday, March 28, 2024 3:35 PM
> To: Garg, Nemesa
> Cc: Simon Ser ; intel-gfx@lists.freedesktop.org; dri-
> de...@lists.freedesktop.org; G M, Adarsh
> Subject: Re: [RFC 0/5] Introduce drm sharpening property
>
> On Wed, 27 Mar 202
On Tue, Jun 18, 2024 at 02:07:56PM +0300, Jani Nikula wrote:
> On Tue, 11 Jun 2024, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > As we extend the use of DSB for critical pipe/plane register
> > programming, it'll be nice to have an escape valve at hand,
> > in case things go very poorly.
From: Ville Syrjälä
Export drm_plane_has_format() so that drivers can use it.
v2: add kerneldoc
Reviewed-by: Jani Nikula
Reviewed-by: Daniel Vetter
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/drm_crtc_internal.h | 2 --
drivers/gpu/drm/drm_plane.c | 10 ++
include/drm/
On Wed, 19 Jun 2024 at 12:31, Ville Syrjala
wrote:
> Export drm_plane_has_format() so that drivers can use it.
Acked-by: Daniel Stone
On Wed, Jun 12, 2024 at 11:47:03PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> intel_surf_alignment() in particular has devolved into
> a complete mess. Redesign the code so that we can handle
> alignment restrictions in a nicer. Also adjust alignment
> for TGL+ to actually match the ha
On Fri, Jun 14, 2024 at 04:37:41PM -0300, André Almeida wrote:
> Hi Dmitry,
>
> Em 14/06/2024 14:32, Dmitry Baryshkov escreveu:
> > On Fri, Jun 14, 2024 at 12:35:27PM GMT, André Almeida wrote:
> >> AMD hardware can do async flips with overlay planes, but currently there's
> >> no
> >> easy way to
On Wed, Jun 19, 2024 at 01:10:09PM +0300, Jani Nikula wrote:
> On Fri, 14 Jun 2024, Imre Deak wrote:
> > Add helpers to convert between x16 fixed point and integer/fraction
> > values. Also add the format/argument macros required to printk x16
> > fixed point variables.
> >
> > These are needed by
On Wed, 2024-06-19 at 12:51 +0300, Jani Nikula wrote:
> On Tue, 18 Jun 2024, Jouni Högander wrote:
> > Wa 16021440873 is writing wrong register. Instead of
> > PIPE_SRCSZ_ERLY_TPT
> > write CURPOS_ERLY_TPT.
>
> I know this is merged already... but the commit message fails to
> explain
> the chang
On Tue, Jun 18, 2024 at 04:52:15PM +0530, Animesh Manna wrote:
> Panel Replay VSC SDP not getting sent when VRR is enabled
> and W1 and W2 are 0. So Program Set Context Latency in
> TRANS_SET_CONTEXT_LATENCY register to at least a value of 1.
>
> HSD: 14015406119
>
> v1: Initial version.
> v2: Up
On Wed, 19 Jun 2024, Ville Syrjälä wrote:
> On Tue, Jun 18, 2024 at 02:07:56PM +0300, Jani Nikula wrote:
>> On Tue, 11 Jun 2024, Ville Syrjala wrote:
>> > From: Ville Syrjälä
>> >
>> > As we extend the use of DSB for critical pipe/plane register
>> > programming, it'll be nice to have an escape
On Wed, Jun 19, 2024 at 04:11:08PM +0300, Jani Nikula wrote:
> On Wed, 19 Jun 2024, Ville Syrjälä wrote:
> > On Tue, Jun 18, 2024 at 02:07:56PM +0300, Jani Nikula wrote:
> >> On Tue, 11 Jun 2024, Ville Syrjala wrote:
> >> > From: Ville Syrjälä
> >> >
> >> > As we extend the use of DSB for critic
On BMG-G21 we need to disable fbc due to complications around the WA.
Signed-off-by: Matthew Auld
Cc: Jonathan Cavitt
Cc: Matt Roper
Cc: Lucas De Marchi
Cc: Vinod Govindapillai
Cc: intel-gfx@lists.freedesktop.org
---
drivers/gpu/drm/i915/display/intel_display_wa.h | 8
drivers/gpu/
On Wed, Jun 19, 2024 at 04:24:16PM +0300, Ville Syrjälä wrote:
> On Wed, Jun 19, 2024 at 04:11:08PM +0300, Jani Nikula wrote:
> > On Wed, 19 Jun 2024, Ville Syrjälä wrote:
> > > On Tue, Jun 18, 2024 at 02:07:56PM +0300, Jani Nikula wrote:
> > >> On Tue, 11 Jun 2024, Ville Syrjala wrote:
> > >> >
On Wed, Jun 19, 2024 at 05:44:08PM +0300, Ville Syrjälä wrote:
> On Wed, Jun 19, 2024 at 04:24:16PM +0300, Ville Syrjälä wrote:
> > On Wed, Jun 19, 2024 at 04:11:08PM +0300, Jani Nikula wrote:
> > > On Wed, 19 Jun 2024, Ville Syrjälä wrote:
> > > > On Tue, Jun 18, 2024 at 02:07:56PM +0300, Jani Ni
== Series Details ==
Series: drm/i915/display: WA for Re-initialize dispcnlunitt1 xosc clock (rev2)
URL : https://patchwork.freedesktop.org/series/135056/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14970 -> Patchwork_135056v2
Hi Mitul,
On Mon, Jun 10, 2024 at 12:52:02PM +0530, Mitul Golani wrote:
...
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c
> b/drivers/gpu/drm/i915/display/intel_vrr.c
> index 4ad99a54aa83..05f67dc9d98d 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/
On Wed, 19 Jun 2024 at 03:44, Pavel Machek wrote:
>
> Ok, so machine is ready to be thrown out of window, again. Trying to
> play 29C3 video should not make machine completely unusable ... as in
> keyboard looses keystrokes in terminal.
Well, that at least sounds like you can bisect it with a ver
== Series Details ==
Series: drm/i915: Polish plane surface alignment handling (rev3)
URL : https://patchwork.freedesktop.org/series/133564/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On Wed, Jun 19, 2024 at 02:38:16PM +0300, Ville Syrjälä wrote:
> On Wed, Jun 12, 2024 at 11:47:03PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > intel_surf_alignment() in particular has devolved into
> > a complete mess. Redesign the code so that we can handle
> > alignment restric
== Series Details ==
Series: drm/i915: Polish plane surface alignment handling (rev3)
URL : https://patchwork.freedesktop.org/series/133564/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14972 -> Patchwork_133564v3
Summary
== Series Details ==
Series: drm/i915/display: WA for Re-initialize dispcnlunitt1 xosc clock (rev2)
URL : https://patchwork.freedesktop.org/series/135056/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14970_full -> Patchwork_135056v2_full
==
Hi Dave & Sima -
The main i915 pull request for v6.11. A bit more commits than usual.
Should've started sending periodic PR's earlier to keep it more
manageable. My bad.
Highlights are BMG display, panel replay enabling, and link training
failure fallback for DP MST.
A big chunk of the commit
On Wed, 19 Jun 2024, Ville Syrjälä wrote:
> On Wed, Jun 19, 2024 at 05:44:08PM +0300, Ville Syrjälä wrote:
>> On Wed, Jun 19, 2024 at 04:24:16PM +0300, Ville Syrjälä wrote:
>> > On Wed, Jun 19, 2024 at 04:11:08PM +0300, Jani Nikula wrote:
>> > > On Wed, 19 Jun 2024, Ville Syrjälä wrote:
>> > > >
Hi @Nathan Chancellor
Probably fix is merged in drm-intel-next
related patch: https://patchwork.freedesktop.org/series/134860/
Can you please check and suggest if this patch is merged ?
Thanks,
Mitul
> -Original Message-
> From: Nathan Chancellor
> Sent: Wednesday, June 19, 2024 9:12 P
On Wed, Jun 19, 2024 at 06:10:34PM +, Golani, Mitulkumar Ajitkumar wrote:
> Hi @Nathan Chancellor
>
> Probably fix is merged in drm-intel-next
> related patch: https://patchwork.freedesktop.org/series/134860/
>
> Can you please check and suggest if this patch is merged ?
This is still repro
On Tue, Jun 18, 2024 at 05:22:51PM +0300, Jani Nikula wrote:
> Make it easier to change the underlying structures by using a macro
> similar to PLATFORM() for initialization.
>
> The subplatform names in debug logs change slightly as they now reflect
> the enum rather than manually entered names.
On Tue, Jun 18, 2024 at 05:22:52PM +0300, Jani Nikula wrote:
> We'll be needing a macro based list of platforms for more things in the
> future. Start by defining the platform enumerations with it.
Reviewed-by: Rodrigo Vivi
>
> Signed-off-by: Jani Nikula
> ---
> .../drm/i915/display/intel_dis
On Tue, Jun 18, 2024 at 05:22:53PM +0300, Jani Nikula wrote:
> We'll want to use the subplatforms similar to platforms.
Reviewed-by: Rodrigo Vivi
>
> Signed-off-by: Jani Nikula
> ---
> .../drm/i915/display/intel_display_device.c | 2 +-
> .../drm/i915/display/intel_display_device.h | 51
On Tue, Jun 18, 2024 at 05:22:54PM +0300, Jani Nikula wrote:
> Add a structure with a bitfield member for each platform and
> subplatform, and initialize them in platform and subplatform descs.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel
On Tue, Jun 18, 2024 at 05:22:56PM +0300, Jani Nikula wrote:
> The display platform enums are not really needed for anything. Remove.
>
Reviewed-by: Rodrigo Vivi
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_display_device.c | 12 +++-
> drivers/gpu/drm/i915/
On Tue, Jun 18, 2024 at 05:22:55PM +0300, Jani Nikula wrote:
> Facilitate using display->is.HASWELL etc. for identifying platforms and
> subplatforms. Merge platform and subplatform members together.
>
> Signed-off-by: Jani Nikula
> ---
> .../gpu/drm/i915/display/intel_display_core.h | 3 +++
>
On Wed, Jun 19, 2024 at 07:53:23PM +0300, Ville Syrjälä wrote:
> On Wed, Jun 19, 2024 at 02:38:16PM +0300, Ville Syrjälä wrote:
> > On Wed, Jun 12, 2024 at 11:47:03PM +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > intel_surf_alignment() in particular has devolved into
> > > a c
== Series Details ==
Series: drm/i915: Polish plane surface alignment handling (rev3)
URL : https://patchwork.freedesktop.org/series/133564/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14972_full -> Patchwork_133564v3_full
> -Original Message-
> From: Intel-gfx On Behalf Of Mitul
> Golani
> Sent: Wednesday, June 19, 2024 4:08 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [PATCH v3] drm/i915/display: WA for Re-initialize dispcnlunitt1 xosc
> clock
>
> The dispcnlunit1_cp_xosc_clk should be de-asser
== Series Details ==
Series: Panel Replay eDP support (rev10)
URL : https://patchwork.freedesktop.org/series/133684/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14967 -> Patchwork_133684v10
Summary
---
**SUCCESS**
== Series Details ==
Series: series starting with [v2,1/3] drm/i915: Move encoder suspend/shutdown
helpers to intel_encoder.c
URL : https://patchwork.freedesktop.org/series/135014/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14963 -> Patchwork_135014v1
=
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