Hi Rodrigo,
On 2/19/2024 9:12 PM, Rodrigo Vivi wrote:
On Mon, Feb 19, 2024 at 01:50:47PM +0100, Nirmoy Das wrote:
Error in mmu_interval_notifier_insert() can leave a NULL
notifier.mm pointer. Catch that and return early.
Cc: Andi Shyti
Cc: Shawn Lee
Signed-off-by: Nirmoy Das
---
drivers/gpu/
On 19/02/2024 20:02, Rodrigo Vivi wrote:
On Mon, Feb 19, 2024 at 01:14:23PM +, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Request can be NULL if no guilty request was identified so simply use
engine->i915 instead.
Signed-off-by: Tvrtko Ursulin
Fixes: d50892a9554c ("drm/i915: switch fro
We have couple of customer issues, related to SAGV/QGV point
calculation. Those patches contain fixes plus some additional
debugs for those issues.
Stanislav Lisovskiy (3):
drm/i915: Add meaningful traces for QGV point info error handling
drm/i915: Extract code required to calculate max qgv/ps
We need that in order to force disable SAGV in next patch.
Also it is beneficial to separate that code, as in majority cases,
when SAGV is enabled, we don't even need those calculations.
Also we probably need to determine max PSF GV point as well, however
currently we don't do that when we disable
For debug purposes we need those - error path won't flood the log,
however there has been already numerous cases, when due to lack
of debugs, we couldn't immediately tell what was the problem on
customer machine, which slowed down the investigation, requiring
to get access to target device and addi
Problem is that on some platforms, we do get QGV point mask in wrong
state on boot. However driver assumes it is set to 0
(i.e all points allowed), however in reality we might get them all restricted,
causing issues.
Lets disable SAGV initially to force proper QGV point state.
If more QGV points ar
Hi Tvrtko,
On Mon, Feb 19, 2024 at 12:51:44PM +, Tvrtko Ursulin wrote:
> On 19/02/2024 11:16, Tvrtko Ursulin wrote:
> > On 15/02/2024 13:59, Andi Shyti wrote:
...
> > > +/*
> > > + * Exclude unavailable engines.
> > > + *
> > > + * Only the first CCS engine is utilized due to the disabling o
On Tue, Feb 20, 2024 at 09:16:43AM +, Tvrtko Ursulin wrote:
>
> On 19/02/2024 20:02, Rodrigo Vivi wrote:
> > On Mon, Feb 19, 2024 at 01:14:23PM +, Tvrtko Ursulin wrote:
> > > From: Tvrtko Ursulin
> > >
> > > Request can be NULL if no guilty request was identified so simply use
> > > engi
On 20/02/2024 10:11, Andi Shyti wrote:
Hi Tvrtko,
On Mon, Feb 19, 2024 at 12:51:44PM +, Tvrtko Ursulin wrote:
On 19/02/2024 11:16, Tvrtko Ursulin wrote:
On 15/02/2024 13:59, Andi Shyti wrote:
...
+/*
+ * Exclude unavailable engines.
+ *
+ * Only the first CCS engine is utilized due t
On Tue, Feb 20, 2024 at 11:15:05AM +, Tvrtko Ursulin wrote:
> On 20/02/2024 10:11, Andi Shyti wrote:
> > On Mon, Feb 19, 2024 at 12:51:44PM +, Tvrtko Ursulin wrote:
> > > On 19/02/2024 11:16, Tvrtko Ursulin wrote:
> > > > On 15/02/2024 13:59, Andi Shyti wrote:
> >
> > ...
> >
> > > > > +/
== Series Details ==
Series: QGV/SAGV related fixes (rev7)
URL : https://patchwork.freedesktop.org/series/126962/
State : warning
== Summary ==
Error: dim checkpatch failed
6011bbecc60e drm/i915: Add meaningful traces for QGV point info error handling
0521371d3ced drm/i915: Extract code requir
== Series Details ==
Series: QGV/SAGV related fixes (rev7)
URL : https://patchwork.freedesktop.org/series/126962/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:116:1: warni
== Series Details ==
Series: QGV/SAGV related fixes (rev7)
URL : https://patchwork.freedesktop.org/series/126962/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14300 -> Patchwork_126962v7
Summary
---
**SUCCESS**
N
This patch set is implementing calculation of ALPM AUX-Less parameters
for Intel HW and writing them in case of AUX-Less is enabled. It is
also enabling ALPM AUX-Less for eDP Panel Replay. Current code is not
allowing Panel Replay on eDP. Patches for this are coming later.
This implementation is o
Calculate aux less wake time and store it into alpm_params struct
Bspec: 71477
v2:
- use variables instead of values directly
- fix max value
- move converting port clock to Mhz into _lnl_compute_aux_less_wake_time
Signed-off-by: Jouni Högander
---
.../drm/i915/display/intel_display_type
Add get function for silence period and lfps half cycle. Values are taken
from the tables in bspec.
Bspec: 71632
v2:
- fix some checks
- add some more comments
Signed-off-by: Jouni Högander
---
.../drm/i915/display/intel_display_types.h| 2 +
drivers/gpu/drm/i915/display/intel_psr.c
Enable ALPM AUX-Less for Panel Replay eDP. Also write all calculated
AUX-Less configuration values accordingly.
Bspec: 71477
v2:
- do not set AUX-Wake related bits for AUX-Less case
- drop switch to active latency
- add SLEEP_HOLD_TIME_50_SYMBOLS
- add PORT_ALPM_CTL_MAX_PHY_SWING_HOLD
Si
eDP1.5 adds some more bits into DP_RECEIVER_ALPM_CAP and
DP_RECEIVER_ALPM_CONFIG registers. Add definitions for these.
Signed-off-by: Jouni Högander
---
include/drm/display/drm_dp.h | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/include/drm/display/drm_dp.h b/include/drm
No need to write ALPM configuration for DP2.0 Panel Replay or PSR1.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.
Couple of ALPM AUX-Less related fields are missing from ALPM register
definitions. Add these and remove some duplicate definitions.
Bspec: 70294
V2: add Bspec reference
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr_regs.h | 12
1 file changed, 8 insertio
== Series Details ==
Series: ALPM AUX-Less (rev2)
URL : https://patchwork.freedesktop.org/series/129938/
State : warning
== Summary ==
Error: dim checkpatch failed
ea6ececafe60 drm/display: Add missing aux less alpm wake related bits
434fb689c399 drm/i915/psr: Calculate aux less wake time
c2f0
== Series Details ==
Series: ALPM AUX-Less (rev2)
URL : https://patchwork.freedesktop.org/series/129938/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
Commit 1fd4a5a36f9f ("drm/connector: Rename legacy TV property") failed
to update all the users of the struct drm_tv_connector_state mode field,
which resulted in a build failure in i915.
However, a subsequent commit in the same series reintroduced a mode
field in that structure, with a different
== Series Details ==
Series: ALPM AUX-Less (rev2)
URL : https://patchwork.freedesktop.org/series/129938/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14300 -> Patchwork_129938v2
Summary
---
**FAILURE**
Serious un
== Series Details ==
Series: QGV/SAGV related fixes (rev7)
URL : https://patchwork.freedesktop.org/series/126962/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14300_full -> Patchwork_126962v7_full
Summary
---
**SUCC
On 20/02/2024 10:36, Maxime Ripard wrote:
On Tue, Feb 20, 2024 at 09:16:43AM +, Tvrtko Ursulin wrote:
On 19/02/2024 20:02, Rodrigo Vivi wrote:
On Mon, Feb 19, 2024 at 01:14:23PM +, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Request can be NULL if no guilty request was identified s
== Series Details ==
Series: drm/i915: check before removing mm notifier (rev3)
URL : https://patchwork.freedesktop.org/series/101170/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14300 -> Patchwork_101170v3
Summary
--
== Series Details ==
Series: drm/i915/tv: Fix TV mode
URL : https://patchwork.freedesktop.org/series/130123/
State : warning
== Summary ==
Error: dim checkpatch failed
93cae8b61e41 drm/i915/tv: Fix TV mode
-:25: WARNING:BAD_REPORTED_BY_LINK: Reported-by: should be immediately followed
by Clos
Hi,
this series does basically two things:
1. Disables automatic load balancing as adviced by the hardware
workaround.
2. Forces the sharing of the load submitted to CCS among all the
CCS available (as of now only DG2 has more than one CCS). This
way the user, when sending a query, will
The hardware should not dynamically balance the load between CCS
engines. Wa_16016805146 recommends disabling it across all
platforms.
Fixes: d2eae8e98d59 ("drm/i915/dg2: Drop force_probe requirement")
Signed-off-by: Andi Shyti
Cc: Chris Wilson
Cc: Joonas Lahtinen
Cc: Matt Roper
Cc: # v6.2+
-
Since CCS automatic load balancing is disabled, we will impose a
fixed balancing policy that involves setting all the CCS engines
to work together on the same load.
Simultaneously, the user will see only 1 CCS rather than the
actual number. As of now, this change affects only DG2.
Fixes: d2eae8e9
Hi,
I'm sorry, I forgot to add the changelog. Here it is:
v1 -> v2
- In Patch 1 use the correct workaround number (thanks Matt).
- In Patch 2 do not add the extra CCS engines to the exposed UABI
engine list and adapt the engine counting accordingly (thanks
Tvrtko).
- Reword the commi
== Series Details ==
Series: drm/i915/tv: Fix TV mode
URL : https://patchwork.freedesktop.org/series/130123/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14300 -> Patchwork_130123v1
Summary
---
**SUCCESS**
No reg
On 20/02/2024 14:20, Andi Shyti wrote:
Since CCS automatic load balancing is disabled, we will impose a
fixed balancing policy that involves setting all the CCS engines
to work together on the same load.
Erm *all* CSS engines work together..
Simultaneously, the user will see only 1 CCS rath
Panel Replay VSC SDP not getting sent when VRR is enabled
and W1 and W2 are 0. So Program Set Context Latency in
TRANS_SET_CONTEXT_LATENCY register to at least a value of 1.
HSD: 14015406119
v1: Initial version.
v2: Update timings stored in adjusted_mode struct. [Ville]
v3: Add WA in compute_conf
On Tue, Feb 20, 2024 at 02:27:07PM +, Tvrtko Ursulin wrote:
>
> On 20/02/2024 14:20, Andi Shyti wrote:
> > Since CCS automatic load balancing is disabled, we will impose a
> > fixed balancing policy that involves setting all the CCS engines
> > to work together on the same load.
>
> Erm *all*
Please, ignore, I sent V1 again.
Sorry about the noise!
Andi
On Tue, Feb 20, 2024 at 03:20:32PM +0100, Andi Shyti wrote:
> Hi,
>
> this series does basically two things:
>
> 1. Disables automatic load balancing as adviced by the hardware
>workaround.
>
> 2. Forces the sharing of the load
Hi,
this series does basically two things:
1. Disables automatic load balancing as adviced by the hardware
workaround.
2. Assigns all the CCS slices to one single user engine. The user
will then be able to query only one CCS engine
Changelog
=
- In Patch 1 use the correct workarou
The hardware should not dynamically balance the load between CCS
engines. Wa_14019159160 recommends disabling it across all
platforms.
Fixes: d2eae8e98d59 ("drm/i915/dg2: Drop force_probe requirement")
Signed-off-by: Andi Shyti
Cc: Chris Wilson
Cc: Joonas Lahtinen
Cc: Matt Roper
Cc: # v6.2+
-
Enable only one CCS engine by default with all the compute sices
allocated to it.
While generating the list of UABI engines to be exposed to the
user, exclude any additional CCS engines beyond the first
instance.
This change can be tested with igt i915_query.
Fixes: d2eae8e98d59 ("drm/i915/dg2:
Hi,
[...]
> diff --git a/drivers/gpu/drm/i915/i915_query.c
> b/drivers/gpu/drm/i915/i915_query.c
> index 3baa2f54a86e..d5a5143971f5 100644
> --- a/drivers/gpu/drm/i915/i915_query.c
> +++ b/drivers/gpu/drm/i915/i915_query.c
> @@ -124,6 +124,7 @@ static int query_geometry_subslices(struct
> drm_i
== Series Details ==
Series: Disable automatic load CCS load balancing (rev2)
URL : https://patchwork.freedesktop.org/series/129951/
State : warning
== Summary ==
Error: dim checkpatch failed
2065c72a8acd drm/i915/gt: Disable HW load balancing for CCS
5e600e4db29b drm/i915/gt: Set default CCS
== Series Details ==
Series: Disable automatic load CCS load balancing (rev2)
URL : https://patchwork.freedesktop.org/series/129951/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On 20/02/2024 14:35, Andi Shyti wrote:
Enable only one CCS engine by default with all the compute sices
slices
allocated to it.
While generating the list of UABI engines to be exposed to the
user, exclude any additional CCS engines beyond the first
instance.
This change can be tested with
== Series Details ==
Series: Disable automatic load CCS load balancing (rev2)
URL : https://patchwork.freedesktop.org/series/129951/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14300 -> Patchwork_129951v2
Summary
---
== Series Details ==
Series: drm/i915: check before removing mm notifier (rev3)
URL : https://patchwork.freedesktop.org/series/101170/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14300_full -> Patchwork_101170v3_full
Summ
Quoting Joonas Lahtinen (2024-02-16 11:41:44)
> (+ Jonathan)
>
> Quoting Dave Airlie (2024-02-16 04:58:03)
> > On Thu, 15 Feb 2024 at 20:06, Tvrtko Ursulin
> > wrote:
> > >
> > > Hi Dave, Daniel,
> > >
> > > First pull request for 6.9 with probably one more coming in one to two
> > > weeks.
> > >
== Series Details ==
Series: drm/i915/panelreplay: Panel replay workaround with VRR (rev3)
URL : https://patchwork.freedesktop.org/series/129632/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14300 -> Patchwork_129632v3
Sum
== Series Details ==
Series: Disable automatic load CCS load balancing (rev3)
URL : https://patchwork.freedesktop.org/series/129951/
State : warning
== Summary ==
Error: dim checkpatch failed
c2b6f7fef25d drm/i915/gt: Disable HW load balancing for CCS
63fd178cadec drm/i915/gt: Enable only one
== Series Details ==
Series: drm/i915/tv: Fix TV mode
URL : https://patchwork.freedesktop.org/series/130123/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14300_full -> Patchwork_130123v1_full
Summary
---
**SUCCESS**
== Series Details ==
Series: Disable automatic load CCS load balancing (rev3)
URL : https://patchwork.freedesktop.org/series/129951/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14300 -> Patchwork_129951v3
Summary
---
== Series Details ==
Series: drm/i915/panelreplay: Panel replay workaround with VRR (rev3)
URL : https://patchwork.freedesktop.org/series/129632/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14300_full -> Patchwork_129632v3_full
===
On Tue, Feb 20, 2024 at 07:49:19PM +0530, Animesh Manna wrote:
> Panel Replay VSC SDP not getting sent when VRR is enabled
> and W1 and W2 are 0. So Program Set Context Latency in
> TRANS_SET_CONTEXT_LATENCY register to at least a value of 1.
>
> HSD: 14015406119
Unnecessary mark since the wa_nam
On Tue, Feb 20, 2024 at 02:12:51PM +0100, Maxime Ripard wrote:
> Commit 1fd4a5a36f9f ("drm/connector: Rename legacy TV property") failed
> to update all the users of the struct drm_tv_connector_state mode field,
> which resulted in a build failure in i915.
>
> However, a subsequent commit in the s
On Tue, Feb 20, 2024 at 02:12:51PM +0100, Maxime Ripard wrote:
> Commit 1fd4a5a36f9f ("drm/connector: Rename legacy TV property") failed
> to update all the users of the struct drm_tv_connector_state mode field,
> which resulted in a build failure in i915.
>
> However, a subsequent commit in the s
On Tue, Feb 20, 2024 at 07:52:21PM +0200, Ville Syrjälä wrote:
> On Tue, Feb 20, 2024 at 02:12:51PM +0100, Maxime Ripard wrote:
> > Commit 1fd4a5a36f9f ("drm/connector: Rename legacy TV property") failed
> > to update all the users of the struct drm_tv_connector_state mode field,
> > which resulted
On Tue, Feb 20, 2024 at 12:57:06PM -0500, Rodrigo Vivi wrote:
> On Tue, Feb 20, 2024 at 07:52:21PM +0200, Ville Syrjälä wrote:
> > On Tue, Feb 20, 2024 at 02:12:51PM +0100, Maxime Ripard wrote:
> > > Commit 1fd4a5a36f9f ("drm/connector: Rename legacy TV property") failed
> > > to update all the use
On Thu, 15 Feb 2024 at 21:08, Abhinav Kumar wrote:
>
> intel_dp_vsc_sdp_pack() can be re-used by other DRM drivers as well.
> Lets move this to drm_dp_helper to achieve this.
>
> changes in v2:
> - rebased on top of drm-tip
>
> Acked-by: Dmitry Baryshkov
v1 had an explicit comment before
On 2/20/2024 10:49 AM, Dmitry Baryshkov wrote:
On Thu, 15 Feb 2024 at 21:08, Abhinav Kumar wrote:
intel_dp_vsc_sdp_pack() can be re-used by other DRM drivers as well.
Lets move this to drm_dp_helper to achieve this.
changes in v2:
- rebased on top of drm-tip
Acked-by: Dmitry Bary
On Tue, 20 Feb 2024 at 20:53, Abhinav Kumar wrote:
>
>
>
> On 2/20/2024 10:49 AM, Dmitry Baryshkov wrote:
> > On Thu, 15 Feb 2024 at 21:08, Abhinav Kumar
> > wrote:
> >>
> >> intel_dp_vsc_sdp_pack() can be re-used by other DRM drivers as well.
> >> Lets move this to drm_dp_helper to achieve this
On 2/20/2024 11:05 AM, Dmitry Baryshkov wrote:
On Tue, 20 Feb 2024 at 20:53, Abhinav Kumar wrote:
On 2/20/2024 10:49 AM, Dmitry Baryshkov wrote:
On Thu, 15 Feb 2024 at 21:08, Abhinav Kumar wrote:
intel_dp_vsc_sdp_pack() can be re-used by other DRM drivers as well.
Lets move this to dr
On Tue, 20 Feb 2024 at 21:09, Abhinav Kumar wrote:
>
>
>
> On 2/20/2024 11:05 AM, Dmitry Baryshkov wrote:
> > On Tue, 20 Feb 2024 at 20:53, Abhinav Kumar
> > wrote:
> >>
> >>
> >>
> >> On 2/20/2024 10:49 AM, Dmitry Baryshkov wrote:
> >>> On Thu, 15 Feb 2024 at 21:08, Abhinav Kumar
> >>> wrote:
On Tue, 20 Feb 2024 at 21:05, Dmitry Baryshkov
wrote:
>
> On Tue, 20 Feb 2024 at 20:53, Abhinav Kumar wrote:
> >
> >
> >
> > On 2/20/2024 10:49 AM, Dmitry Baryshkov wrote:
> > > On Thu, 15 Feb 2024 at 21:08, Abhinav Kumar
> > > wrote:
> > >>
> > >> intel_dp_vsc_sdp_pack() can be re-used by othe
On Tue, Feb 20, 2024 at 08:06:01PM +0200, Ville Syrjälä wrote:
> On Tue, Feb 20, 2024 at 12:57:06PM -0500, Rodrigo Vivi wrote:
> > On Tue, Feb 20, 2024 at 07:52:21PM +0200, Ville Syrjälä wrote:
> > > On Tue, Feb 20, 2024 at 02:12:51PM +0100, Maxime Ripard wrote:
> > > > Commit 1fd4a5a36f9f ("drm/co
On 2/20/2024 11:20 AM, Dmitry Baryshkov wrote:
On Tue, 20 Feb 2024 at 21:05, Dmitry Baryshkov
wrote:
On Tue, 20 Feb 2024 at 20:53, Abhinav Kumar wrote:
On 2/20/2024 10:49 AM, Dmitry Baryshkov wrote:
On Thu, 15 Feb 2024 at 21:08, Abhinav Kumar wrote:
intel_dp_vsc_sdp_pack() can be r
On Fri, Feb 16, 2024 at 02:40:26PM +0200, Zhi Wang wrote:
> On Fri, 16 Feb 2024 10:51:20 +0200
> Jani Nikula wrote:
>
> > On Fri, 16 Feb 2024, "Jiri Slaby (SUSE)" wrote:
> > > this series removes unused i915 structure members as found by
> > > clang-struct (and manually checked by me).
> >
> >
On Tue, Feb 20, 2024 at 11:27:18AM -0800, Abhinav Kumar wrote:
>
>
> On 2/20/2024 11:20 AM, Dmitry Baryshkov wrote:
> > On Tue, 20 Feb 2024 at 21:05, Dmitry Baryshkov
> > wrote:
> >>
> >> On Tue, 20 Feb 2024 at 20:53, Abhinav Kumar
> >> wrote:
> >>>
> >>>
> >>>
> >>> On 2/20/2024 10:49 AM, Dmi
On 2/20/2024 11:41 AM, Ville Syrjälä wrote:
On Tue, Feb 20, 2024 at 11:27:18AM -0800, Abhinav Kumar wrote:
On 2/20/2024 11:20 AM, Dmitry Baryshkov wrote:
On Tue, 20 Feb 2024 at 21:05, Dmitry Baryshkov
wrote:
On Tue, 20 Feb 2024 at 20:53, Abhinav Kumar wrote:
On 2/20/2024 10:49 AM,
On 2/19/2024 12:28, Rodrigo Vivi wrote:
On Fri, Feb 16, 2024 at 10:38:41AM -0800, john.c.harri...@intel.com wrote:
From: John Harrison
The above w/a is required for every platform that the i915 driver
supports. It is fixed on the latest platforms but they are only
supported by Xe instead of i9
Currently the size parameter of drm_dp_vsc_sdp_pack() is always
the size of struct dp_sdp. Hence lets drop this parameter and
use sizeof() directly.
Suggested-by: Dmitry Baryshkov
Signed-off-by: Abhinav Kumar
---
drivers/gpu/drm/display/drm_dp_helper.c | 8 ++--
drivers/gpu/drm/i915/display
intel_dp_vsc_sdp_pack() can be re-used by other DRM drivers as well.
Lets move this to drm_dp_helper to achieve this.
changes in v2:
- rebased on top of drm-tip
Acked-by: Dmitry Baryshkov
Signed-off-by: Abhinav Kumar
Acked-by: Jani Nikula
---
drivers/gpu/drm/display/drm_dp_helper.c |
On Tue, 20 Feb 2024 at 21:54, Abhinav Kumar wrote:
>
> Currently the size parameter of drm_dp_vsc_sdp_pack() is always
> the size of struct dp_sdp. Hence lets drop this parameter and
> use sizeof() directly.
>
> Suggested-by: Dmitry Baryshkov
> Signed-off-by: Abhinav Kumar
> ---
> drivers/gpu/d
Starting BDB version 239, hdr_dpcd_refresh_timeout is introduced to
backlight BDB data. Commit 700034566d68 ("drm/i915/bios: Define more BDB
contents") updated the backlight BDB data accordingly. This broke the
parsing of backlight BDB data in VBT for versions 236 - 238 (both
inclusive) and hence t
This is v2 of [1], with the following changes:
- Several functional/typo/formatting fixes, detailed in the patches.
- Move the BW allocation from encoder hooks to
intel_atomic_commit_tail() fixing the allocation for MST streams
enabled/disabled w/o a full modeset (i.e. w/o re-enabling the mast
Add support for Display Port tunneling. For now this includes the
support for Bandwidth Allocation Mode (BWA), leaving adding Panel Replay
support for later.
BWA allows using displays that share the same (Thunderbolt) link with
their maximum resolution. Atm, this may not be possible due to the
coa
Copy intel_dp_max_data_rate() to DRM core. It will be needed by a
follow-up DP tunnel patch, checking the maximum rate the DPRX (sink)
supports. Accordingly use the drm_dp_max_dprx_data_rate() name for
clarity. This patchset will also switch calling the new DRM function
in i915 instead of intel_dp_
Instead of intel_dp_max_data_rate() use the equivalent
drm_dp_max_dprx_data_rate() which was copied from the former one in a
previous patch.
Signed-off-by: Imre Deak
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp.c |
On shared (Thunderbolt) links with DP tunnels, the modeset may need to
be retried on all connectors on the link due to a link BW limitation
arising only after the atomic check phase. To support this add a helper
function queuing a work to retry the modeset on a given port's connector
and at the sam
Factor out intel_dp_config_required_rate() used by a follow-up patch
enabling the DP tunnel BW allocation mode.
Signed-off-by: Imre Deak
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_dp.c | 43 +++--
drivers/gpu/drm/i915/display/intel_dp.h | 1 +
2 files c
Export intel_dp_max_common_rate() and intel_dp_max_lane_count() used by
a follow-up patch enabling the DP tunnel BW allocation mode.
Signed-off-by: Imre Deak
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_dp.c | 4 ++--
drivers/gpu/drm/i915/display/intel_dp.h | 2 ++
2 files ch
The system resume display mode restoration should happen with an output
configuration matching that of the suspend time saved mode. Since the
restored mode configuration is subject to the bpp fallback logic,
starting out with an unlimited bpp and reducing the bpp as required by
any (MST) link BW li
Add intel_dp_max_link_data_rate() to get the link BW vs. the sink DPRX
BW used by a follow-up patch enabling the DP tunnel BW allocation mode.
The link BW can be below the DPRX BW due to a BW limitation on a link
shared by multiple sinks.
Signed-off-by: Imre Deak
Reviewed-by: Uma Shankar
---
dr
Factor out a function updating the sink's link rate and lane count
capabilities, used by a follow-up patch enabling the DP tunnel BW
allocation mode.
Signed-off-by: Imre Deak
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_dp.c | 11 ---
drivers/gpu/drm/i915/display/inte
Add a way to get the active pipes through a given DP port by syncing
against a related pending non-blocking commit. Atm
intel_dp_get_active_pipes() will only try to sync a given pipe and if
that would block ignore the pipe. A follow-up change enabling the DP
tunnel BW allocation mode will need to e
Factor out a function to read the sink's DPRX capabilities used by a
follow-up patch enabling the DP tunnel BW allocation mode.
Signed-off-by: Imre Deak
Reviewed-by: Uma Shankar
---
.../drm/i915/display/intel_dp_link_training.c | 30 +++
.../drm/i915/display/intel_dp_link_traini
Add support to enable the DP tunnel BW allocation mode. Follow-up
patches will call the required helpers added here to prepare for a
modeset on a link with DP tunnels, the last change in the patchset
actually enabling BWA.
With BWA enabled, the driver will expose the full mode list a display
suppo
Add the atomic state during a modeset required to enable the DP tunnel
BW allocation mode on links where such a tunnel was detected. This state
applies to an already enabled output, the state added for a newly
enabled output will be computed and added/cleared to/from the atomic
state in a follow-up
Compute the BW required through a DP tunnel on links with such tunnels
detected and add the corresponding atomic state during a modeset.
v2:
- Fix error check of intel_dp_tunnel_compute_stream_bw(). (Ville)
- Move intel_dp_tunnel_atomic_cleanup_inherited_state() to this patch.
(Ville)
- Move int
Allocate and free the DP tunnel BW required by a stream while
enabling/disabling the stream during a modeset.
v2:
- Move the allocation up from encoder hooks to
intel_atomic_commit_tail().
Signed-off-by: Imre Deak
Reviewed-by: Uma Shankar (v1)
---
drivers/gpu/drm/i915/display/intel_ddi.c
A follow-up change will need to resume DP tunnels during system resume,
so call intel_dp_sync_state() always for DDI encoders, so this function
can resume the tunnels for all DP connectors.
Signed-off-by: Imre Deak
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
1
Handle DP tunnel IRQs a sink (or rather a BW management component like
the Thunderbolt Connection Manager) raises to signal the completion of a
BW request by the driver, or to signal any state change related to the
link BW.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_dp.c | 3
Take any link BW limitation into account in
intel_dp_max_link_data_rate(). Such a limitation can be due to multiple
displays on (Thunderbolt) links with DP tunnels sharing the link BW.
Signed-off-by: Imre Deak
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_dp.c | 32 +++
The TBT DP tunnel BW request logic in the Thunderbolt Connection Manager
depends on the GFX driver reading out the sink's DPRX capabilities in
response to a long HPD pulse. Since in i915 this read-out can be blocked
by another connector's/encoder's hotplug event handling (which is
serialized by drm
Detect DP tunnels and enable the BW allocation mode on them. Send a
hotplug notification to userspace in response to a BW change.
Signed-off-by: Imre Deak
---
.../drm/i915/display/intel_display_driver.c | 20 +++
drivers/gpu/drm/i915/display/intel_dp.c | 14 +++--
Suspend and resume DP tunnels during system suspend/resume, disabling
the BW allocation mode during suspend, re-enabling it after resume. This
reflects the link's BW management component (Thunderbolt CM) disabling
BWA during suspend. Before any BW requests the driver must read the
sink's DPRX capab
On Tue, Feb 20, 2024 at 11:52:04AM -0800, John Harrison wrote:
> On 2/19/2024 12:28, Rodrigo Vivi wrote:
> > On Fri, Feb 16, 2024 at 10:38:41AM -0800, john.c.harri...@intel.com wrote:
> > > From: John Harrison
> > >
> > > The above w/a is required for every platform that the i915 driver
> > > sup
There are few things we need to do for bigjoiner, in order
to improve code maintenance and also make testing for Bigjoiner
easier.
Those series contain addition of bigjoiner force debugfs option,
in order to be able to force bigjoiner even if there is no display
support, also we refactor pipe vs tr
Don't call enabled_bigjoiner_pipes twice, lets just move
intel_get_bigjoiner_config earlier, because it is anyway
calling same function.
Also cleanup hsw_enabled_transcoders from irrelevant bigjoiner code.
Signed-off-by: Stanislav Lisovskiy
---
drivers/gpu/drm/i915/display/intel_display.c | 22 +
Handle only bigjoiner masters in skl_commit_modeset_enables/disables,
slave crtcs should be handled by master hooks. Same for encoders.
That way we can also remove a bunch of checks like
intel_crtc_is_bigjoiner_slave.
v2: Get rid of master vs slave checks and separation in crtc enable/disable
ho
Patch calculates bigjoiner pipes in mst compute.
Patch also passes bigjoiner bool to validate plane
max size.
Signed-off-by: vsrini4
Signed-off-by: Stanislav Lisovskiy
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 19 ---
1 file changed, 12 insertions(+), 7 deletions(-)
dif
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