We have couple of customer issues, related to SAGV/QGV point
calculation. Those patches contain fixes plus some additional
debugs for those issues.
Stanislav Lisovskiy (3):
drm/i915: Add meaningful traces for QGV point info error handling
drm/i915: Extract code required to calculate max qgv/ps
We need that in order to force disable SAGV in next patch.
Also it is beneficial to separate that code, as in majority cases,
when SAGV is enabled, we don't even need those calculations.
Also we probably need to determine max PSF GV point as well, however
currently we don't do that when we disable
For debug purposes we need those - error path won't flood the log,
however there has been already numerous cases, when due to lack
of debugs, we couldn't immediately tell what was the problem on
customer machine, which slowed down the investigation, requiring
to get access to target device and addi
Problem is that on some platforms, we do get QGV point mask in wrong
state on boot. However driver assumes it is set to 0
(i.e all points allowed), however in reality we might get them all restricted,
causing issues.
Lets disable SAGV initially to force proper QGV point state.
If more QGV points ar
On Mon, Nov 27, 2023 at 08:21:46AM -0800, Matt Roper wrote:
> On Fri, Nov 24, 2023 at 05:55:23PM -0300, Gustavo Sousa wrote:
> > The cdclk tables were introduced with commit 736da8112fee ("drm/i915:
> > Use literal representation of cdclk tables"). It has been almost 4 years
> > and the divider fie
On Tue, Nov 28, 2023 at 10:43:36AM +0200, Ville Syrjälä wrote:
> On Mon, Nov 27, 2023 at 08:21:46AM -0800, Matt Roper wrote:
> > On Fri, Nov 24, 2023 at 05:55:23PM -0300, Gustavo Sousa wrote:
> > > The cdclk tables were introduced with commit 736da8112fee ("drm/i915:
> > > Use literal representatio
On Tue, Nov 28, 2023 at 10:43:36AM +0200, Ville Syrjälä wrote:
> On Mon, Nov 27, 2023 at 08:21:46AM -0800, Matt Roper wrote:
> > On Fri, Nov 24, 2023 at 05:55:23PM -0300, Gustavo Sousa wrote:
> > > The cdclk tables were introduced with commit 736da8112fee ("drm/i915:
> > > Use literal representatio
== Series Details ==
Series: QGV/SAGV related fixes
URL : https://patchwork.freedesktop.org/series/126962/
State : warning
== Summary ==
Error: dim checkpatch failed
e47332e38255 drm/i915: Add meaningful traces for QGV point info error handling
0ae02a74f8db drm/i915: Extract code required to c
== Series Details ==
Series: QGV/SAGV related fixes
URL : https://patchwork.freedesktop.org/series/126962/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:116:1: warning: unr
== Series Details ==
Series: QGV/SAGV related fixes
URL : https://patchwork.freedesktop.org/series/126962/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13931 -> Patchwork_126962v1
Summary
---
**FAILURE**
Serious
On Tue, Nov 28, 2023 at 10:43:36AM +0200, Ville Syrjälä wrote:
> On Mon, Nov 27, 2023 at 08:21:46AM -0800, Matt Roper wrote:
> > On Fri, Nov 24, 2023 at 05:55:23PM -0300, Gustavo Sousa wrote:
> > > The cdclk tables were introduced with commit 736da8112fee ("drm/i915:
> > > Use literal representatio
Hi Stephen,
On Wed, Nov 22, 2023 at 1:29 AM Stephen Rothwell wrote:
> Today's linux-next merge of the drm tree got a conflict in:
>
> drivers/accel/ivpu/ivpu_hw_37xx.c
>
> between commit:
>
> 3f7c0634926d ("accel/ivpu/37xx: Fix hangs related to MMIO reset")
>
> from the drm-misc-fixes tree an
WAs 14011508470, 14011503030 were applied on IP versions beyond which
they are applicable. Fixed the IP version checks for these workarounds.
Signed-off-by: Balasubramani Vivekanandan
---
drivers/gpu/drm/i915/display/intel_display_power.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(
On Tue, 28 Nov 2023, Manivannan Sadhasivam
wrote:
> On Tue, Nov 28, 2023 at 11:44:26AM +0530, Vignesh Raman wrote:
>> Hi Mani,
>>
>> On 28/11/23 10:44, Manivannan Sadhasivam wrote:
>> > On Tue, Nov 28, 2023 at 09:50:26AM +0530, Vignesh Raman wrote:
>> > > Commit a2458d8f618a ("PCI/ASPM: pci_enab
> -Original Message-
> From: Sousa, Gustavo
> Sent: Monday, November 27, 2023 8:18 PM
> To: Kahola, Mika ; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/display: Skip state verification
> with TBT-ALT mode
>
> Quoting Mika Kahola (2023-11-27 12:47:02-03:00)
On 28.11.2023 04:47, Paz Zcharya wrote:
On Mon, Nov 27, 2023 at 8:20 PM Paz Zcharya wrote:
On 21.11.2023 13:06, Andrzej Hajda wrote:
On 18.11.2023 00:01, Paz Zcharya wrote:
On Tue, Nov 14, 2023 at 10:13:59PM -0500, Rodrigo Vivi wrote:
On Sun, Nov 05, 2023 at 05:27:03PM +, Paz Zcharya w
> -Original Message-
> From: Sousa, Gustavo
> Sent: Monday, November 27, 2023 8:33 PM
> To: Jani Nikula ; Kahola, Mika
> ; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/display: Skip state verification
> with TBT-ALT mode
>
> Quoting Jani Nikula (2023-11-
On Tue, Nov 28, 2023 at 12:12:08PM +0100, Andrzej Hajda wrote:
> On 28.11.2023 04:47, Paz Zcharya wrote:
> >
> > On Mon, Nov 27, 2023 at 8:20 PM Paz Zcharya wrote:
> >
> > Hey Andrzej,
> >
> > On a second thought, what do you think about something like
> >
> > + gen8_pte_t __iome
nlock();
i915_active_release(ref);
+
+ ___wait_var_event(ref, i915_active_is_idle(ref),
+ TASK_INTERRUPTIBLE, 0, 0, schedule());
}
/* And wait for the retire callback */
---
base-commit: f5e7a8caf6f5520ceb37c0e2e0d359a110c7cf98
change-id: 202
From: Ville Syrjälä
A bit of refactoring around the cdclk/voltage_level stuff.
I also spotted that we were miscalculating the voltage level
on MTL in two different places, so included fixes (or rather
power optimizations) for those.
Ville Syrjälä (8):
drm/i915/cdclk: s/-1/~0/ when dealing wit
From: Ville Syrjälä
cdclk_pll_is_unknown() used ~0 when checking for the "VCO is
unknown" value, but the assignment uses -1. They are the same
in the end, but let's use the same ~0 form on both sides for
consistency.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_cdclk.c |
From: Ville Syrjälä
Replace the slightly magic 'size = 16' with a bit more descriptive
name. We'll have another user for this value later on.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/dr
From: Ville Syrjälä
Currently we have a hardcoded assumption that the cd2x divider
is always 2 when squahsing is used. While that is true for all
current platforms it might not hold in the future. So eliminate
the assumption and calculate the correct divider from the other
parameters.
Signed-off
From: Ville Syrjälä
The cdclk->voltage_level if ladders are hard to read, especially as
they're written the other way around compared to how bspec lists
the limits. Let's rewrite them to use simple arrays that gives us
the max cdclk for each voltage level.
Signed-off-by: Ville Syrjälä
---
driv
From: Ville Syrjälä
Allow MTL to use voltage level 1 for 480MHz cdclk,
instead of the voltage level 2 that it's currently using.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/
From: Ville Syrjälä
The mess inside intel_ddi_compute_min_voltage_level() is illegible.
Clean it up a bit by splitting the internals into per-platform
functions.
TODO: make it a vfunc?
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 37 +++-
1 f
From: Ville Syrjälä
On MTL we need to bump the voltage level to only 1 (not 2)
when port clock exceeds 594MHz. Make it so.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/displ
From: Ville Syrjälä
Drop the redundant dev_priv parameters from
intel_ddi_compute_min_voltage_level() to make life easier.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c| 9 +
drivers/gpu/drm/i915/display/intel_ddi.h| 3 +--
drivers/gpu/drm/i915/displ
On Tue, Nov 28, 2023 at 11:51:43AM +0200, Ville Syrjälä wrote:
> On Tue, Nov 28, 2023 at 10:43:36AM +0200, Ville Syrjälä wrote:
> > On Mon, Nov 27, 2023 at 08:21:46AM -0800, Matt Roper wrote:
> > > On Fri, Nov 24, 2023 at 05:55:23PM -0300, Gustavo Sousa wrote:
> > > > The cdclk tables were introduc
On Mon, 27 Nov 2023, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Apparently some BXT/GLK systems have DSI panels whose timings
> don't agree with the normal cpu transcoder hblank>=32 limitation.
> This is perhaps fine as there are no specific hblank/etc. limits
> listed for the BXT/GLK DSI tra
On Mon, 27 Nov 2023, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> .mode_valid_ctx() returns an errno, not the mode status. Fix
> the code to do the right thing.
>
> Cc: Stanislav Lisovskiy
> Fixes: d51f25eb479a ("drm/i915: Add DSC support to MST path")
> Signed-off-by: Ville Syrjälä
Reviewed
On Mon, 27 Nov 2023, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> We have no bigjoiner support in the MST code, so .mode_valid()
> pretending otherwise is just going to result black screens for
> users. Reject any mode that needs the joiner.
>
> Cc: Stanislav Lisovskiy
> Fixes: d51f25eb479a ("
Quoting Balasubramani Vivekanandan (2023-11-28 07:24:51-03:00)
>WAs 14011508470, 14011503030 were applied on IP versions beyond which
>they are applicable. Fixed the IP version checks for these workarounds.
>
>Signed-off-by: Balasubramani Vivekanandan
>
>---
> drivers/gpu/drm/i915/display/intel_di
On Mon, 27 Nov 2023, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Use the >= and < operators for the DISPLAY_VER checks everywhere.
> This is what most of the code does, but especially recently random
> pieces of code have started doing this differently for no good reason.
I suppose all the <
On Sun, 26 Nov 2023, Rahul Rameshbabu wrote:
> Dump the iir value in hex when the interrupt is unexpected.
>
> Link: https://gitlab.freedesktop.org/drm/intel/-/issues/9652#note_2178501
> Cc: Jani Nikula
> Signed-off-by: Rahul Rameshbabu
> Reviewed-by: Chaitanya Kumar Borah
Pushed to drm-intel-
On Tue, Nov 28, 2023 at 02:22:23PM +0200, Jani Nikula wrote:
> On Mon, 27 Nov 2023, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Apparently some BXT/GLK systems have DSI panels whose timings
> > don't agree with the normal cpu transcoder hblank>=32 limitation.
> > This is perhaps fine as
On Tue, 28 Nov 2023, Ville Syrjälä wrote:
> On Tue, Nov 28, 2023 at 02:22:23PM +0200, Jani Nikula wrote:
>> On Mon, 27 Nov 2023, Ville Syrjala wrote:
>> > From: Ville Syrjälä
>> >
>> > Apparently some BXT/GLK systems have DSI panels whose timings
>> > don't agree with the normal cpu transcoder h
Quoting Stanislav Lisovskiy (2023-11-28 05:37:52-03:00)
>For debug purposes we need those - error path won't flood the log,
>however there has been already numerous cases, when due to lack
>of debugs, we couldn't immediately tell what was the problem on
>customer machine, which slowed down the inve
On Tue, Nov 28, 2023 at 02:47:35PM +0200, Jani Nikula wrote:
> On Tue, 28 Nov 2023, Ville Syrjälä wrote:
> > On Tue, Nov 28, 2023 at 02:22:23PM +0200, Jani Nikula wrote:
> >> On Mon, 27 Nov 2023, Ville Syrjala wrote:
> >> > From: Ville Syrjälä
> >> >
> >> > Apparently some BXT/GLK systems have D
On Tue, 28 Nov 2023, Vignesh Raman wrote:
> On 28/11/23 12:21, Manivannan Sadhasivam wrote:
>> On Tue, Nov 28, 2023 at 11:44:26AM +0530, Vignesh Raman wrote:
>>> Hi Mani,
>>>
>>> On 28/11/23 10:44, Manivannan Sadhasivam wrote:
On Tue, Nov 28, 2023 at 09:50:26AM +0530, Vignesh Raman wrote:
>>>
Am 28.11.23 um 13:50 schrieb Weixi Zhu:
The problem:
Accelerator driver developers are forced to reinvent external MM subsystems
case by case, because Linux core MM only considers host memory resources.
These reinvented MM subsystems have similar orders of magnitude of LoC as
Linux MM (80K), e.g
Adding a few missing important people to the explicit to list.
Am 28.11.23 um 13:50 schrieb Weixi Zhu:
The problem:
Accelerator driver developers are forced to reinvent external MM subsystems
case by case, because Linux core MM only considers host memory resources.
These reinvented MM subsystem
On Thu, Nov 23, 2023 at 09:41:20AM +0200, Jouni Högander wrote:
> We are preparing for Xe driver. Backing object implementation is differing
> between i915 and Xe. Split i915 specific code into separate source file
> built only for i915.
>
> v6: Add missing intel_fb_bo.[ch]
> v5:
> - Keep drm_an
On Thu, Nov 23, 2023 at 09:41:17AM +0200, Jouni Högander wrote:
> We are preparing for Xe driver. I915 and Xe object implementation are
> differing. Do not use i915_gem_object->base directly. Instead use
> intel_bo_to_drm_bo.
>
> Also use drm_gem_object_put instead of i915_gem_object_put. This sh
On Thu, Nov 23, 2023 at 09:41:19AM +0200, Jouni Högander wrote:
> Lookup_modifier is returning INTEL_PLANE_CAP_TILING_4 on invalid
> fb_modifier value. Use lookup_modifier_or_null in
> intel_fb_modifier_to_tiling and return I915_TILING_NONE in case
> lookup_modifier_or_null returns null.
>
> Signe
On Tue, Nov 28, 2023 at 12:39:02PM +0200, Jani Nikula wrote:
> On Tue, 28 Nov 2023, Manivannan Sadhasivam
> wrote:
> > On Tue, Nov 28, 2023 at 11:44:26AM +0530, Vignesh Raman wrote:
> >> Hi Mani,
> >>
> >> On 28/11/23 10:44, Manivannan Sadhasivam wrote:
> >> > On Tue, Nov 28, 2023 at 09:50:26AM
On 28/11/23 12:21, Manivannan Sadhasivam wrote:
On Tue, Nov 28, 2023 at 11:44:26AM +0530, Vignesh Raman wrote:
Hi Mani,
On 28/11/23 10:44, Manivannan Sadhasivam wrote:
On Tue, Nov 28, 2023 at 09:50:26AM +0530, Vignesh Raman wrote:
Commit a2458d8f618a ("PCI/ASPM: pci_enable_link_state: Add a
[AMD Official Use Only - General]
-Original Message-
From: amd-gfx On Behalf Of Hamza Mahfooz
Sent: Monday, November 27, 2023 10:53 AM
To: Christian König ;
jani.nik...@linux.intel.com; kher...@redhat.com; d...@redhat.com;
za...@vmware.com; Olsak, Marek ;
linux-graphics-maintai...@vmwa
This patch adds an abstraction layer, struct vm_object, that maintains
per-process virtual-to-physical mapping status stored in struct gm_mapping.
For example, a virtual page may be mapped to a CPU physical page or to a
device physical page. Struct vm_object effectively maintains an
arch-independen
This patch resolves potential VMA conflicts when
mmap(MAP_PRIVATE | MAP_PEER_SHARED) is invoked. Note that the semantic of
mmap(MAP_PRIVATE | MAP_PEER_SHARED) is to provide a coherent view of memory
through the allocated virtual addresses between the CPU and all attached
devices. However, an attach
This patch adds a new NUMA node state, named N_HETEROGENEOUS. It is
utilized to identify heterogeneous NUMA (hNUMA) node. Note that hNUMA node
may not be directly accessible by the CPU.
Each hNUMA node can be identified with a NUMA id. This can be extended to
provide NUMA topology including device
On Tue, Nov 28, 2023 at 11:44:26AM +0530, Vignesh Raman wrote:
> Hi Mani,
>
> On 28/11/23 10:44, Manivannan Sadhasivam wrote:
> > On Tue, Nov 28, 2023 at 09:50:26AM +0530, Vignesh Raman wrote:
> > > Commit a2458d8f618a ("PCI/ASPM: pci_enable_link_state: Add argument
> > > to acquire bus lock") has
Commit a2458d8f618a ("PCI/ASPM: pci_enable_link_state: Add argument
to acquire bus lock") has added an argument to acquire bus lock
in pci_enable_link_state, but qcom_pcie_enable_aspm calls it
without this argument, resulting in below build error.
drivers/pci/controller/dwc/pcie-qcom.c:973:9: erro
Hi Mani,
On 28/11/23 10:44, Manivannan Sadhasivam wrote:
On Tue, Nov 28, 2023 at 09:50:26AM +0530, Vignesh Raman wrote:
Commit a2458d8f618a ("PCI/ASPM: pci_enable_link_state: Add argument
to acquire bus lock") has added an argument to acquire bus lock
in pci_enable_link_state, but qcom_pcie_ena
This patch adds a new syscall, hmadvise(), to issue memory hints for
heterogeneous NUMA nodes. The new syscall effectively extends madvise()
with one additional argument that indicates the NUMA id of a heterogeneous
device, which is not necessarily accessible by the CPU.
The implemented memory hin
Accelerator driver developers are forced to reinvent external MM subsystems
case by case, introducing redundant code (14K~70K for each case). This is
because Linux core MM only considers host memory resources. At the same
time, application-level developers suffer from poor programmability -- they
m
This patch extends Linux core MM to support unified virtual address space.
A unified virtual address space provides a coherent view of memory for the
CPU and devices. This is achieved by maintaining coherent page tables for
the CPU and any attached devices for each process, without assuming that
th
The problem:
Accelerator driver developers are forced to reinvent external MM subsystems
case by case, because Linux core MM only considers host memory resources.
These reinvented MM subsystems have similar orders of magnitude of LoC as
Linux MM (80K), e.g. Nvidia-UVM has 70K, AMD GPU has 14K and
On Tue, Nov 28, 2023 at 09:50:26AM +0530, Vignesh Raman wrote:
> Commit a2458d8f618a ("PCI/ASPM: pci_enable_link_state: Add argument
> to acquire bus lock") has added an argument to acquire bus lock
> in pci_enable_link_state, but qcom_pcie_enable_aspm calls it
> without this argument, resulting in
== Series Details ==
Series: drm/i915/display: Skip state verification with TBT-ALT mode
URL : https://patchwork.freedesktop.org/series/126933/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13928 -> Patchwork_126933v1
Summa
== Series Details ==
Series: series starting with [1/4] drm/i915: Skip some timing checks on BXT/GLK
DSI transcoders (rev2)
URL : https://patchwork.freedesktop.org/series/126923/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be
== Series Details ==
Series: series starting with [1/4] drm/i915: Skip some timing checks on BXT/GLK
DSI transcoders (rev2)
URL : https://patchwork.freedesktop.org/series/126923/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13934 -> Patchwork_126923v2
===
Intel fb creation is differing between Xe and i915 due to different
implementations of backing object. This patch set is splitting i915
specific code into it's own source file. Similar source files will be
introduced for Xe as well.
Also use intel_bo_to_drm_bo instead of directly referring
i915_ge
We are preparing for Xe driver. I915 and Xe object implementation are
differing. Do not use i915_gem_object->base directly. Instead use
intel_bo_to_drm_bo.
Also use drm_gem_object_put instead of i915_gem_object_put. This should be
ok as i915_gem_object_put is really just doing __drm_gem_object_p
We are about to split i915 specific code from intel_fb.c. Convert
intel_fb_modifier_to_tiling as non-static to allow calling it from split
code.
Signed-off-by: Jouni Högander
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_fb.c | 40 -
drivers/gpu/drm/i
We are preparing for Xe driver. Backing object implementation is differing
between i915 and Xe. Split i915 specific code into separate source file
built only for i915.
v7:
- drop #include
- s/user_mode_cmd/mode_cmd/
- Use passed i915 pointer instead of to_i915(obj->base.dev)
v6: Add missing
Lookup_modifier is returning INTEL_PLANE_CAP_TILING_4 on invalid
fb_modifier value. Use lookup_modifier_or_null in
intel_fb_modifier_to_tiling and return I915_TILING_NONE in case
lookup_modifier_or_null returns null.
Signed-off-by: Jouni Högander
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i
On Tue, 2023-11-28 at 15:29 +0200, Ville Syrjälä wrote:
> On Thu, Nov 23, 2023 at 09:41:20AM +0200, Jouni Högander wrote:
> > We are preparing for Xe driver. Backing object implementation is
> > differing
> > between i915 and Xe. Split i915 specific code into separate source
> > file
> > built only
On Mon, Nov 27, 2023 at 09:10:54AM -0800, Linus Torvalds wrote:
> On Mon, 27 Nov 2023 at 02:27, Christian Brauner wrote:
> >
> > So I've picked up your patch (vfs.misc). It's clever alright so thanks
> > for the comments in there otherwise I would've stared at this for far
> > too long.
>
> Note
On Tue, Nov 28, 2023 at 03:54:51PM +0530, Balasubramani Vivekanandan wrote:
> WAs 14011508470, 14011503030 were applied on IP versions beyond which
> they are applicable. Fixed the IP version checks for these workarounds.
>
> Signed-off-by: Balasubramani Vivekanandan
>
Reviewed-by: Matt Roper
On Tue, Nov 28, 2023 at 05:03:51AM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/dg2: Drop Wa_22014600077
> URL : https://patchwork.freedesktop.org/series/126942/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_13929_full -> Patchwork_126942v1_ful
Never block for outstanding work on userptr object upon receipt of a
mmu-notifier. The reason we originally did so was to immediately unbind
the userptr and unpin its pages, but since that has been dropped in
commit b4b9731b02c3c ("drm/i915: Simplify userptr locking"), we never
return the pages to
== Series Details ==
Series: series starting with [1/4] drm/i915: Skip some timing checks on BXT/GLK
DSI transcoders (rev2)
URL : https://patchwork.freedesktop.org/series/126923/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13934_full -> Patchwork_126923v2_full
=
On Mon, Nov 27, 2023 at 12:11:50PM -0800, Alan Previn wrote:
> Add missing tag for "Wa_14019159160 - Case 2" (for existing
> PXP code that ensures run alone mode bit is set to allow
> PxP-decryption.
>
> v3: - Check targeted platforms using IP_VAL. (John Harrison)
> v2: - Fix WA id number (John
From: Clint Taylor
DDC pin mapping for DGFX cards uses direct VBT pin mapping
Cc: Lucas De Marchi
Cc: Matt Roper
Signed-off-by: Clint Taylor
Reviewed-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_bios.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/dr
On Tue, Nov 28, 2023 at 05:39:20PM +0200, Jouni Högander wrote:
> We are preparing for Xe driver. Backing object implementation is differing
> between i915 and Xe. Split i915 specific code into separate source file
> built only for i915.
>
> v7:
> - drop #include
> - s/user_mode_cmd/mode_cmd/
== Series Details ==
Series: series starting with [1/5] drm/i915/psr: Include some basic PSR
information in the state dump (rev2)
URL : https://patchwork.freedesktop.org/series/126859/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit wo
== Series Details ==
Series: series starting with [1/5] drm/i915/psr: Include some basic PSR
information in the state dump (rev2)
URL : https://patchwork.freedesktop.org/series/126859/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13939 -> Patchwork_126859v2
=
== Series Details ==
Series: drm/i915/display: Fix IP version of the WAs
URL : https://patchwork.freedesktop.org/series/126967/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13939 -> Patchwork_126967v1
Summary
---
**
== Series Details ==
Series: drm/i915/selftests: wait for active idle event in
i915_active_unlock_wait
URL : https://patchwork.freedesktop.org/series/126978/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13940 -> Patchwork_126978v1
== Series Details ==
Series: drm/i915: cdclk/voltage_level cleanups and fixes
URL : https://patchwork.freedesktop.org/series/126979/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bi
== Series Details ==
Series: drm/i915: cdclk/voltage_level cleanups and fixes
URL : https://patchwork.freedesktop.org/series/126979/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13940 -> Patchwork_126979v1
Summary
---
== Series Details ==
Series: PCI: qcom: Fix compile error
URL : https://patchwork.freedesktop.org/series/126987/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
== Series Details ==
Series: PCI: qcom: Fix compile error
URL : https://patchwork.freedesktop.org/series/126987/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13941 -> Patchwork_126987v1
Summary
---
**SUCCESS**
No
== Series Details ==
Series: drm/i915/display: Skip state verification with TBT-ALT mode
URL : https://patchwork.freedesktop.org/series/126933/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13928 -> Patchwork_126933v1
Summa
== Series Details ==
Series: Supporting GMEM (generalized memory management) for external memory
devices
URL : https://patchwork.freedesktop.org/series/126986/
State : failure
== Summary ==
Error: make failed
CALLscripts/checksyscalls.sh
DESCEND objtool
INSTALL libsubcmd_headers
C
== Series Details ==
Series: Prepare intel_fb for Xe (rev8)
URL : https://patchwork.freedesktop.org/series/126507/
State : warning
== Summary ==
Error: dim checkpatch failed
3c9de2e1382f drm/i915/display: use intel_bo_to_drm_bo in intel_fb.c
caa9b612d5f7 drm/i915/display: Convert intel_fb_modi
== Series Details ==
Series: Prepare intel_fb for Xe (rev8)
URL : https://patchwork.freedesktop.org/series/126507/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:116:1: warn
== Series Details ==
Series: drm/i915/display: Skip state verification with TBT-ALT mode
URL : https://patchwork.freedesktop.org/series/126933/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13928 -> Patchwork_126933v1
Summa
== Series Details ==
Series: Prepare intel_fb for Xe (rev8)
URL : https://patchwork.freedesktop.org/series/126507/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13943 -> Patchwork_126507v8
Summary
---
**SUCCESS**
On Tue, 28 Nov 2023 at 23:07, Christian König wrote:
>
> Am 28.11.23 um 13:50 schrieb Weixi Zhu:
> > The problem:
> >
> > Accelerator driver developers are forced to reinvent external MM subsystems
> > case by case, because Linux core MM only considers host memory resources.
> > These reinvented M
== Series Details ==
Series: drm/i915/gem: Atomically invalidate userptr on mmu-notifier
URL : https://patchwork.freedesktop.org/series/126998/
State : warning
== Summary ==
Error: dim checkpatch failed
f524462a283b drm/i915/gem: Atomically invalidate userptr on mmu-notifier
-:117: WARNING:FIL
== Series Details ==
Series: drm/i915/gem: Atomically invalidate userptr on mmu-notifier
URL : https://patchwork.freedesktop.org/series/126998/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/gem: Atomically invalidate userptr on mmu-notifier
URL : https://patchwork.freedesktop.org/series/126998/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13943 -> Patchwork_126998v1
Summa
== Series Details ==
Series: drm/i915/dgfx: DGFX uses direct VBT pin mapping (rev2)
URL : https://patchwork.freedesktop.org/series/113677/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13943 -> Patchwork_113677v2
Summary
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