On Mon, 09 Oct 2023, Nathan Chancellor wrote:
> On Sun, Oct 08, 2023 at 12:28:46AM +0900, Masahiro Yamada wrote:
>> On Fri, Oct 6, 2023 at 9:35 PM Jani Nikula wrote:
>> >
>> > The kernel top level Makefile, and recently scripts/Makefile.extrawarn,
>> > have included -Wall, and the disables -Wno-f
On Fri, 06 Oct 2023, Nathan Chancellor wrote:
> On Fri, Oct 06, 2023 at 03:34:47PM +0300, Jani Nikula wrote:
>> We enable a bunch more compiler warnings than the kernel
>> defaults. However, they've drifted to become a unique set of warnings,
>> and have increasingly fallen behind from the W=1 set
On 09/10/2023 18:29, Jonathan Cavitt wrote:
From: Prathap Kumar Valsan
The GuC firmware had defined the interface for Translation Look-Aside
Buffer (TLB) invalidation. We should use this interface when
invalidating the engine and GuC TLBs.
Add additional functionality to intel_gt_invalidate_
On Tue, 10 Oct 2023, Jani Nikula wrote:
> On Mon, 09 Oct 2023, Nathan Chancellor wrote:
>> On Sun, Oct 08, 2023 at 12:28:46AM +0900, Masahiro Yamada wrote:
>>> On Fri, Oct 6, 2023 at 9:35 PM Jani Nikula wrote:
>>> >
>>> > The kernel top level Makefile, and recently scripts/Makefile.extrawarn,
>>
On 09/10/2023 18:29, Jonathan Cavitt wrote:
For the gt_tlb live selftest, when operating on the GSC engine,
increase the timeout from 10 ms to 200 ms because the GSC
engine is a bit slower than the rest.
And others from 10ms to 20ms. By accident or deliberate?
Regards,
Tvrtko
Signed-off-b
On 09/10/2023 20:14, John Harrison wrote:
On 10/9/2023 01:56, Tvrtko Ursulin wrote:
On 06/10/2023 19:20, Jonathan Cavitt wrote:
From: Prathap Kumar Valsan
The GuC firmware had defined the interface for Translation Look-Aside
Buffer (TLB) invalidation. We should use this interface when
inva
On Mon, Oct 09, 2023 at 05:48:04PM +0300, Ville Syrjälä wrote:
> On Fri, Oct 06, 2023 at 04:37:09PM +0300, Imre Deak wrote:
> > Check only the eDP or the DP specific DPCD revision depending on the
> > sink type. Pass the corresponding revision to the function, which allows
> > getting the DSC caps
== Series Details ==
Series: drm/i915/gt: Temporarily force MTL into uncached mode
URL : https://patchwork.freedesktop.org/series/124866/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13732_full -> Patchwork_124866v1_full
S
On 08/10/2023 17:48, Andi Shyti wrote:
From: Radhakrishna Sripada
Meteor Lake has demonstrated consistent stability for some time.
All user-space API modifications tide to its core platform
functions are operational.
The necessary firmware components are set up and comprehensive
testing has
Watchdorg timers for Lunarlake HW were removed for PSR/PSR2
The patch removes the use of these timers from the driver code.
BSpec: 69895
v2: Reword commit message (Ville)
Drop HPD mask from LNL (Ville)
Revise masking logic (Jouni)
v3: Revise commit message (Ville)
Revert HPD mask remo
On Fri, Oct 06, 2023 at 05:59:06PM +0300, Lisovskiy, Stanislav wrote:
> On Fri, Oct 06, 2023 at 04:37:09PM +0300, Imre Deak wrote:
> > Check only the eDP or the DP specific DPCD revision depending on the
> > sink type. Pass the corresponding revision to the function, which allows
> > getting the DS
Hi Kamil,
Thanks for review.
On Monday, 9 October 2023 19:37:31 CEST Kamil Konieczny wrote:
> Hi Janusz,
> On 2023-10-09 at 14:28:00 +0200, Janusz Krzysztofik wrote:
> > We are going to add support for reading a list of kunit test cases
> > provided by a kunit test module prior to executing those
== Series Details ==
Series: drm/i915/display: Free crtc_state in verify_crtc_state (rev2)
URL : https://patchwork.freedesktop.org/series/124811/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13733 -> Patchwork_124811v2
Sum
== Series Details ==
Series: drm/i915: Remove the module parameter 'fastboot' (rev4)
URL : https://patchwork.freedesktop.org/series/124255/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
From: Tvrtko Ursulin
When I moved the client name to be last, I did not account for the fact
current code skips showing engine utilisation until at least two sampling
periods have passed. Consequence of this is that client name gets printed
as the second field and not under the "NAME" column head
From: Tvrtko Ursulin
A collection of small fixes around various edge case scenarios.
Tvrtko Ursulin (4):
tools/intel_gpu_top: Fix clients header width when no clients
tools/intel_gpu_top: Fix client layout on first sample period
tools/intel_gpu_top: Optimise interactive display a bit
too
From: Tvrtko Ursulin
Padding the percentage bars and table columns with spaces happens quite a
lot so lets do better than putchar at a time. Have a table of visually
empty strings and build the required length out of those chunks.
While at it, also move the percentage bar table into its function
From: Tvrtko Ursulin
Recent refactoring broke the clients header in cases when there are no
clients displayed. To fix it we need to account the width of the "NAME"
label.
Signed-off-by: Tvrtko Ursulin
---
tools/intel_gpu_top.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff
From: Tvrtko Ursulin
Instead of asserting just skip trying to print columns when terminal is
too narrow.
At the same time fix some type confusion to fix calculations going huge.
Signed-off-by: Tvrtko Ursulin
Closes: https://gitlab.freedesktop.org/drm/igt-gpu-tools/-/issues/143
---
tools/intel
== Series Details ==
Series: drm/i915: Remove the module parameter 'fastboot' (rev4)
URL : https://patchwork.freedesktop.org/series/124255/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13733 -> Patchwork_124255v4
Summary
-
Hi Tvrtko,
> > Meteor Lake has demonstrated consistent stability for some time.
> > All user-space API modifications tide to its core platform
> > functions are operational.
> >
> > The necessary firmware components are set up and comprehensive
> > testing has been condused over a period.
> >
>
Check only the eDP or the DP specific DPCD revision depending on the
sink type. Pass the corresponding revision to the function, which allows
getting the DSC caps of a branch device (in an MST topology, which has
its own DPCD and so DPCD revision).
While at it use DP_DPCD_REV_14 instead of open co
In an MST topology the DSC capabilities are specific to each connector,
retrieved either from the sink if it decompresses the stream, or from a
branch device between the source and the sink in case this branch device
does the decompression. Accordingly each connector needs to cache its
own DSC DPCD
Similarly to eDP and SST-DP connectors read out the DSC capabilities for
MST connectors as well. Atm these will match the root port's DSC caps
and only used after a follow-up change enables the decompression for
each stream separately (vs. the current way of enabling it only globally
in the first b
The previous patches converted all users of the DSC DPCD caps to look
these up from the connector, so remove the version stored in intel_dp.
A follow-up patchset will read out the MST connector specific
capabilities in intel_dp_add_mst_connector() ->
intel_dp_mst_read_decompression_port_dsc_caps()
== Series Details ==
Series: More print message helper updates (rev2)
URL : https://patchwork.freedesktop.org/series/124853/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13732_full -> Patchwork_124853v2_full
Summary
--
Currently all module parameters are handled by i915_param.c/h. This
is a problem for display parameters when Xe driver is used.
This patch set adds a mechanism to add parameters specific to the
display. This is mainly copied from existing i915 parameters
implementation with some naming changes and
GPU error dump contained all module parameters. If we are moving
display parameters to intel_display_params.[ch] they are not dumped
into GPU error dump. This patch is adding moved display parameters
back to GPU error dump.
Signed-off-by: Jouni Högander
---
.../drm/i915/display/intel_display_par
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/i9xx_wm.c | 2 +-
drivers/gpu/drm/i915/display/intel_display_params.c | 4
drivers/gpu/drm/i915/display/intel_display_params.h | 3 ++-
drivers/gpu/drm/i915/display/intel_fbc.c| 10 +-
drivers/
Currently all module parameters are handled by i915_param.c/h. This
is a problem for display parameters when Xe driver is used. Add
a mechanism to add parameters specific to the display. This is mainly
copied from i915_[debugfs]_params.[ch]. Parameters are not yet moved. This
is done by subsequent
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/display/intel_opregion.c | 2 +-
drivers/gpu/drm/i915/i915_params.c | 3 ---
drivers/gpu/drm/i915/i
Signed-off-by: Jouni Högander
---
.../gpu/drm/i915/display/intel_display_params.c | 15 +++
.../gpu/drm/i915/display/intel_display_params.h | 5 +
drivers/gpu/drm/i915/display/intel_psr.c | 14 +++---
drivers/gpu/drm/i915/i915_params.c| 15 ---
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_display_params.c | 4
drivers/gpu/drm/i915/display/intel_display_params.h | 3 ++-
drivers/gpu/drm/i915/display/intel_lvds.c | 4 ++--
drivers/gpu/drm/i915/i915_params.c | 4
drivers/gpu/drm/
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_display_params.c | 4
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/display/intel_panel.c | 4 ++--
drivers/gpu/drm/i915/i915_params.c | 4
drivers/gpu/drm/i9
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_bios.c | 2 +-
drivers/gpu/drm/i915/display/intel_display_params.c | 4
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/i915_params.c | 4
drivers/gpu/drm/i915
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_display_params.c | 5 +
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/display/intel_display_power.c | 2 +-
drivers/gpu/drm/i915/i915_params.c | 5 -
drivers/gpu/drm/i9
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/display/intel_dpt.c| 6 --
drivers/gpu/drm/i915/display/intel_fb.c | 2 +-
drivers/gpu/drm/i91
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/display/skl_watermark.c| 5 +++--
drivers/gpu/drm/i915/i915_params.c | 3 ---
drivers/gpu/drm/i91
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_display_params.c | 4
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/display/intel_display_power.c | 12 ++--
drivers/gpu/drm/i915/i915_params.c | 4
driver
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/hsw_ips.c | 4 ++--
drivers/gpu/drm/i915/display/intel_display_params.c | 2 ++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/i915_params.c | 2 --
drivers/gpu/drm/i915/i
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_backlight.c | 9 +
drivers/gpu/drm/i915/display/intel_display_params.c | 9 -
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/i915_params.c | 7 ---
drive
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_display_params.c | 4
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 4 ++--
drivers/gpu/drm/i915/i915_params.c| 4
drivers/gp
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_bios.c | 4 ++--
drivers/gpu/drm/i915/display/intel_display_params.c | 6 ++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/i915_params.c | 6 --
drivers/gpu/dr
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_display.c| 4 ++--
drivers/gpu/drm/i915/display/intel_display_params.c | 5 +
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/i915_params.c | 5 -
drivers/gpu/drm/
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_crt.c| 4 ++--
drivers/gpu/drm/i915/display/intel_display_params.c | 4
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/i915_params.c | 4
drivers/gpu/drm/i9
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_display_params.c | 4
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/display/intel_display_reset.c | 2 +-
drivers/gpu/drm/i915/i915_params.c | 4
drivers/gpu/drm/i915
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_display_device.c | 3 ++-
drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/i915_params.c | 3 ---
drivers/gpu/drm/i915/
Also make module parameter as non writable.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_display.h | 2 +-
drivers/gpu/drm/i915/i915_params.c | 3 +--
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.h
b/
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_display.h| 2 +-
drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/i915_params.c | 3 ---
drivers/gpu/drm/i915/i
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_display_device.c | 2 +-
drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/i915_params.c | 3 ---
drivers/gpu/drm/i915/i
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 6 +++---
drivers/gpu/drm/i915/i915_params.c | 3 ---
drivers/gpu/drm/i9
Generally we have writable device parameters in debugfs. No need
to allow writing module parameters.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_display_params.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_displa
On Tue, 2023-10-10 at 12:52 +0300, Mika Kahola wrote:
> Watchdorg timers for Lunarlake HW were removed for PSR/PSR2
> The patch removes the use of these timers from the driver code.
>
> BSpec: 69895
>
> v2: Reword commit message (Ville)
> Drop HPD mask from LNL (Ville)
> Revise masking lo
On 25.09.2023 15:13, Andrzej Hajda wrote:
After spinlock release object can be modified/freed by concurrent thread.
Using it in such case is error prone, even for printing object state.
To avoid such situation local copy of the object is created if necessary.
Signed-off-by: Andrzej Hajda
---
v2
Hi Andrzej,
On Tue, Oct 10, 2023 at 02:02:54PM +0200, Andrzej Hajda wrote:
> On 25.09.2023 15:13, Andrzej Hajda wrote:
> > After spinlock release object can be modified/freed by concurrent thread.
> > Using it in such case is error prone, even for printing object state.
> > To avoid such situation
Hi,
I might have picked up the wrong series and missed some reviews
and the extra patch from Nirmoy with a real use of the
drm_dbg_ratelimited() that John was looking for.
Thanks,
Andi
v2:
pick the right patch with the following changes:
- add more r-b's
- add a patch 2 where the drm_dbg_ratel
From: Nirmoy Das
Add a function for ratelimitted debug print.
Signed-off-by: Nirmoy Das
Cc: Maarten Lankhorst
Cc: Maxime Ripard
Cc: Thomas Zimmermann
Cc: David Airlie
Cc: Daniel Vetter
Reviewed-by: Matthew Auld
Reviewed-by: Andrzej Hajda
Reviewed-by: Andi Shyti
Reviewed-by: Sam Ravnborg
From: Nirmoy Das
Test like i915_gem_mman_live_selftests/igt_mmap_migrate can cause
dmesg spamming. Use ratelimit api to reduce log rate.
References: https://gitlab.freedesktop.org/drm/intel/-/issues/7038
Signed-off-by: Nirmoy Das
Cc: Matthew Auld
Reviewed-by: Matthew Auld
Reviewed-by: Andrzej
Hi Tvrtko,
> On 09/10/2023 18:29, Jonathan Cavitt wrote:
> > For the gt_tlb live selftest, when operating on the GSC engine,
> > increase the timeout from 10 ms to 200 ms because the GSC
> > engine is a bit slower than the rest.
>
> And others from 10ms to 20ms. By accident or deliberate?
yes, a
On Mon, 9 Oct 2023 14:27:55 +0200
Janusz Krzysztofik wrote:
> There was an attempt to parse KTAP reports in the background while a kunit
> test module is loading. However, since dynamic sub-subtests can be
> executed only from the main thread, that attempt was not quite successful,
> as IGT res
-Original Message-
From: Andi Shyti
Sent: Tuesday, October 10, 2023 6:04 AM
To: Tvrtko Ursulin
Cc: Cavitt, Jonathan ;
intel-gfx@lists.freedesktop.org; Gupta, saurabhg ;
yu.bruce.ch...@intel.com; chris.p.wil...@linux.intel.com; Iddamsetty, Aravind
; Yang, Fei ; Harrison, John
C ; Das,
On Mon, Oct 09, 2023 at 04:38:56PM -0700, Jonathan Cavitt wrote:
> FIXME: CAT errors are cropping up on MTL. This removes them,
> but the real root cause must still be diagnosed.
Do you have a link to specific IGT test(s) that illustrate the CAT
errors so that we can ensure that they now appear f
FIXME: CAT errors are cropping up on MTL. This removes them,
but the real root cause must still be diagnosed.
Signed-off-by: Jonathan Cavitt
---
v2: Apply FIXME to shmem_utils as well.
drivers/gpu/drm/i915/gt/intel_gt.c | 6 +-
drivers/gpu/drm/i915/gt/intel_lrc.c| 5 -
drivers
Implement GuC-based TLB invalidations and use them on MTL.
v2:
- Add missing supporting patches.
v3:
- Split suspend/resume changes and multi-gt support into separate
patches.
- Only perform GuC TLB invalidation functions when supported.
- Move intel_guc_is_enabled check function to usage locat
Add device info flags for if GuC TLB Invalidation is enabled.
Signed-off-by: Jonathan Cavitt
---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/intel_device_info.h | 1 +
2 files changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/
Hi Matt,
On Tue, Oct 10, 2023 at 06:58:27AM -0700, Matt Roper wrote:
> On Mon, Oct 09, 2023 at 04:38:56PM -0700, Jonathan Cavitt wrote:
> > FIXME: CAT errors are cropping up on MTL. This removes them,
> > but the real root cause must still be diagnosed.
>
> Do you have a link to specific IGT tes
-Original Message-
From: Cavitt, Jonathan
Sent: Tuesday, October 10, 2023 8:01 AM
To: intel-gfx@lists.freedesktop.org
Cc: Gupta, saurabhg ; Cavitt, Jonathan
; chris.p.wil...@linux.intel.com; Iddamsetty,
Aravind ; Yang, Fei ; Shyti,
Andi ; Harrison, John C ; Das,
Nirmoy ; Krzysztofik,
Implement GuC-based TLB invalidations and use them on MTL.
v2:
- Add missing supporting patches.
v3:
- Split suspend/resume changes and multi-gt support into separate
patches.
- Only perform GuC TLB invalidation functions when supported.
- Move intel_guc_is_enabled check function to usage locat
It is not an error for GuC TLB invalidations to fail when the GT is
wedged or disabled, so do not process a wait failure as one in
guc_send_invalidate_tlb.
Signed-off-by: Fei Yang
Signed-off-by: Jonathan Cavitt
CC: John Harrison
---
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 18 +
Add device info flags for if GuC TLB Invalidation is enabled.
Signed-off-by: Jonathan Cavitt
---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/intel_device_info.h | 1 +
2 files changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/
Enable GuC TLB invalidations for MTL. Though more platforms than just
MTL support GuC TLB invalidations, MTL is presently the only platform
that requires it for any purpose, so only enable it there for now to
minimize cross-platform impact.
Signed-off-by: Jonathan Cavitt
---
drivers/gpu/drm/i91
Add a helper function to the GuC CT buffer that reports the expected
time to process all outstanding requests. As of now, there is no
functionality to check number of requests in the buffer, so the helper
function just reports 2 seconds, or 1ms per request up to the maximum
number of requests the
In case of GT is suspended, don't allow submission of new TLB invalidation
request and cancel all pending requests. The TLB entries will be
invalidated either during GuC reload or on system resume.
Signed-off-by: Fei Yang
Signed-off-by: Jonathan Cavitt
CC: John Harrison
---
drivers/gpu/drm/i91
From: Prathap Kumar Valsan
The GuC firmware had defined the interface for Translation Look-Aside
Buffer (TLB) invalidation. We should use this interface when
invalidating the engine and GuC TLBs.
Add additional functionality to intel_gt_invalidate_tlb, invalidating
the GuC TLBs and falling back
For the gt_tlb live selftest, when operating on the GSC engine,
increase the timeout from 10 ms to 200 ms because the GSC
engine is a bit slower than the rest.
Additionally, increase the default timeout from 10 ms to 20 ms
because msleep < 20ms can sleep for up to 20ms.
Signed-off-by: Jonathan Ca
Hi Jonathan,
On Tue, Oct 10, 2023 at 08:02:37AM -0700, Jonathan Cavitt wrote:
> Implement GuC-based TLB invalidations and use them on MTL.
I have to admit that I'm a bit biased on this series. Given this
premise, you can add
Reviewed-by: Andi Shyti
to all the patches.
Nevertheless to get thi
On Tue, Oct 10, 2023 at 1:50 AM Jani Nikula wrote:
>
> On Tue, 10 Oct 2023, Jani Nikula wrote:
> > On Mon, 09 Oct 2023, Nathan Chancellor wrote:
> >> On Sun, Oct 08, 2023 at 12:28:46AM +0900, Masahiro Yamada wrote:
> >>> On Fri, Oct 6, 2023 at 9:35 PM Jani Nikula wrote:
> >>> >
> >>> > The kern
Hi Janusz,
On 2023-10-09 at 14:27:55 +0200, Janusz Krzysztofik wrote:
> There was an attempt to parse KTAP reports in the background while a kunit
> test module is loading. However, since dynamic sub-subtests can be
> executed only from the main thread, that attempt was not quite successful,
> as
On Tue, Oct 10, 2023 at 05:11:54PM +0200, Andi Shyti wrote:
> Hi Matt,
>
> On Tue, Oct 10, 2023 at 06:58:27AM -0700, Matt Roper wrote:
> > On Mon, Oct 09, 2023 at 04:38:56PM -0700, Jonathan Cavitt wrote:
> > > FIXME: CAT errors are cropping up on MTL. This removes them,
> > > but the real root ca
Hi Matt,
> > > > FIXME: CAT errors are cropping up on MTL. This removes them,
> > > > but the real root cause must still be diagnosed.
> > >
> > > Do you have a link to specific IGT test(s) that illustrate the CAT
> > > errors so that we can ensure that they now appear fixed in CI?
> >
> > this
Hi Tvrtko,
On 2023-10-10 at 12:07:11 +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Recent refactoring broke the clients header in cases when there are no
> clients displayed. To fix it we need to account the width of the "NAME"
> label.
>
> Signed-off-by: Tvrtko Ursulin
Reviewed-by:
Hi Tvrtko,
On 2023-10-10 at 12:07:12 +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> When I moved the client name to be last, I did not account for the fact
> current code skips showing engine utilisation until at least two sampling
> periods have passed. Consequence of this is that clien
On Fri, Oct 06, 2023 at 04:37:08PM +0300, Imre Deak wrote:
> This patchset moves the DSC DPCD capabilities from the encoder
> (intel_dp) to the connector. This is required since in an MST topology
> each connector has its own version of these capabilities, allowing
> to configure/enable the DSC dec
On 10/10/2023 17:17, Andi Shyti wrote:
Hi Matt,
FIXME: CAT errors are cropping up on MTL. This removes them,
but the real root cause must still be diagnosed.
Do you have a link to specific IGT test(s) that illustrate the CAT
errors so that we can ensure that they now appear fixed in CI?
On Tue, Oct 10, 2023 at 06:17:27PM +0200, Andi Shyti wrote:
> Hi Matt,
>
> > > > > FIXME: CAT errors are cropping up on MTL. This removes them,
> > > > > but the real root cause must still be diagnosed.
> > > >
> > > > Do you have a link to specific IGT test(s) that illustrate the CAT
> > > > er
Hi Tvrtko,
On 2023-10-10 at 12:07:13 +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Padding the percentage bars and table columns with spaces happens quite a
> lot so lets do better than putchar at a time. Have a table of visually
> empty strings and build the required length out of thos
Hi Tvrtko,
On 2023-10-10 at 12:07:14 +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Instead of asserting just skip trying to print columns when terminal is
> too narrow.
>
> At the same time fix some type confusion to fix calculations going huge.
>
> Signed-off-by: Tvrtko Ursulin
> Cl
On Tue, Oct 10, 2023 at 05:42:28PM +0100, Tvrtko Ursulin wrote:
>
> On 10/10/2023 17:17, Andi Shyti wrote:
> > Hi Matt,
> >
> > > > > > FIXME: CAT errors are cropping up on MTL. This removes them,
> > > > > > but the real root cause must still be diagnosed.
> > > > >
> > > > > Do you have a lin
== Series Details ==
Series: drm/i915/display: Free crtc_state in verify_crtc_state (rev2)
URL : https://patchwork.freedesktop.org/series/124811/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13733_full -> Patchwork_124811v2_full
===
Hi Kamil,
Thanks for review.
On Tuesday, 10 October 2023 17:59:56 CEST Kamil Konieczny wrote:
> Hi Janusz,
> On 2023-10-09 at 14:27:55 +0200, Janusz Krzysztofik wrote:
> > There was an attempt to parse KTAP reports in the background while a kunit
> > test module is loading. However, since dynami
Hi Mauro,
Thanks for review.
On Tuesday, 10 October 2023 15:33:57 CEST Mauro Carvalho Chehab wrote:
> On Mon, 9 Oct 2023 14:27:55 +0200
> Janusz Krzysztofik wrote:
>
> > There was an attempt to parse KTAP reports in the background while a kunit
> > test module is loading. However, since dynam
On 10/10/2023 05:15, Andi Shyti wrote:
Hi,
I might have picked up the wrong series and missed some reviews
and the extra patch from Nirmoy with a real use of the
drm_dbg_ratelimited() that John was looking for.
Thanks,
Andi
I just found the original post of this from back in January
(https://p
== Series Details ==
Series: drm/i915: Remove the module parameter 'fastboot' (rev4)
URL : https://patchwork.freedesktop.org/series/124255/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13733_full -> Patchwork_124255v4_full
On 10/9/2023 19:26, Patchwork wrote:
Project List - Patchwork *Patch Details*
*Series:* More print message helper updates
*URL:* https://patchwork.freedesktop.org/series/124853/
*State:*failure
*Details:*
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124853v1/index.html
Use intel_crtc_destroy_state to avoid leakage of any resources
instead of the usual kfree
Signed-off-by: Suraj Kandpal
Suraj Kandpal (2):
drm/i915/display: Use intel_crtc_destroy_state instead kfree
drm/i915/display: Use correct method to free crtc_state
drivers/gpu/drm/i915/display/intel_
intel_encoder_current_mode() seems to leak some resource because
it uses kfree instead of intel_crtc_destroy_state let us fix that.
Fixes: de330815677d ("drm/i915: Reuse normal state readout for LVDS/DVO fixed
mode")
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/intel_display.c
Even though there is no leaking of resource here lets
just use the correct method to free crtc_state
Fixes: 8a3b3df39757 ("drm/i915: Clean up variable names in old dpll functions")
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/intel_dpll.c | 3 ++-
1 file changed, 2 insertions(+)
On 10/10/2023 07:36, Jonathan Cavitt wrote:
FIXME: CAT errors are cropping up on MTL. This removes them,
but the real root cause must still be diagnosed.
I think 'hides' would be more accurate than 'removes'. At least until we
have a better understanding of the issue.
Also, is there any perfo
Implement range-based TLB invalidations on top of GuC-based TLB
invalidations. This is the future plan for GuC-based TLB
invalidations because it helps improve performance over performing
full tlb invalidations all the time.
Jonathan Cavitt (7):
drm/i915: Add GuC TLB Invalidation device info fl
For platforms supporting selective tlb invalidations, we don't need to
do a full tlb invalidation. Rather do a range based tlb invalidation for
every unbind of purged vma belongs to an active vm.
Signed-off-by: Prathap Kumar Valsan
Cc: Niranjana Vishwanathapura
Cc: Fei Yang
Signed-off-by: Mauro
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