Hi Nirmoy,
On Tue, Sep 26, 2023 at 11:58:02PM +0200, Nirmoy Das wrote:
> On MTL GEN12_RING_FAULT_REG is not replicated so don't
> do mcr based operation for this register.
>
> v2: use MEDIA_VER() instead of GRAPHICS_VER()(Matt).
>
> Signed-off-by: Nirmoy Das
This looks very good!
> - if (
://anongit.freedesktop.org/drm/drm-tip drm-tip
patch link:
https://lore.kernel.org/r/20230922134700.235039-7-tvrtko.ursulin%40linux.intel.com
patch subject: [PATCH 6/6] drm/i915: Implement fdinfo memory stats printing
config: i386-randconfig-062-20230927
(https://download.01.org/0day-ci/archive/20230927/202309271528
On Tue, 26 Sep 2023, "Balasubrawmanian, Vivaik"
wrote:
> Due to a bug in GuC firmware, Mesa can't enable by default the usage of
> compute engines in DG2 and newer.
>
>
> A new GuC firmware fixed the issue but until now there was no way
>
> for Mesa to know if KMD was running with the fixed GuC
On MTL GEN12_RING_FAULT_REG is not replicated so don't
do mcr based operation for this register.
v2: use MEDIA_VER() instead of GRAPHICS_VER()(Matt).
v3: s/"MEDIA_VER(i915) == 13"/"MEDIA_VER(i915) >= 13"(Matt)
improve comment.
Signed-off-by: Nirmoy Das
Reviewed-by: Matt Roper
---
drivers/g
== Series Details ==
Series: series starting with [1/4] drm/i915/gvt: remove unused to_gvt() and
reduce includes
URL : https://patchwork.freedesktop.org/series/124267/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13682_full -> Patchwork_124267v1_full
Hi Nirmoy,
On Wed, Sep 27, 2023 at 10:24:30AM +0200, Nirmoy Das wrote:
> On MTL GEN12_RING_FAULT_REG is not replicated so don't
> do mcr based operation for this register.
>
> v2: use MEDIA_VER() instead of GRAPHICS_VER()(Matt).
> v3: s/"MEDIA_VER(i915) == 13"/"MEDIA_VER(i915) >= 13"(Matt)
>
On 27.09.2023 10:24, Nirmoy Das wrote:
On MTL GEN12_RING_FAULT_REG is not replicated so don't
do mcr based operation for this register.
v2: use MEDIA_VER() instead of GRAPHICS_VER()(Matt).
v3: s/"MEDIA_VER(i915) == 13"/"MEDIA_VER(i915) >= 13"(Matt)
improve comment.
Signed-off-by: Nirmoy Da
On 26/09/2023 20:05, Alan Previn wrote:
When suspending, add a timeout when calling
intel_gt_pm_wait_for_idle else if we have a lost
G2H event that holds a wakeref (which would be
indicative of a bug elsewhere in the driver),
driver will at least complete the suspend-resume
cycle, (albeit not h
On 27/09/2023 05:14, Balasubrawmanian, Vivaik wrote:
Due to a bug in GuC firmware, Mesa can't enable by default the usage of
compute engines in DG2 and newer.
A new GuC firmware fixed the issue but until now there was no way
for Mesa to know if KMD was running with the fixed GuC version or
Refactor DSB implementation to be compatible with Xe driver.
v1: RFC version.
v2: Make intel_dsb structure opaque from external usage. [Jani]
Signed-off-by: Animesh Manna
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/display/intel_dsb.c | 82 +++
== Series Details ==
Series: drm/i915/mtl: Skip MCR ops for ring fault register (rev3)
URL : https://patchwork.freedesktop.org/series/124276/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13684 -> Patchwork_124276v3
Summary
== Series Details ==
Series: drm/i915/dsb: DSB code refactoring (rev2)
URL : https://patchwork.freedesktop.org/series/124141/
State : failure
== Summary ==
Error: make failed
CALLscripts/checksyscalls.sh
DESCEND objtool
INSTALL libsubcmd_headers
LD [M] drivers/gpu/drm/i915/i915.o
drm-misc-next-2023-09-27:
drm-misc-next for v6.7-rc1:
UAPI Changes:
- drm_file owner is now updated during use, in the case of a drm fd
opened by the display server for a client, the correct owner is
displayed.
- Qaic gains support for the QAIC_DETACH_SLICE_BO ioctl to allow bo
recycling.
Get the reported device capabilities and update DSC and scaler
feature support
Vinod Govindapillai (3):
drm/i915/xe2lpd: display capability register definitions
drm/i915/xe2lpd: update the dsc feature capability
drm/i915/xe2lpd: update the scaler feature capability
drivers/gpu/drm/i915/di
Register definitions to track the reported scalable display
feature configurations
Bspec: 71161
Signed-off-by: Vinod Govindapillai
---
drivers/gpu/drm/i915/i915_reg.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index
Update the global dsc flag based on the display capabilities
reported.
Bspec: 71161
Signed-off-by: Vinod Govindapillai
---
drivers/gpu/drm/i915/display/intel_display_device.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c
b/drivers
Update the number of scalers per pipe based on the display
capabilities reported.
Bspec: 71161
Signed-off-by: Vinod Govindapillai
---
drivers/gpu/drm/i915/display/intel_display_device.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c
== Series Details ==
Series: drm/i915: Don't set PIPE_CONTROL_FLUSH_L3 for aux inval
URL : https://patchwork.freedesktop.org/series/124280/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13682_full -> Patchwork_124280v1_full
During resime, the steer semaphore on GT1 was observed to be held. The
hardware team has confirmed the safety of clearing the steer semaphore
during driver load/resume, as no lock acquisitions can occur in this
process by other agents.
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/gt/intel_
On MTL GEN12_RING_FAULT_REG is not replicated so don't
do mcr based operation for this register.
v2: use MEDIA_VER() instead of GRAPHICS_VER()(Matt).
v3: s/"MEDIA_VER(i915) == 13"/"MEDIA_VER(i915) >= 13"(Matt)
improve comment.
v4: improve the comment further(Andi)
Signed-off-by: Nirmoy Das
R
Implement intel_gt_mcr_lock_reset() to provide a mechanism
for resetting the steer semaphore when absolutely necessary.
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/gt/intel_gt_mcr.c | 29 ++
drivers/gpu/drm/i915/gt/intel_gt_mcr.h | 1 +
2 files changed, 30 inserti
On 9/27/2023 9:04 AM, Andi Shyti wrote:
Hi Nirmoy,
On Tue, Sep 26, 2023 at 11:58:02PM +0200, Nirmoy Das wrote:
On MTL GEN12_RING_FAULT_REG is not replicated so don't
do mcr based operation for this register.
v2: use MEDIA_VER() instead of GRAPHICS_VER()(Matt).
Signed-off-by: Nirmoy Das
Th
i915_gem_object_set_frontbuffer returns set frontbuffer pointer.
When we are releasing frontbuffer we are clearing the pointer from
the object and the value can be ignored.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_frontbuffer.c | 2 +-
1 file changed, 1 insertion(+),
Convert i915's fbdev code to struct drm_client. Replaces the current
ad-hoc integration. The conversion includes a number of cleanups. The
patchset also enables unloading of driver modules with in-kernel DRM
clients; a feature required by i915.
As with the other drivers' fbdev emulation, fbdev in
Do not acquire a reference on the module that provides a client's
callback functions in drm_client_init(). The additional reference
prevents the user from unloading the callback functions' module and
thus creating dangling pointers.
This is only necessary if there is no direct dependency between t
Export drm_client_dev_unregister() for use by the i915 driver. The
driver does not use drm_dev_unregister(), so it has to clean up the
in-kernel DRM clients by itself.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/drm_client.c | 13 +
1 file changed, 13 insertions(+)
diff --g
Move code from ad-hoc fbdev callbacks into DRM client functions
and remove the old callbacks. The functions instruct the client
to poll for changed output or restore the display.
The DRM core calls both, the old callbacks and the new client
helpers, from the same places. The new functions perform
Unregister all in-kernel clients before unloading the i915 driver. For
other drivers, drm_dev_unregister() does this automatically. As i915
does not use this helper, it has to perform the call by itself.
Note that there are currently no in-kernel clients in i915. The patch
prepares the driver for
Initialize i915's fbdev client by giving an instance of struct
drm_client_funcs to drm_client_init(). Also clean up with
drm_client_release().
Doing this in i915 prevents fbdev helpers from initializing and
releasing the client internally (see drm_fb_helper_init()). No
functional change yet; the c
Move functions within intel_fbdev.c to simplify later updates. Minor
style fixes to make checkpatch happy, but no functional changes.
v5:
* style fixes (checkpatch)
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/i915/display/intel_fbdev.c | 154 ++---
1 file change
Replace all code that initializes or releases fbdev emulation
throughout the driver. Instead initialize the fbdev client by a
single call to i915_fbdev_setup() after i915 has registered its
DRM device. Just like similar code in other drivers, i915 fbdev
emulation now acts as a regular DRM client.
On 26/09/2023 11:26, Andi Shyti wrote:
Hi Tvrtko,
On Tue, Sep 26, 2023 at 11:08:55AM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Commit ade8a0f59844 ("drm/i915: Make all GPU resets atomic") added a
preempt disable section over the hardware reset callback to prepare the
driver for bein
Hi Nirmoy,
On Wed, Sep 27, 2023 at 12:22:36PM +0200, Nirmoy Das wrote:
> During resime, the steer semaphore on GT1 was observed to be held. The
resime/resume/
> hardware team has confirmed the safety of clearing the steer semaphore
> during driver load/resume, as no lock acquisitions can occur i
Hi Nirmoy,
[...]
> +void intel_gt_mcr_lock_reset(struct intel_gt *gt)
> +{
> + unsigned long __flags;
> +
> + lockdep_assert_not_held(>->uncore->lock);
> +
> + spin_lock_irqsave(>->mcr_lock, __flags);
> +
> + if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70))
> + intel
Hi Nirmoy,
> + /*
> + * For the media GT, this ring fault register is not replicated,
> + * so don't do multicast/replicated register read/write operation on it.
> + */
thanks!
Andi
On 9/27/2023 1:32 PM, Andi Shyti wrote:
Hi Nirmoy,
On Wed, Sep 27, 2023 at 12:22:36PM +0200, Nirmoy Das wrote:
During resime, the steer semaphore on GT1 was observed to be held. The
resime/resume/
will fix that.
hardware team has confirmed the safety of clearing the steer semaphore
durin
== Series Details ==
Series: series starting with [1/2] drm/i915: Add missing CCS documentation
(rev2)
URL : https://patchwork.freedesktop.org/series/124285/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13682_full -> Patchwork_124285v2_full
==
Hi Andi,
On 9/27/2023 1:37 PM, Andi Shyti wrote:
Hi Nirmoy,
[...]
+void intel_gt_mcr_lock_reset(struct intel_gt *gt)
+{
+ unsigned long __flags;
+
+ lockdep_assert_not_held(>->uncore->lock);
+
+ spin_lock_irqsave(>->mcr_lock, __flags);
+
+ if (GRAPHICS_VER_FULL(gt->i91
On Tue, Sep 26, 2023 at 02:41:57PM +0530, Arun R Murthy wrote:
> By default fastboot is enabled on all Display 9+ platforms and disabled
> on older platforms. Its not necessary to retain this as a module
> parameter.
>
> Signed-off-by: Arun R Murthy
> ---
> drivers/gpu/drm/i915/display/intel_dis
During resume, the steer semaphore on GT1 was observed to be held. The
hardware team has confirmed the safety of clearing the steer semaphore
during driver load/resume, as no lock acquisitions can occur in this
process by other agents.
v2: reset on resume not in intel_gt_init().
Signed-off-by: Ni
Implement intel_gt_mcr_lock_reset() to provide a mechanism
for resetting the steer semaphore when absolutely necessary.
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/gt/intel_gt_mcr.c | 29 ++
drivers/gpu/drm/i915/gt/intel_gt_mcr.h | 1 +
2 files changed, 30 inserti
On MTL GEN12_RING_FAULT_REG is not replicated so don't
do mcr based operation for this register.
v2: use MEDIA_VER() instead of GRAPHICS_VER()(Matt).
v3: s/"MEDIA_VER(i915) == 13"/"MEDIA_VER(i915) >= 13"(Matt)
improve comment.
v4: improve the comment further(Andi)
Signed-off-by: Nirmoy Das
R
From: Tvrtko Ursulin
A few basic smoke tests to check per client memory info looks legit.
Signed-off-by: Tvrtko Ursulin
---
tests/intel/drm_fdinfo.c | 217 +++
1 file changed, 217 insertions(+)
diff --git a/tests/intel/drm_fdinfo.c b/tests/intel/drm_fdinfo.
On 27/09/2023 07:54, Andi Shyti wrote:
Hi Tvrtko,
Use the newly added drm_print_memory_stats helper to show memory
utilisation of our objects in drm/driver specific fdinfo output.
To collect the stats we walk the per memory regions object lists
and accumulate object size into the respective
On 27/09/2023 14:23, Tvrtko Ursulin wrote:
On 27/09/2023 07:54, Andi Shyti wrote:
Hi Tvrtko,
Use the newly added drm_print_memory_stats helper to show memory
utilisation of our objects in drm/driver specific fdinfo output.
To collect the stats we walk the per memory regions object lists
an
== Series Details ==
Series: scalable display feature configurations
URL : https://patchwork.freedesktop.org/series/124323/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:11
From: Tvrtko Ursulin
A short series to enable fdinfo memory stats for i915.
I added tracking of most classes of objects (user objects, page tables, context
state, ring buffers) which contribute to client's memory footprint and am
accouting their memory use along the similar lines as in Rob's msm
From: Tvrtko Ursulin
It is better not to lose precision and not revert to 1 MiB size
granularity for every size greater than 1 MiB.
Sizes in KiB should not be so troublesome to read (and in fact machine
parsing is I expect the norm here), they align with other api like
/proc/meminfo, and they al
From: Tvrtko Ursulin
To enable accounting of indirect client memory usage (such as page tables)
in the following patch, lets start recording the creator of each PPGTT.
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Aravind Iddamsetty
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 11
From: Tvrtko Ursulin
Account page table backing store against the owning client memory usage
stats.
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Aravind Iddamsetty
---
drivers/gpu/drm/i915/gt/intel_gtt.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt
From: Tvrtko Ursulin
In order to show per client memory usage lets add some infrastructure
which enables tracking buffer objects owned by clients.
We add a per client list protected by a new per client lock and to support
delayed destruction (post client exit) we make tracked objects hold
refere
From: Tvrtko Ursulin
Account ring buffers and logical context space against the owning client
memory usage stats.
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Aravind Iddamsetty
---
drivers/gpu/drm/i915/gt/intel_context.c | 14 ++
drivers/gpu/drm/i915/i915_drm_client.c | 10 +++
From: Tvrtko Ursulin
At the moment memory region names are a bit too varied and too
inconsistent to be used for ABI purposes, like for upcoming fdinfo
memory stats.
System memory can be either system or system-ttm. Local memory has the
instance number appended, others do not. Not only incosisten
From: Tvrtko Ursulin
Use the newly added drm_print_memory_stats helper to show memory
utilisation of our objects in drm/driver specific fdinfo output.
To collect the stats we walk the per memory regions object lists
and accumulate object size into the respective drm_memory_stats
categories.
v2:
== Series Details ==
Series: scalable display feature configurations
URL : https://patchwork.freedesktop.org/series/124323/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13685 -> Patchwork_124323v1
Summary
---
**SUCC
From: Chaitanya Kumar Borah
Add a wrapper around intel_step_name to maintain compatibility with xe
driver. The wrapper will share the same name as the one to be used by
xe while both drivers include different files as needed during
compilation.
Signed-off-by: Chaitanya Kumar Borah
Signed-off-by
On 27/09/2023 14:38, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> It is better not to lose precision and not revert to 1 MiB size
> granularity for every size greater than 1 MiB.
>
> Sizes in KiB should not be so troublesome to read (and in fact machine
> parsing is I expect the norm here),
On Tue, Sep 26, 2023 at 12:34:35PM +0300, Jani Nikula wrote:
> On Tue, 26 Sep 2023, "Manna, Animesh" wrote:
> >> -Original Message-
> >> From: Jani Nikula
> >> Sent: Monday, September 25, 2023 6:00 PM
> >> To: Manna, Animesh ; intel-
> >> g...@lists.freedesktop.org
> >> Subject: Re: [Inte
On Thu, Sep 21, 2023 at 10:51:48PM +0300, Imre Deak wrote:
> This is the first half of patchset [1] enabling the BW management on FDI
> links, addressing the review comments and adding R-bs.
>
> [1] https://lore.kernel.org/all/20230914192659.757475-1-imre.d...@intel.com
>
> Cc: Jani Nikula
> Cc:
>
> > > This sounds like there's some sort of MFD rather than or as well as a
> > > flash
> > > chip, or possibly multiple SPI devices?
>
> > Yes, the driver doesn't talk to SPI controller directly it goes via
> > another layer, so all SPI standard HW is not accessible, but we wish
> > to expose
On Wed, Sep 27, 2023 at 01:27:07PM +0300, Jouni Högander wrote:
> i915_gem_object_set_frontbuffer returns set frontbuffer pointer.
> When we are releasing frontbuffer we are clearing the pointer from
> the object and the value can be ignored.
>
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu
On Wed, Sep 27, 2023 at 12:50:54AM +0530, Uma Shankar wrote:
> Some of the VGA functionality is not needed by the proposed
> Intel Xe driver,
I wouldn't put it that way. IIRC the main issue is that X becomes
a slideshow if it thinks there are multiple GPUs that have VGA decoding
enabled as it insi
> -Original Message-
> From: Ville Syrjälä
> Sent: Wednesday, September 27, 2023 6:28 PM
> To: Murthy, Arun R
> Cc: intel-gfx@lists.freedesktop.org; Nikula, Jani
> Subject: Re: [Intel-gfx] [PATCH] drm/i915: Remove the module parameter
> 'fastboot'
>
> On Tue, Sep 26, 2023 at 02:41:57
On Wed, Sep 27, 2023 at 02:11:47PM +, Usyskin, Alexander wrote:
> There is a Discreet Graphic device with embedded SPI (controller & flash).
> The embedded SPI is not visible to OS.
> There is another HW in the chip that gates access to the controller and
> exposes registers for:
> region sele
On Wed, 27 Sep 2023, Ville Syrjälä wrote:
> On Tue, Sep 26, 2023 at 12:34:35PM +0300, Jani Nikula wrote:
>> On Tue, 26 Sep 2023, "Manna, Animesh" wrote:
>> >> -Original Message-
>> >> From: Jani Nikula
>> >> Sent: Monday, September 25, 2023 6:00 PM
>> >> To: Manna, Animesh ; intel-
>> >>
== Series Details ==
Series: drm/i915: Don't set PIPE_CONTROL_FLUSH_L3 for aux inval (rev2)
URL : https://patchwork.freedesktop.org/series/124280/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13685 -> Patchwork_124280v2
Su
Hi Mark,
broo...@kernel.org wrote on Wed, 27 Sep 2023 16:37:35 +0200:
> On Wed, Sep 27, 2023 at 02:11:47PM +, Usyskin, Alexander wrote:
>
> > There is a Discreet Graphic device with embedded SPI (controller & flash).
> > The embedded SPI is not visible to OS.
> > There is another HW in the c
On Wed, Sep 27, 2023 at 05:50:10PM +0300, Jani Nikula wrote:
> On Wed, 27 Sep 2023, Ville Syrjälä wrote:
> > On Tue, Sep 26, 2023 at 12:34:35PM +0300, Jani Nikula wrote:
> >> On Tue, 26 Sep 2023, "Manna, Animesh" wrote:
> >> >> -Original Message-
> >> >> From: Jani Nikula
> >> >> Sent: M
From: Nirmoy Das
Commit f1530f912ed8 ("drm/i915/gt: Apply workaround 22016122933
correctly") adds the workaround only in non media GT's, which is
GT-0 in case of MTL. It turns out that we need to apply it in
both the GT's.
Signed-off-by: Nirmoy Das
Signed-off-by: Andi Shyti
Cc: Jonathan Cavitt
On Fri, Sep 22, 2023 at 03:45:45PM +0300, Imre Deak wrote:
Hi Mitul, Ankit, Swati, Vandita,
> On Wed, Sep 13, 2023 at 11:35:58AM +0530, Mitul Golani wrote:
> > his patch series adds support for DSC fractional compressed bpp
> > for MTL+. The series starts with some fixes, followed by patches that
On Wed, Sep 27, 2023 at 05:18:39PM +0200, Andi Shyti wrote:
> From: Nirmoy Das
>
> Commit f1530f912ed8 ("drm/i915/gt: Apply workaround 22016122933
> correctly") adds the workaround only in non media GT's, which is
This is backwards; the workaround is applied only to the media GT and
not to the p
On Mon, Sep 11, 2023 at 08:50:24PM +, Shankar, Uma wrote:
>
>
> > -Original Message-
> > From: Intel-gfx On Behalf Of Ville
> > Syrjala
> > Sent: Wednesday, June 7, 2023 12:45 AM
> > To: intel-gfx@lists.freedesktop.org
> > Subject: [Intel-gfx] [PATCH v2 05/19] drm/i915/dsb: Define th
== Series Details ==
Series: series starting with [1/3] drm/i915: Introduce intel_gt_mcr_lock_reset()
URL : https://patchwork.freedesktop.org/series/124325/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+.
On Wed, Sep 13, 2023 at 06:08:42PM +, Shankar, Uma wrote:
>
>
> > -Original Message-
> > From: Intel-gfx On Behalf Of Ville
> > Syrjala
> > Sent: Wednesday, June 7, 2023 12:45 AM
> > To: intel-gfx@lists.freedesktop.org
> > Subject: [Intel-gfx] [PATCH v2 17/19] drm/i915/dsb: Use DEwak
== Series Details ==
Series: series starting with [1/3] drm/i915: Introduce intel_gt_mcr_lock_reset()
URL : https://patchwork.freedesktop.org/series/124325/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13685 -> Patchwork_124325v1
==
On Tue, Jun 06, 2023 at 10:14:45PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Another attempt at re-enabling DSB based LUT loads.
>
> The main change from the last attempt is that we now
> use the DSB's DEwake mechanism to combat PkgC latency
> which was causing the LUT to not always
On Wed, 27 Sep 2023, Ville Syrjälä wrote:
> On Wed, Sep 27, 2023 at 05:50:10PM +0300, Jani Nikula wrote:
>> On Wed, 27 Sep 2023, Ville Syrjälä wrote:
>> > On Tue, Sep 26, 2023 at 12:34:35PM +0300, Jani Nikula wrote:
>> >> On Tue, 26 Sep 2023, "Manna, Animesh" wrote:
>> >> >> -Original Messag
> -Original Message-
> From: Ville Syrjälä
> Sent: Wednesday, September 27, 2023 9:22 PM
> To: Shankar, Uma
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH v2 17/19] drm/i915/dsb: Use DEwake to combat
> PkgC latency
>
> On Wed, Sep 13, 2023 at 06:08:42PM +,
> -Original Message-
> From: Ville Syrjälä
> Sent: Wednesday, September 27, 2023 9:08 PM
> To: Shankar, Uma
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH v2 05/19] drm/i915/dsb: Define the contents of
> some intstructions bit better
>
> On Mon, Sep 11, 2023 a
On Wed, Sep 27, 2023 at 07:04:53PM +0300, Jani Nikula wrote:
> On Wed, 27 Sep 2023, Ville Syrjälä wrote:
> > On Wed, Sep 27, 2023 at 05:50:10PM +0300, Jani Nikula wrote:
> >> On Wed, 27 Sep 2023, Ville Syrjälä wrote:
> >> > On Tue, Sep 26, 2023 at 12:34:35PM +0300, Jani Nikula wrote:
> >> >> On T
> -Original Message-
> From: Ville Syrjälä
> Sent: Wednesday, September 27, 2023 7:48 PM
> To: Shankar, Uma
> Cc: intel-gfx@lists.freedesktop.org; Nikula, Jani
> Subject: Re: [Intel-gfx] [v3] drm/i915/display: Created exclusive version of
> vga
> decode setup
>
> On Wed, Sep 27, 202
On 27-Sep-23 8:52 PM, Imre Deak wrote:
On Fri, Sep 22, 2023 at 03:45:45PM +0300, Imre Deak wrote:
Hi Mitul, Ankit, Swati, Vandita,
On Wed, Sep 13, 2023 at 11:35:58AM +0530, Mitul Golani wrote:
his patch series adds support for DSC fractional compressed bpp
for MTL+. The series starts with some
Thanks for taking the time to review this Tvrtko, replies inline below.
On Wed, 2023-09-27 at 10:02 +0100, Tvrtko Ursulin wrote:
> On 26/09/2023 20:05, Alan Previn wrote:
> > When suspending, add a timeout when calling
> > intel_gt_pm_wait_for_idle else if we have a lost
> > G2H event that holds a
== Series Details ==
Series: drm/i915/mtl: Skip MCR ops for ring fault register (rev3)
URL : https://patchwork.freedesktop.org/series/124276/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13684_full -> Patchwork_124276v3_full
===
== Series Details ==
Series: drm/i915: Ignore set frontbuffer return value on release
URL : https://patchwork.freedesktop.org/series/124327/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13687 -> Patchwork_124327v1
Summary
== Series Details ==
Series: drm/i915: Convert fbdev to DRM client (rev5)
URL : https://patchwork.freedesktop.org/series/115714/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops
== Series Details ==
Series: drm/i915: Convert fbdev to DRM client (rev5)
URL : https://patchwork.freedesktop.org/series/115714/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13687 -> Patchwork_115714v5
Summary
---
*
On 9/21/2023 3:41 AM, Tvrtko Ursulin wrote:
On 20/09/2023 22:56, Vinay Belgaumkar wrote:
Provide a bit to disable waitboost while waiting on a gem object.
Waitboost results in increased power consumption by requesting RP0
while waiting for the request to complete. Add a bit in the gem_wait()
== Series Details ==
Series: drm/i915/gem: Make i915_gem_shrinker multi-gt aware (rev6)
URL : https://patchwork.freedesktop.org/series/124112/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13687 -> Patchwork_124112v6
Summar
== Series Details ==
Series: series starting with [v5,1/3] drm/i915: Introduce
intel_gt_mcr_lock_reset()
URL : https://patchwork.freedesktop.org/series/124334/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately
== Series Details ==
Series: series starting with [v5,1/3] drm/i915: Introduce
intel_gt_mcr_lock_reset()
URL : https://patchwork.freedesktop.org/series/124334/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13687 -> Patchwork_124334v1
==
On Fri, Sep 22, 2023 at 02:44:28PM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
We have a nice error message displayed when an user with insufficient
permissions tries to run the tool, but that got lost while Meteorlake
support was added. Bring it back in.
Signed-off-by: Tvrtko Ursulin
C
== Series Details ==
Series: fdinfo memory stats (rev9)
URL : https://patchwork.freedesktop.org/series/119082/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: fdinfo memory stats (rev9)
URL : https://patchwork.freedesktop.org/series/119082/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13687 -> Patchwork_119082v9
Summary
---
**SUCCESS**
No r
Implement intel_gt_mcr_lock_reset() to provide a mechanism
for resetting the steer semaphore when absolutely necessary.
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/gt/intel_gt_mcr.c | 29 ++
drivers/gpu/drm/i915/gt/intel_gt_mcr.h | 1 +
2 files changed, 30 inserti
Move early resume functions of gt to a proper file.
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/gt/intel_gt_pm.c | 6 ++
drivers/gpu/drm/i915/gt/intel_gt_pm.h | 1 +
drivers/gpu/drm/i915/i915_driver.c| 6 ++
3 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/driver
During resume, the steer semaphore on GT1 was observed to be held. The
hardware team has confirmed the safety of clearing the steer semaphore
during driver load/resume, as no lock acquisitions can occur in this
process by other agents.
v2: reset on resume not in intel_gt_init().
v3: do the reset o
On MTL GEN12_RING_FAULT_REG is not replicated so don't
do mcr based operation for this register.
v2: use MEDIA_VER() instead of GRAPHICS_VER()(Matt).
v3: s/"MEDIA_VER(i915) == 13"/"MEDIA_VER(i915) >= 13"(Matt)
improve comment.
v4: improve the comment further(Andi)
Signed-off-by: Nirmoy Das
R
== Series Details ==
Series: drm/i915: Add wrapper for getiing display step
URL : https://patchwork.freedesktop.org/series/124340/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: Add wrapper for getiing display step
URL : https://patchwork.freedesktop.org/series/124340/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13687 -> Patchwork_124340v1
Summary
---
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