Hi Dave & Daniel -
One DSI fix, stable material.
drm-intel-fixes-2023-04-13:
drm/i915 fixes for v6.3-rc7:
- Fix dual link DSI for TGL+
BR,
Jani.
The following changes since commit 09a9639e56c01c7a00d6c0ca63f4c7c41abe075d:
Linux 6.3-rc6 (2023-04-09 11:15:57 -0700)
are available in the Git
On Thu, 13 Apr 2023, Andrzej Hajda wrote:
> On 13.04.2023 05:13, Cong Liu wrote:
A commit message is still needed.
>> Fixes: c3bfba9a2225 ("drm/i915: Check for integer truncation on scatterlist
>> creation")
>>
No blank line here.
BR,
Jani.
>> Signed-off-by: Cong Liu
>> ---
>
> Reviewed-by:
Hi Cong,
> Fixes: c3bfba9a2225 ("drm/i915: Check for integer truncation on scatterlist
> creation")
>
> Signed-off-by: Cong Liu
As Jani suggested we need a commit message here. Would something
like this work for you?
"
We forget to free 'pages' after checking for overflow. Be sure to
properly
On Wed, 12 Apr 2023, "Souza, Jose" wrote:
> On Tue, 2023-04-11 at 14:20 -0700, Lucas De Marchi wrote:
>> On Tue, Apr 11, 2023 at 08:07:12PM +, Jose Souza wrote:
>> > On Tue, 2023-04-11 at 12:59 -0700, Lucas De Marchi wrote:
>> > > On Tue, Apr 11, 2023 at 10:51:04AM -0400, Rodrigo Vivi wrote:
>
> From: Jason Gunthorpe
> Sent: Thursday, April 13, 2023 4:07 AM
>
>
> > in which case we need c) a way to
> > report the overall set of affected devices regardless of ownership in
> > support of 4), BDF?
>
> Yes, continue to use INFO unmodified.
>
> > Are we back to replacing group-ids with d
On Thu, Apr 13, 2023 at 03:55:26PM +0800, Cong Liu wrote:
> This patch fixes memory leaks on error escapes in function fake_get_pages
>
> Fixes: c3bfba9a2225 ("drm/i915: Check for integer truncation on scatterlist
> creation")
> Signed-off-by: Cong Liu
OK, while I was proposing the adjustments
On Wed, 12 Apr 2023 at 16:18, Christian König wrote:
>
> Am 12.04.23 um 11:08 schrieb Daniel Vetter:
> > On Tue, 11 Apr 2023 at 15:45, Daniel Vetter wrote:
> >> On Tue, Apr 11, 2023 at 02:11:18PM +0200, Christian König wrote:
> >>> Am 11.04.23 um 11:51 schrieb Daniel Vetter:
> On Tue, Apr 04
Hi Andrzej,
> > Make version of the request creation that doesn't hold any
> > lock.
> >
> > Signed-off-by: Andi Shyti
> > Cc: sta...@vger.kernel.org
> > Reviewed-by: Nirmoy Das
> > ---
> > drivers/gpu/drm/i915/i915_request.c | 38 +
> > drivers/gpu/drm/i915/i915_
Hi Andrzej,
On Wed, Apr 12, 2023 at 03:06:42PM +0200, Andrzej Hajda wrote:
> On 12.04.2023 13:33, Andi Shyti wrote:
> > i915_request_add() assumes that the timeline is locked whtn the
> *when
> > function is called. Before exiting it releases the lock. But in
> > the next commit we have one case w
From: Paulo Zanoni
In multitile systems IRQ need to be reset and enabled per GT.
Although in MTL the GUnit misc interrupts register set are
available only in GT-0, we need to loop through all the GT's
in order to initialize the media engine which lies on a different
GT.
Signed-off-by: Paulo Zan
Am 13.04.23 um 10:48 schrieb Daniel Vetter:
On Wed, 12 Apr 2023 at 16:18, Christian König wrote:
Am 12.04.23 um 11:08 schrieb Daniel Vetter:
On Tue, 11 Apr 2023 at 15:45, Daniel Vetter wrote:
On Tue, Apr 11, 2023 at 02:11:18PM +0200, Christian König wrote:
Am 11.04.23 um 11:51 schrieb Danie
Add intel_display_driver.[ch] and move the high level display code entry
points there. Also split out intel_display_reset.[ch]. And declutter
intel_display.c by nearly 700 lines.
BR,
Jani.
Jani Nikula (10):
drm/i915/display: remove intel_display_commit_duplicated_state()
drm/i915/display: sta
This seems like an unnecessary wrapper layer. Removing it will be
helpful later.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 28 +++-
1 file changed, 10 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/
The only way to truly clean up intel_display.[ch] is to move stuff out
of them until there's absolutely nothing left.
Start moving the high level display driver entry points, i.e. functions
called from top level driver code only, to a new file, which we'll call
intel_display_driver.c. The intentio
High level display functionality only called from driver top level code.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 23 ---
drivers/gpu/drm/i915/display/intel_display.h | 1 -
.../drm/i915/display/intel_display_driver.c | 23 +++
Follow the usual naming conventions.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display_driver.c | 2 +-
drivers/gpu/drm/i915/display/intel_display_driver.h | 2 +-
drivers/gpu/drm/i915/i915_pci.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
High level display functionality only called from driver top level code.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 373 +
drivers/gpu/drm/i915/display/intel_display.h | 23 +-
.../drm/i915/display/intel_display_driver.c | 374 +
Follow the usual naming conventions.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
.../drm/i915/display/intel_display_driver.c | 16 +++---
.../drm/i915/display/intel_display_driver.h | 14 ++---
drivers/gpu/drm/i915/i915_driver.c
Split out the display reset functionality to a separate file to
declutter intel_display.c. Rename the functions accordingly. The minor
downside is having to expose __intel_display_resume().
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915
High level display functionality only called from driver top level code.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 102 --
drivers/gpu/drm/i915/display/intel_display.h | 8 --
.../drm/i915/display/intel_display_driver.c | 101
Follow the usual naming conventions. Switch to i915 arguments and naming
while at it.
Signed-off-by: Jani Nikula
---
.../drm/i915/display/intel_display_driver.c | 24 +--
.../drm/i915/display/intel_display_driver.h | 11 -
.../drm/i915/display/intel_display_reset.c
Add intel_display_driver_early_probe() as the early probe call to
replace intel_init_display_hooks(). The latter will be "demoted" to
setting up hooks in intel_display.c only.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 11 ---
.../gpu/drm/i915/dis
On Thu, 13 Apr 2023, Jani Nikula wrote:
> On Wed, 12 Apr 2023, "Souza, Jose" wrote:
>> The name is misleading but intel_modeset_init_noirq() is the first generic
>> display initialization function called.
>> There is other display functions called before it but they are very
>> specific(intel_d
On Wed, 12 Apr 2023, Jani Nikula wrote:
> On Wed, 12 Apr 2023, Gustavo Sousa wrote:
>> Quoting Jani Nikula (2023-04-12 06:33:54)
>>> On Tue, 11 Apr 2023, Gustavo Sousa wrote:
>>> > Quoting Mika Kahola (2023-04-03 05:50:43)
>>> >> @@ -8250,6 +8259,7 @@ void intel_init_display_hooks(struct
>>> >>
On Wed, 12 Apr 2023, Jani Nikula wrote:
> On Wed, 12 Apr 2023, Bhanuprakash Modem wrote:
>> Instead of mixing display & non-display stuff together, move
>> display specific clock info to new debugfs. This patch will
>> create a new debugfs "i915_cdclk_info" to expose Current & Max
>> cdclk and Ma
On 13/04/2023 10:20, Andi Shyti wrote:
From: Paulo Zanoni
In multitile systems IRQ need to be reset and enabled per GT.
Although in MTL the GUnit misc interrupts register set are
available only in GT-0, we need to loop through all the GT's
in order to initialize the media engine which lies o
On Tue, 2023-03-28 at 15:23 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> If we have to force the hardware to go through a full modeset
> due to eg. cdclk reprogramming, we need to preserve
> crtc_state->inherited for all crtcs that have not otherwise
> gone through the whole compute_conf
On 12/04/2023 14:10, Rodrigo Vivi wrote:
On Wed, Apr 12, 2023 at 12:56:26PM +0200, Andi Shyti wrote:
Hi Rodrigo,
Currently, when we perform operations such as clearing or copying
large blocks of memory, we generate multiple requests that are
executed in a chain.
However, if one of these req
== Series Details ==
Series: drm/i915: Make IRQ reset and postinstall multi-gt aware (rev2)
URL : https://patchwork.freedesktop.org/series/115465/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13000 -> Patchwork_115465v2
Su
Instead of mixing display & non-display stuff together, move
display specific clock info to new debugfs. This patch will
create a new debugfs "i915_cdclk_info" to expose Current & Max
cdclk and Max pixel clock frequency info.
Example:
$ cat /sys/kernel/debug/dri/0/i915_cdclk_info
Current CD clock
On Thu, Apr 13, 2023 at 08:25:52AM +, Tian, Kevin wrote:
> > From: Jason Gunthorpe
> > Sent: Thursday, April 13, 2023 4:07 AM
> >
> >
> > > in which case we need c) a way to
> > > report the overall set of affected devices regardless of ownership in
> > > support of 4), BDF?
> >
> > Yes, co
On 12/04/2023 12:33, Andi Shyti wrote:
Currently, when we perform operations such as clearing or copying
large blocks of memory, we generate multiple requests that are
executed in a chain.
However, if one of these requests fails, we may not realize it
unless it happens to be the last request i
Split intel_dp_aux_name() to a separate function to declutter
intel_dp_aux_init(), and only have the if ladder to pick the one
character instead of duplicating the whole kasprintf() call.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_dp_aux.c | 32 -
1 fil
Hi Dave & Daniel,
Just one Cc:stable fix for indirect sampler state this week on
drm-intel-next-fixes.
Regards, Joonas
***
drm-intel-next-fixes-2023-04-13:
Short summary of fixes pull (less than what git shortlog provides):
Just one Cc:stable fix for sampler indirect state in bindless heap.
On 11/04/2023 11:56, Jani Nikula wrote:
The goal has been to just make device info a pointer to static const
data, i.e. the static const structs in i915_pci.c. See [1]. However,
there were issues with intel_device_info_runtime_init() clearing the
display sub-struct of device info on the !HAS_DI
Quoting Jani Nikula (2023-04-13 09:11:13)
> Split intel_dp_aux_name() to a separate function to declutter
> intel_dp_aux_init(), and only have the if ladder to pick the one
> character instead of duplicating the whole kasprintf() call.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/
On Thu, 13 Apr 2023, Gustavo Sousa wrote:
> Quoting Jani Nikula (2023-04-13 09:11:13)
>> Split intel_dp_aux_name() to a separate function to declutter
>> intel_dp_aux_init(), and only have the if ladder to pick the one
>> character instead of duplicating the whole kasprintf() call.
>>
>> Signed-o
On 13/04/2023 12:56, Tvrtko Ursulin wrote:
On 12/04/2023 12:33, Andi Shyti wrote:
Currently, when we perform operations such as clearing or copying
large blocks of memory, we generate multiple requests that are
executed in a chain.
However, if one of these requests fails, we may not realize
On 12/04/2023 23:42, Rob Clark wrote:
From: Rob Clark
There is more do to here to remove my client->id fully (would now be
dead code) so maybe easiest if you drop this patch and I do it after you
land this and it propagates to our branches? I'd like to avoid pain with
conflicts if possibl
On Thu, Apr 13, 2023 at 10:13:57AM +0300, Jani Nikula wrote:
>
> Hi Dave & Daniel -
>
> One DSI fix, stable material.
>
> drm-intel-fixes-2023-04-13:
> drm/i915 fixes for v6.3-rc7:
> - Fix dual link DSI for TGL+
>
> BR,
> Jani.
>
> The following changes since commit 09a9639e56c01c7a00d6c0ca63f
On Thu, 13 Apr 2023 at 11:46, Christian König wrote:
>
> Am 13.04.23 um 10:48 schrieb Daniel Vetter:
> > On Wed, 12 Apr 2023 at 16:18, Christian König
> > wrote:
> >> Am 12.04.23 um 11:08 schrieb Daniel Vetter:
> >>> On Tue, 11 Apr 2023 at 15:45, Daniel Vetter wrote:
> On Tue, Apr 11, 2023
== Series Details ==
Series: drm/i915/display: split out high level display entry points
URL : https://patchwork.freedesktop.org/series/116431/
State : warning
== Summary ==
Error: dim checkpatch failed
fbb7502dc824 drm/i915/display: remove intel_display_commit_duplicated_state()
f16b8371b8f4
== Series Details ==
Series: drm/i915/display: split out high level display entry points
URL : https://patchwork.freedesktop.org/series/116431/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/inc
== Series Details ==
Series: drm/i915/display: split out high level display entry points
URL : https://patchwork.freedesktop.org/series/116431/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13001 -> Patchwork_116431v1
Summa
Quoting Jani Nikula (2023-04-13 06:47:31)
> High level display functionality only called from driver top level code.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 373 +
> drivers/gpu/drm/i915/display/intel_display.h | 23 +-
> .../drm/i
Quoting Jani Nikula (2023-04-13 06:47:32)
> Follow the usual naming conventions.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 2 +-
> .../drm/i915/display/intel_display_driver.c | 16 +++---
> .../drm/i915/display/intel_display_driver.h | 14
Hi Tvrtko,
(I forgot to CC Daniele)
On Thu, Apr 13, 2023 at 11:41:28AM +0100, Tvrtko Ursulin wrote:
>
> On 13/04/2023 10:20, Andi Shyti wrote:
> > From: Paulo Zanoni
> >
> > In multitile systems IRQ need to be reset and enabled per GT.
> >
> > Although in MTL the GUnit misc interrupts registe
Hi Suraj,
On 07/04/2023 06:11, Kandpal, Suraj wrote:
Hi Dmitry
-Original Message-
From: Dmitry Baryshkov
Sent: Friday, April 7, 2023 8:28 AM
To: Kandpal, Suraj ; Jani Nikula
; dri-de...@lists.freedesktop.org; intel-
g...@lists.freedesktop.org
Cc: Nautiyal, Ankit K ; Shankar, Uma
; Ma
On 13/04/2023 14:56, Andi Shyti wrote:
Hi Tvrtko,
(I forgot to CC Daniele)
On Thu, Apr 13, 2023 at 11:41:28AM +0100, Tvrtko Ursulin wrote:
On 13/04/2023 10:20, Andi Shyti wrote:
From: Paulo Zanoni
In multitile systems IRQ need to be reset and enabled per GT.
Although in MTL the GUnit mi
> From: Jason Gunthorpe
> Sent: Thursday, April 13, 2023 7:51 PM
>
> On Thu, Apr 13, 2023 at 08:25:52AM +, Tian, Kevin wrote:
> > > From: Jason Gunthorpe
> > > Sent: Thursday, April 13, 2023 4:07 AM
> > >
> > >
> > > > in which case we need c) a way to
> > > > report the overall set of affec
A user reported recently that some subtests are failing. The test was
blocklisted in 2018, so we've lost CI feedback on its results since then.
In 2021, request watchdog with 20 seconds timeout was introduced to i915.
Kernel logs from failed subtest runs indicate that the request watchdog
interfe
On Thu, Apr 13, 2023 at 02:35:57PM +, Liu, Yi L wrote:
> Today, at least QEMU will not go to do hot-reset if _INFO fails. I think
> this check may need to be relaxed if want _INFO work when there is
> no VFIO_GROUP (also no fake iommu_group).
Current qemu does not work if there is no VFIO_GRO
== Series Details ==
Series: drm/i915/debugfs: New debugfs for display clock frequencies (rev2)
URL : https://patchwork.freedesktop.org/series/116372/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/debugfs: New debugfs for display clock frequencies (rev2)
URL : https://patchwork.freedesktop.org/series/116372/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13002 -> Patchwork_116372v2
On Tue, Apr 11, 2023 at 10:22 PM Ville Syrjälä
wrote:
>
> On Tue, Apr 11, 2023 at 05:07:01PM -0700, Manasi Navare wrote:
> > On Tue, Apr 11, 2023 at 10:42 AM Ville Syrjälä
> > wrote:
> > >
> > > On Tue, Apr 11, 2023 at 05:34:08PM +, Manasi Navare wrote:
> > > > In the function intel_dp_max_bp
> -Original Message-
> From: Intel-gfx On Behalf Of
> Shankar, Uma
> Sent: Friday, March 31, 2023 1:52 AM
> To: Borah, Chaitanya Kumar ; intel-
> g...@lists.freedesktop.org
> Cc: sta...@vger.kernel.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/color: Fix typo for Plane CSC
> indexes
>
On 13.04.2023 16:36, Janusz Krzysztofik wrote:
A user reported recently that some subtests are failing. The test was
blocklisted in 2018, so we've lost CI feedback on its results since then.
In 2021, request watchdog with 20 seconds timeout was introduced to i915.
Kernel logs from failed sub
On Thu, Apr 13, 2023 at 6:07 AM Tvrtko Ursulin
wrote:
>
>
> On 12/04/2023 23:42, Rob Clark wrote:
> > From: Rob Clark
>
> There is more do to here to remove my client->id fully (would now be
> dead code) so maybe easiest if you drop this patch and I do it after you
> land this and it propagates t
On Thu, Apr 13, 2023 at 03:56:21PM +0200, Andi Shyti wrote:
> Hi Tvrtko,
>
> (I forgot to CC Daniele)
>
> On Thu, Apr 13, 2023 at 11:41:28AM +0100, Tvrtko Ursulin wrote:
> >
> > On 13/04/2023 10:20, Andi Shyti wrote:
> > > From: Paulo Zanoni
> > >
> > > In multitile systems IRQ need to be rese
On Wed, Apr 12, 2023 at 03:49:20PM -0700, Radhakrishna Sripada wrote:
> From: Mika Kahola
>
> C10 phys uses direct mapping internally for voltage and pre-emphasis levels.
> Program the levels directly to the fields in the VDR Registers.
>
> Bspec: 65449
>
> v2: From table "C10: Tx EQ settings f
On Thu, 2023-04-13 at 11:20 +0200, Andi Shyti wrote:
> From: Paulo Zanoni
Hi
https://en.wikipedia.org/wiki/Ship_of_Theseus
My original patch was written in 2018. Since then, the implementation
has been rebased and changed multiple times, the commit message has
been changed, the subject line has
On 4/13/2023 8:52 AM, Matt Roper wrote:
On Thu, Apr 13, 2023 at 03:56:21PM +0200, Andi Shyti wrote:
Hi Tvrtko,
(I forgot to CC Daniele)
On Thu, Apr 13, 2023 at 11:41:28AM +0100, Tvrtko Ursulin wrote:
On 13/04/2023 10:20, Andi Shyti wrote:
From: Paulo Zanoni
In multitile systems IRQ need
== Series Details ==
Series: drm/i915/display: split out high level display entry points
URL : https://patchwork.freedesktop.org/series/116431/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13001_full -> Patchwork_116431v1_full
=
Quoting Jani Nikula (2023-04-13 06:47:27)
> This seems like an unnecessary wrapper layer. Removing it will be
> helpful later.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 28 +++-
> 1 file changed, 10 inserti
On Wed, Apr 12, 2023 at 03:49:23PM -0700, Radhakrishna Sripada wrote:
Could you move this to the end of the patchset?
> From: Clint Taylor
>
> Initialization sequences and C10 phy are in place to be able to enable
> the first 2 ports of MTL. The other ports use C20 phy that still need
> to be p
On Wed, Apr 12, 2023 at 03:49:22PM -0700, Radhakrishna Sripada wrote:
> [...]
> +static void mtl_disable_ddi_buf(struct intel_encoder *encoder,
> + const struct intel_crtc_state *crtc_state)
> +{
> + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +
On Thu, Apr 13, 2023 at 09:03:29AM -0700, Ceraolo Spurio, Daniele wrote:
>
>
> On 4/13/2023 8:52 AM, Matt Roper wrote:
> > On Thu, Apr 13, 2023 at 03:56:21PM +0200, Andi Shyti wrote:
> > > Hi Tvrtko,
> > >
> > > (I forgot to CC Daniele)
> > >
> > > On Thu, Apr 13, 2023 at 11:41:28AM +0100, Tvrt
Hi Paulo,
> https://en.wikipedia.org/wiki/Ship_of_Theseus
>
> My original patch was written in 2018. Since then, the implementation
> has been rebased and changed multiple times, the commit message has
> been changed, the subject line has been changed, yet none of that is
> documented in the patc
On Thu, Apr 13, 2023 at 09:03:29AM -0700, Ceraolo Spurio, Daniele wrote:
>
>
> On 4/13/2023 8:52 AM, Matt Roper wrote:
> > On Thu, Apr 13, 2023 at 03:56:21PM +0200, Andi Shyti wrote:
> > > Hi Tvrtko,
> > >
> > > (I forgot to CC Daniele)
> > >
> > > On Thu, Apr 13, 2023 at 11:41:28AM +0100, Tvrt
On Wed, Apr 12, 2023 at 03:49:24PM -0700, Radhakrishna Sripada wrote:
> [...]
> +/* Precomputed C10 HDMI PLL tables */
> +static const struct intel_c10pll_state mtl_c10_hdmi_25175 = {
> + .clock = 25175,
> + .tx = 0x10,
> + .cmn = 0x1,
> + .pll[0] = 0x34,
> + .pll[1] = 0x00,
> +
On Thu, Apr 13, 2023 at 06:19:16PM +0200, Andi Shyti wrote:
> On Thu, Apr 13, 2023 at 09:03:29AM -0700, Ceraolo Spurio, Daniele wrote:
> >
> >
> > On 4/13/2023 8:52 AM, Matt Roper wrote:
> > > On Thu, Apr 13, 2023 at 03:56:21PM +0200, Andi Shyti wrote:
> > > > Hi Tvrtko,
> > > >
> > > > (I forgo
From: Ville Syrjälä
Mostly some CTM stuff:
- document the uapi better
- fix CHV CSC negative coefficients
- expose CTM on ilk/snb/vlv
- a bonus gamma patch for gen3
- cure CGM CSC underruns on CHV (new in v2)
Test-with: 20230411161555.10001-1-ville.syrj...@linux.intel.com
Ville Syrjälä (7):
d
From: Ville Syrjälä
The ilk/snb code is internally fully capable of handling the
CTM property, so expose it.
Note that we still choose not to expose DEGAMMA_LUT though.
The hardware is capable if degamma or gamma, but not both
similtanously due to lack of the split gamma mode. Exposing
both LUTs
From: Ville Syrjälä
Document in which order the CTM matrix elements are stored.
Signed-off-by: Ville Syrjälä
---
include/uapi/drm/drm_mode.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index 46becedf5b2f..43691058d28f 10064
From: Ville Syrjälä
Apparently desktop gen3 parts don't support the
10bit gamma mode at all. Stop claiming otherwise.
As is the case with pipe A on gen3 mobile parts, the
PIPECONF gamma mode bit can be set but it has no
effect on the output.
PNV seems to be the only slight exception, but genera
From: Ville Syrjälä
On CHV toggling the CGM CSC on/off while the pipe is running leads
to underruns. Looks like we'd have to do the toggling strictly inside
the start_of_vblank-frame_start window to avoid this, but that window
is less than a scanline so there's no way we can guarantee hitting it.
From: Ville Syrjälä
VLV has a so called "wide gamut color correction" unit (WGC).
What it is is a 3x3 matrix similar to the later CHV CGM
CSC, which less precisions/range. In fact CHV also has the WGC
but using it there doesn't reall make sense when you have the
superior CGM CSC around.
Hook up
From: Ville Syrjälä
The CHV CGM CSC coefficients are in s4.12 two's complement
format. Fix the CTM->CGM conversion to handle that correctly
instead of pretending that the hw coefficients are also
in some sign-magnitude format.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel
From: Ville Syrjälä
In order to validate LUT programming more thoroughly let's
do a state check for all color management updates as well.
Not sure we really want this outside CI. It is rather heavy
and color management updates could become rather common
with all the HDR/etc. stuff happening. May
On Wed, Apr 12, 2023 at 03:49:19PM -0700, Radhakrishna Sripada wrote:
> [...]
> @@ -980,21 +981,38 @@ static int hsw_crtc_get_shared_dpll(struct
> intel_atomic_state *state,
> static int dg2_crtc_compute_clock(struct intel_atomic_state *state,
> struct intel_crtc *
On Wed, Apr 12, 2023 at 03:49:25PM -0700, Radhakrishna Sripada wrote:
> From: Ankit Nautiyal
>
> MTL requires the PORT_CTL_WIDTH, TRANS_DDI_FUNC_CTL and DDI_BUF_CTL
> to be filled with 4 lanes for TMDS mode.
> This patch enables D2D link and fills PORT_WIDTH in appropriate
> registers.
>
> v2:
>
Quoting Jani Nikula (2023-04-13 06:47:28)
> The only way to truly clean up intel_display.[ch] is to move stuff out
> of them until there's absolutely nothing left.
>
> Start moving the high level display driver entry points, i.e. functions
> called from top level driver code only, to a new file, w
Quoting Jani Nikula (2023-04-13 06:47:29)
> High level display functionality only called from driver top level code.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 23 ---
> drivers/gpu/drm/i915/display/intel_d
Quoting Jani Nikula (2023-04-13 06:47:30)
> Follow the usual naming conventions.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
> ---
> drivers/gpu/drm/i915/display/intel_display_driver.c | 2 +-
> drivers/gpu/drm/i915/display/intel_display_driver.h | 2 +-
> drivers/gpu/drm/i915/i
Quoting Jani Nikula (2023-04-13 06:47:33)
> Split out the display reset functionality to a separate file to
> declutter intel_display.c. Rename the functions accordingly. The minor
> downside is having to expose __intel_display_resume().
>
> Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
Quoting Jani Nikula (2023-04-13 06:47:34)
> High level display functionality only called from driver top level code.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 102 --
> drivers/gpu/drm/i915/display/intel_d
Quoting Jani Nikula (2023-04-13 06:47:35)
> Follow the usual naming conventions. Switch to i915 arguments and naming
> while at it.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
> ---
> .../drm/i915/display/intel_display_driver.c | 24 +--
> .../drm/i915/display/
Quoting Jani Nikula (2023-04-13 06:47:36)
> Add intel_display_driver_early_probe() as the early probe call to
> replace intel_init_display_hooks(). The latter will be "demoted" to
> setting up hooks in intel_display.c only.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
> ---
> dri
== Series Details ==
Series: drm/i915/aux: clean up aux name initialization
URL : https://patchwork.freedesktop.org/series/116436/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13003 -> Patchwork_116436v1
Summary
---
Hi Ville,
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: 04 April 2023 23:24
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 1/3] drm/i915: Allow arbitrary refresh rates with
> VRR eDP panels
>
> From: Ville Syrjälä
>
> If the panel supp
Hi Ville,
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: 04 April 2023 23:25
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 2/3] drm/i915: Evade transcoder's vblank when
> doing seamless M/N changes
>
> From: Ville Syrjälä
>
> The trans
Hi,
> Include RC parameters for YCbCr 4:2:2 and 4:2:0 configurations.
>
Looks Good to me
Reviewed-by: Suraj Kandpal
> Signed-off-by: Dmitry Baryshkov
> ---
> drivers/gpu/drm/display/drm_dsc_helper.c | 438
> +++
> include/drm/display/drm_dsc_helper.h | 2 +
> 2 files
Hi Ville
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: 04 April 2023 23:25
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 3/3] drm/i915: Use min() instead of hand rolling
> it
>
> From: Ville Syrjälä
>
> Most places in the vblank code
== Series Details ==
Series: drm/i915: hide mkwrite_device_info() better (rev3)
URL : https://patchwork.freedesktop.org/series/113017/
State : warning
== Summary ==
Error: dim checkpatch failed
33d6eac19e2e drm/i915: hide mkwrite_device_info() better
-:21: WARNING:COMMIT_LOG_LONG_LINE: Possibl
== Series Details ==
Series: drm/i915: hide mkwrite_device_info() better (rev3)
URL : https://patchwork.freedesktop.org/series/113017/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On Thu, 13 Apr 2023 08:50:45 -0300
Jason Gunthorpe wrote:
> On Thu, Apr 13, 2023 at 08:25:52AM +, Tian, Kevin wrote:
> > > From: Jason Gunthorpe
> > > Sent: Thursday, April 13, 2023 4:07 AM
> > >
> > >
> > > > in which case we need c) a way to
> > > > report the overall set of affected d
== Series Details ==
Series: drm/i915: hide mkwrite_device_info() better (rev3)
URL : https://patchwork.freedesktop.org/series/113017/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13003 -> Patchwork_113017v3
Summary
--
== Series Details ==
Series: drm/i915: CTM stuff mostly (rev3)
URL : https://patchwork.freedesktop.org/series/116345/
State : warning
== Summary ==
Error: dim checkpatch failed
78b5c06e6a08 drm/uapi: Document CTM matrix better
040d34333d15 drm/i915: Expose crtc CTM property on ilk/snb
025b0a29
== Series Details ==
Series: drm/i915: CTM stuff mostly (rev3)
URL : https://patchwork.freedesktop.org/series/116345/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/debugfs: New debugfs for display clock frequencies (rev2)
URL : https://patchwork.freedesktop.org/series/116372/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13002_full -> Patchwork_116372v2_full
==
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