== Series Details ==
Series: drm/i915/guc: Disable PL1 power limit when loading GuC firmware
URL : https://patchwork.freedesktop.org/series/116172/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12976_full -> Patchwork_116172v1_full
=
For MTL, the PXP back-end transport uses the GSC engine to submit
HECI packets through the HW to the GSC firmware for PXP arb
session management. This submission uses a non-priveleged
batch buffer, a buffer for the command packet and of course
a context targeting the GSC-CS.
Thus for MTL, we need
Add MTL's function for ARB session creation using PXP firmware
version 4.3 ABI structure format.
Also add MTL's function for ARB session invalidation but this
reuses PXP firmware version 4.2 ABI structure format.
For both cases, in the back-end gsccs functions for sending messages
to the firmware
This series enables PXP on MTL. On ADL/TGL platforms, we rely on
the mei driver via the i915-mei PXP component interface to establish
a connection to the security firmware via the HECI device interface.
That interface is used to create and teardown the PXP ARB session.
PXP ARB session is created wh
Add helper functions into a new file for heci-packet-submission.
The helpers will handle generating the MTL GSC-CS Memory-Header
and submission of the Heci-Cmd-Packet instructions to the engine.
NOTE1: These common functions for heci-packet-submission will be used
by different i915 callers:
1
Add GSC engine based method for sending PXP firmware packets
to the GSC firmware for MTL (and future) products.
Use the newly added helpers to populate the GSC-CS memory
header and send the message packet to the FW by dispatching
the GSC_HECI_CMD_PKT instruction on the GSC engine.
We use non-priv
Add MTL hw-plumbing enabling for KCR operation under PXP
which includes:
1. Updating 'pick-gt' to get the media tile for
KCR interrupt handling
2. Adding MTL's KCR registers for PXP operation
(init, status-checking, etc.).
While doing #2, lets create a separate registers header file for PXP
On legacy platforms, KCR HW enabling is done at the time the mei
component interface is bound. It's also disabled during unbind.
However, for MTL onwards, we don't depend on a tee component
to start sending GSC-CS firmware messages.
Thus, immediately enable (or disable) KCR HW on PXP's init,
fini
Enable PXP with MTL-GSC-CS: add the has_pxp into device info
and increase the debugfs teardown timeouts to align with
new GSC-CS + firmware specs.
Now that we have 3 places that are selecting pxp timeouts
based on tee vs gsccs back-end, let's add a helper.
Signed-off-by: Alan Previn
Reviewed-by:
1. UAPI update:
Without actually changing backward compatible behavior, update
i915's drm-uapi comments that describe the possible error values
when creating a context with I915_CONTEXT_PARAM_PROTECTED_CONTENT.
Since the first merge of PXP support on ADL, i915 returns
-ENXIO if a dependency such as
On Thu, 6 Apr 2023 10:02:10 +
"Liu, Yi L" wrote:
> > From: Jason Gunthorpe
> > Sent: Thursday, April 6, 2023 7:23 AM
> >
> > On Wed, Apr 05, 2023 at 01:49:45PM -0600, Alex Williamson wrote:
> >
> > > > > QEMU can make a policy decision today because the kernel provides a
> > > > > suffic
== Series Details ==
Series: Move dma-buf mmap() reservation locking down to exporters (rev2)
URL : https://patchwork.freedesktop.org/series/116000/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x8
Hi Fei,
On 4/6/2023 4:55 PM, Yang, Fei wrote:
> On 4/1/2023 8:38 AM, fei.y...@intel.com wrote:
>> From: Fei Yang
>>
>> On MTL, GT can no longer allocate on LLC - only the CPU can.
>> This, along with addition of support for ADM/L4 cache calls a
>> MOCS/PAT table update.
>> Also add PTE encode f
On Thu, Apr 06, 2023 at 04:02:17PM +0300, Mika Kahola wrote:
> From: Radhakrishna Sripada
>
> XELPDP has C10 and C20 phys from Synopsys to drive displays. Each phy
> has a dedicated PIPE 5.2 Message bus for configuration. This message
> bus is used to configure the phy internal registers.
>
> XE
>Subject: Re: [Intel-gfx] [PATCH 1/7] drm/i915/mtl: Define MOCS and PAT tables
>for MTL
>
> Hi Fei,
>
> On Mon, Apr 03, 2023 at 03:50:26PM +0300, Jani Nikula wrote:
>> On Fri, 31 Mar 2023, fei.y...@intel.com wrote:
>>> From: Fei Yang
>>>
>>> On MTL, GT can no longer allocate on LLC - only the CPU
== Series Details ==
Series: Move dma-buf mmap() reservation locking down to exporters (rev2)
URL : https://patchwork.freedesktop.org/series/116000/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12981 -> Patchwork_116000v2
== Series Details ==
Series: drm/i915/pxp: Add MTL PXP Support (rev7)
URL : https://patchwork.freedesktop.org/series/112647/
State : warning
== Summary ==
Error: dim checkpatch failed
495f3b5c4d82 drm/i915/pxp: Add GSC-CS back-end resource init and cleanup
Traceback (most recent call last):
== Series Details ==
Series: drm/i915/pxp: Add MTL PXP Support (rev7)
URL : https://patchwork.freedesktop.org/series/112647/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/pxp: Add MTL PXP Support (rev7)
URL : https://patchwork.freedesktop.org/series/112647/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12981 -> Patchwork_112647v7
Summary
---
**SUC
On Thu, 6 Apr 2023 10:49:45 +
"Liu, Yi L" wrote:
> Hi Eric,
>
> > From: Eric Auger
> > Sent: Thursday, April 6, 2023 5:47 PM
> >
> > Hi Yi,
> >
> > On 4/1/23 17:18, Yi Liu wrote:
> > > This defines KVM_DEV_VFIO_FILE* and make alias with KVM_DEV_VFIO_GROUP*.
> > > Old userspace uses KVM_
On Thu, Apr 06, 2023 at 07:31:28AM -0700, José Roberto de Souza wrote:
> dsparb_lock it not used anymore, nuke it.
Well, this doesn't exist in our drm-tip baseline, so it would be good
if this patch is a fixup! to whatever patch is adding this back here.
Take a look to the Jani series I just push
On Thu, Mar 30, 2023 at 11:42:28PM +0300, Lionel Landwerlin wrote:
> By default the indirect state sampler data (border colors) are stored
> in the same heap as the SAMPLER_STATE structure. For userspace drivers
> that can be 2 different heaps (dynamic state heap & bindless sampler
> state heap). T
On Thu, Apr 06, 2023 at 04:02:18PM +0300, Mika Kahola wrote:
> C10 phys uses direct mapping internally for voltage and pre-emphasis levels.
> Program the levels directly to the fields in the VDR Registers.
>
> Bspec: 65449
>
> v2: From table "C10: Tx EQ settings for DP 1.4x" it shows level 1
>
From: John Harrison
Don't use 'xe_lp*' prefixes for register lists that are common with
Gen8.
Signed-off-by: John Harrison
---
.../gpu/drm/i915/gt/uc/intel_guc_capture.c| 30 +--
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/inte
From: John Harrison
The GuC error capture list creation was including Gen8 registers on Xe
platforms. While fixing that, it was noticed that there were other
issues. The platform naming was wrong, the naming of lists was
misleading, the steered register code was duplicated and steered
registers w
From: John Harrison
Remove 99% duplicated steered register list code. Also, include the
pre-Xe steered registers in the pre-Xe list generation.
Signed-off-by: John Harrison
---
.../gpu/drm/i915/gt/uc/intel_guc_capture.c| 112 +-
1 file changed, 29 insertions(+), 83 deletion
From: John Harrison
Fix Xe_LP name.
Signed-off-by: John Harrison
---
.../gpu/drm/i915/gt/uc/intel_guc_capture.c| 44 +--
1 file changed, 21 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_ca
From: John Harrison
A pair of pre-Xe registers were being included in the Xe capture list.
GuC was rejecting those as being invalid and logging errors about
them. So, stop doing it.
Signed-off-by: John Harrison
Fixes: dce2bd542337 ("drm/i915/guc: Add Gen9 registers for GuC error state
capture.
From: John Harrison
Don't use GEN9 as a prefix for register lists that contain all GEN8
registers.
Signed-off-by: John Harrison
---
drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_g
== Series Details ==
Series: drm/i915: Query compressed bpp properly using correct DPCD and DP Spec
info
URL : https://patchwork.freedesktop.org/series/116179/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12979_full -> Patchwork_116179v1_full
== Series Details ==
Series: Improvements to GuC error capture list processing
URL : https://patchwork.freedesktop.org/series/116219/
State : warning
== Summary ==
Error: dim checkpatch failed
71d5e265121d drm/i915/guc: Don't capture Gen8 regs on Xe devices
-:35: ERROR:COMPLEX_MACRO: Macros wi
== Series Details ==
Series: Improvements to GuC error capture list processing
URL : https://patchwork.freedesktop.org/series/116219/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12981 -> Patchwork_116219v1
Summary
---
On Fri, Mar 31, 2023 at 03:52:16PM -0700, john.c.harri...@intel.com wrote:
From: John Harrison
First release of GuC for Meteorlake.
NB: As this is still pre-release and likely to change, use explicit
versioning for now. The official, full release will use reduced
version naming.
Signed-off-by
Hi Suraj
On 28/03/2023 16:20, Kandpal, Suraj wrote:
-Original Message-
From: dri-devel On Behalf Of Jani
Nikula
Sent: Wednesday, March 8, 2023 5:00 PM
To: Kandpal, Suraj ; dri-
de...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
Cc: Dmitry Baryshkov ; Nautiyal, Ankit K
; Sha
Hi Dmitry
> -Original Message-
> From: Dmitry Baryshkov
> Sent: Friday, April 7, 2023 8:28 AM
> To: Kandpal, Suraj ; Jani Nikula
> ; dri-de...@lists.freedesktop.org; intel-
> g...@lists.freedesktop.org
> Cc: Nautiyal, Ankit K ; Shankar, Uma
> ; Maarten Lankhorst
>
> Subject: Re: [PATCH
> From: Alex Williamson
> Sent: Friday, April 7, 2023 2:58 AM
> > >
> > > You don't say anything about potential restriction, ie. what if the user
> > > calls
> > > KVM_DEV_VFIO_FILE with device fds while it has been using legacy
> container/group
> > > API?
> >
> > legacy container/group path ca
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: e134c93f788fb93fd6a3ec3af9af850a2048c7e6 Add linux-next specific
files for 20230406
Error/Warning reports:
https://lore.kernel.org/oe-kbuild-all/202303082135.njdx1bij-...@intel.com
https
== Series Details ==
Series: drm/i915/mtl: Add Support for C10 phy
URL : https://patchwork.freedesktop.org/series/116191/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12981_full -> Patchwork_116191v1_full
Summary
---
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