According to Bspec, the voltage level for 480MHz is to be set as 1
instead of 2.
BSpec: 49208
Fixes: 06f1b06dc5b7 ("drm/i915/display: Add 480 MHz CDCLK steps for RPL-U")
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 30 +++---
1 file chan
Hello,
In past few days Public GFX CI was affected by two major issues:
# Not all BAT machines were able to reboot successfully after several recent
kernel deadlocks. Each such scenario required manual intervention to get
machines back into execution. WIP to rootcause why hard reboot is not pro
On Tue, 21 Feb 2023, Imre Deak wrote:
> Call the opregion register/unregister functions during driver
> loading/unloading on !HAS_DISPLAY platforms. These functions will send
> the opregion adapter power state notifications which is required on all
> platforms (similarly how this is sent during ru
On Tue, 21 Feb 2023, Imre Deak wrote:
> Move the display debugfs registration later, after initializing steps
> for opregion/acpi/audio. These latter ones don't depend on the debugfs
> entries, OTOH some debugfs entries may depend on the initialized state.
>
> Signed-off-by: Imre Deak
Patches 1-
== Series Details ==
Series: drm/i915/display: Set correct voltage level for 480MHz CDCLK
URL : https://patchwork.freedesktop.org/series/114752/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12820 -> Patchwork_114752v1
Summ
On Thu, 02 Mar 2023, Arun R Murthy wrote:
> Enable SDP error detection configuration, this will set CRC16 in
> 128b/132b link layer.
> For Display version 13 a hardware bit31 in register VIDEO_DIP_CTL is
> added to enable/disable SDP CRC applicable for DP2.0 only, but the
> default value of this b
On Tue, 07 Mar 2023, Jani Nikula wrote:
> On Thu, 02 Mar 2023, Arun R Murthy wrote:
>> Enable SDP error detection configuration, this will set CRC16 in
>> 128b/132b link layer.
>> For Display version 13 a hardware bit31 in register VIDEO_DIP_CTL is
>> added to enable/disable SDP CRC applicable fo
On Mon, Mar 06, 2023 at 08:14:35PM +0200, Jani Nikula wrote:
> On Mon, 27 Feb 2023, Stanislav Lisovskiy
> wrote:
> > Display to communicate display pipe count/CDCLK/voltage configuration
> > to Pcode for more accurate power accounting for gen >= 12.
> > Existing sequence is only sending the volta
We can skip the assignment and i915 variable
altogether and use refernce directly. Also used at
single place only.
Signed-off-by: Tejas Upadhyay
---
drivers/gpu/drm/i915/selftests/i915_request.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/selftests/
Hi GG,
On Tue, Mar 07, 2023 at 09:33:12AM +0200, Gwan-gyeong Mun wrote:
> Hi Andi,
>
> After applying these two patches, deadlock is being detected in the call
> stack below. Please review whether the patch to update the
> intel_context_migrate_copy() part affected the deadlock.
>
> https://inte
Hi Dave, Daniel,
I apparently didn't send my 2023-02-23 pull request or at least don't see it on
dri-devel, so I added both shortlogs here.
Enjoy!
~Maarten
drm-misc-next-2023-03-07:
drm-misc-next for v6.4-rc1:
UAPI Changes:
Cross-subsystem Changes:
- Add Neil Armstrong as linaro maintainer.
== Series Details ==
Series: drm/i915/selftest: Remove avoidable init assignment
URL : https://patchwork.freedesktop.org/series/114755/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12820 -> Patchwork_114755v1
Summary
-
On Tue, 07 Mar 2023, "Lisovskiy, Stanislav"
wrote:
> On Mon, Mar 06, 2023 at 08:14:35PM +0200, Jani Nikula wrote:
>> On Mon, 27 Feb 2023, Stanislav Lisovskiy
>> wrote:
>> > Display to communicate display pipe count/CDCLK/voltage configuration
>> > to Pcode for more accurate power accounting for
== Series Details ==
Series: drm/i915: Bump VBT version for expected child dev size check
URL : https://patchwork.freedesktop.org/series/114721/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12818_full -> Patchwork_114721v1_full
Hi
Am 05.03.23 um 23:10 schrieb Dmitry Osipenko:
[...]
*bo_ptr = bo;
diff --git a/drivers/gpu/drm/virtio/virtgpu_plane.c
b/drivers/gpu/drm/virtio/virtgpu_plane.c
index 4c09e313bebc..3f21512ff153 100644
--- a/drivers/gpu/drm/virtio/virtgpu_plane.c
+++ b/drivers/gpu/drm/virtio/virtgpu_plane
Hi
Am 05.03.23 um 23:10 schrieb Dmitry Osipenko:
Export drm_gem_un/pin() functions. They will be used by VirtIO-GPU driver
for pinning of an active framebuffer, preventing it from swapping out by
memory shrinker.
Please see my reply to [10/11] on why this patch should not be used.
Best regard
From: Tvrtko Ursulin
In i915 we have this concept of "wait boosting" where we give a priority boost
for instance to fences which are actively waited upon from userspace. This has
it's pros and cons and can certainly be discussed at lenght. However fact is
some workloads really like it.
Problem i
From: Tvrtko Ursulin
Unhide some i915 helpers which are used for splitting the signalled
check vs notification stages during en masse fence processing.
Signed-off-by: Tvrtko Ursulin
---
drivers/dma-buf/dma-fence.c | 35 +++--
drivers/gpu/drm/i915/gt/intel_breadc
From: Tvrtko Ursulin
In preparation of adding a new field to struct dma_fence_cb we will need
an initialization helper for those callers who add callbacks by open-
coding. That will ensure they initialize all the fields so common code
does not get confused by potential garbage in some fields.
Si
From: Tvrtko Ursulin
Use the previously added initialization helper to ensure correct operation
of the common code.
Signed-off-by: Tvrtko Ursulin
Cc: Zack Rusin
---
drivers/gpu/drm/vmwgfx/vmwgfx_fence.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vmwgfx
From: Tvrtko Ursulin
Use the previously added initialization helper to ensure correct operation
of the common code.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_active.c | 2 +-
drivers/gpu/drm/i915/i915_active.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --g
From: Tvrtko Ursulin
As signaling is enabled on the container fence we need to propagate any
external waiting status to individual fences in order to enable owning
drivers see it.
Signed-off-by: Tvrtko Ursulin
---
drivers/dma-buf/dma-fence-array.c | 5 +++--
1 file changed, 3 insertions(+), 2
From: Tvrtko Ursulin
Track how many callers are explicity waiting on a fence to signal and
allow querying that via new dma_fence_wait_count() API.
This provides infrastructure on top of which generic "waitboost" concepts
can be implemented by individual drivers. Wait-boosting is any reactive
act
From: Tvrtko Ursulin
...
Signed-off-by: Tvrtko Ursulin
---
drivers/dma-buf/dma-fence.c | 9 +
include/linux/dma-fence.h | 3 +++
2 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/dma-buf/dma-fence.c b/drivers/dma-buf/dma-fence.c
index bdba5a8e21b1..5607acdb6ccf 1
From: Tvrtko Ursulin
As signaling is enabled on the container fence we need to propagate any
external waiting status to individual fences in order to enable owning
drivers see it.
Signed-off-by: Tvrtko Ursulin
---
drivers/dma-buf/dma-fence-chain.c | 22 --
include/linux/dma
From: Tvrtko Ursulin
Use the previously added dma-fence API to mark the direct i915 waits as
explicit. This has no significant effect apart from following the new
pattern.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_request.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion
From: Tvrtko Ursulin
Use the newly added dma-fence API to apply waitboost not only requests
which have been marked with I915_WAIT_PRIORITY by i915, but which may be
waited upon by others (such as for instance buffer sharing in multi-GPU
scenarios).
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu
From: Tvrtko Ursulin
Use the previously added dma-fence tracking of explicit waiters.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/drm_syncobj.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/drm_syncobj.c b/drivers/gpu/drm/drm_syncobj.c
index 0c
From: Tvrtko Ursulin
Userspace waits coming via the drm_syncobj route have so far been
bypassing the waitboost mechanism.
Use the previously added dma-fence wait tracking API and apply the
same waitboosting logic which applies to other entry points.
This should fix the perfomance regressions ex
On Tue, Mar 07, 2023 at 12:23:59PM +0200, Jani Nikula wrote:
> On Tue, 07 Mar 2023, "Lisovskiy, Stanislav"
> wrote:
> > On Mon, Mar 06, 2023 at 08:14:35PM +0200, Jani Nikula wrote:
> >> On Mon, 27 Feb 2023, Stanislav Lisovskiy
> >> wrote:
> >> > Display to communicate display pipe count/CDCLK/v
Hi,
Issue re-reported, https://patchwork.freedesktop.org/series/114199/
Re-reporting got delayed due to Shards Queue in CI.
Thanks,
Y Sai Nandan
-Original Message-
From: Roper, Matthew D
Sent: Thursday, March 2, 2023 5:00 AM
To: intel-gfx@lists.freedesktop.org
Cc: Andrea Righi ; LGCI
== Series Details ==
Series: drm/i915/mtl: Apply Wa_14017073508 for MTL Media Step (rev2)
URL : https://patchwork.freedesktop.org/series/114508/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12800 -> Patchwork_114508v2
Summ
On Tue, 07 Mar 2023, "Lisovskiy, Stanislav"
wrote:
> On Tue, Mar 07, 2023 at 12:23:59PM +0200, Jani Nikula wrote:
>> On Tue, 07 Mar 2023, "Lisovskiy, Stanislav"
>> wrote:
>> > On Mon, Mar 06, 2023 at 08:14:35PM +0200, Jani Nikula wrote:
>> >> On Mon, 27 Feb 2023, Stanislav Lisovskiy
>> >> wro
== Series Details ==
Series: series starting with [1/3] drm/i915: Remove redundant check for DG1
URL : https://patchwork.freedesktop.org/series/114735/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12818_full -> Patchwork_114735v1_full
=
On Mon, 06 Mar 2023, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> When we change the M/N values seamlessly during a fastset we should
> also update the vblank timestamping stuff to make sure the vblank
> timestamp corrections/guesstimations come out exact.
>
> Note that only crtc_clock and fram
On Mon, 06 Mar 2023, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Add some (probably overkill) locking to protect the vblank
> timestamping constants updates during seamless M/N fastsets.
>
> As everything should be naturally aligned I think the individual
> pieces should probably end up updati
== Series Details ==
Series: Waitboost drm syncobj waits (rev4)
URL : https://patchwork.freedesktop.org/series/113846/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12821 -> Patchwork_113846v4
Summary
---
**FAILURE**
On Mon, 06 Mar 2023, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Move intel_crtc_update_active_timings() into intel_vblank.c
> where it more properly belongs.
Wish the function naming could reflect the file name, but hey, if it
declutters intel_display.c it's good!
Reviewed-by: Jani Nikula
On Mon, 06 Mar 2023, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Pull the scanline_offset calculation into its own function. Might
> have further use for this later with DSB scanline waits.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/inte
On Tue, Mar 07, 2023 at 02:31:11AM +, Tian, Kevin wrote:
> > From: Jason Gunthorpe
> > Sent: Monday, March 6, 2023 9:17 PM
> >
> > On Fri, Mar 03, 2023 at 09:55:42AM -0700, Alex Williamson wrote:
> >
> > > I can't think of a reason DPDK couldn't use hot-reset. If we want to
> > > make it a
On Tue, Mar 07, 2023 at 06:38:59AM +, Tian, Kevin wrote:
> > From: Liu, Yi L
> > Sent: Friday, March 3, 2023 2:58 PM
> >
> > > What should we return here anyhow if an access was created?
> >
> > iommufd_access->obj.id. should be fine. Is it?
>
> Thinking more I'm not sure whether it's a goo
> From: Jason Gunthorpe
> Sent: Tuesday, March 7, 2023 8:38 PM
>
> On Tue, Mar 07, 2023 at 06:38:59AM +, Tian, Kevin wrote:
> > > From: Liu, Yi L
> > > Sent: Friday, March 3, 2023 2:58 PM
> > >
> > > > What should we return here anyhow if an access was created?
> > >
> > > iommufd_access->ob
> -Original Message-
> From: De Marchi, Lucas
> Sent: Wednesday, March 1, 2023 1:27 AM
> To: Kahola, Mika
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH v4 03/22] drm/i915/mtl: Create separate reg
> file
> for PICA registers
>
> On Fri, Feb 24, 2023 at 12:13:37P
> From: Jason Gunthorpe
> Sent: Tuesday, March 7, 2023 8:37 PM
>
> On Tue, Mar 07, 2023 at 02:31:11AM +, Tian, Kevin wrote:
> > > From: Jason Gunthorpe
> > > Sent: Monday, March 6, 2023 9:17 PM
> > >
> > > On Fri, Mar 03, 2023 at 09:55:42AM -0700, Alex Williamson wrote:
> > >
> > > > I can't
On Tue, Mar 07, 2023 at 03:16:43PM +0530, Tejas Upadhyay wrote:
> We can skip the assignment and i915 variable
> altogether and use refernce directly. Also used at
> single place only.
>
> Signed-off-by: Tejas Upadhyay
trusting the compiler,
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/
On 28/02/2023 18:31, Jani Nikula wrote:
On Tue, 28 Feb 2023, Dmitry Baryshkov wrote:
DSC model contains pre-SCR RC parameters for other bpp/bpc combinations,
include them here for completeness.
Need to run now, note to self:
Does i915 use the arrays to limit the bpp/bpc combos supported by
h
On 07-03-2023 01:50, Rodrigo Vivi wrote:
On Mon, Mar 06, 2023 at 08:33:04AM +, Gupta, Anshuman wrote:
-Original Message-
From: Nilawar, Badal
Sent: Saturday, March 4, 2023 9:48 PM
To: intel-gfx@lists.freedesktop.org
Cc: Gupta, Anshuman ; Ewins, Jon
; Belgaumkar, Vinay ;
Vivi,
Other platforms (msm) will benefit from sharing the DSC config setup
functions. This series moves parts of static DSC config data from the
i915 driver to the common helpers to be used by other drivers.
Note: the RC parameters were cross-checked against config files found in
DSC model 2021062, 2016
Move DSC RC tables to DRM DSC helper. No additional code changes
and/or cleanups are a part of this commit, it will be cleaned up in the
followup commits.
Reviewed-by: Jani Nikula
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/display/drm_dsc_helper.c | 372 ++
drivers
The rc_buf_thresh values are common to all DSC implementations. Move
them to the common helper together with the code to propagage them to
the drm_dsc_config.
Reviewed-by: Jani Nikula
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/display/drm_dsc_helper.c | 35 +++
dri
After cross-checking DSC models (20150914, 20161212, 20210623) change
values in rc_parameters tables to follow config files present inside
the DSC model. Handle two places, where i915 tables diverged from the
model, by patching the rc values in the code.
Note: I left one case uncorrected, 8bpp/10b
The array of rc_parameters contains a mixture of parameters from DSC 1.1
and DSC 1.2 standards. Split these tow configuration arrays in
preparation to adding more configuration data.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/display/drm_dsc_helper.c | 127 ++
drive
Next commits are going to add support for additional RC parameter lookup
tables. These tables are going to use different bpp/bpc combinations,
thus it makes little sense to keep the 2d array for RC parameters.
Switch to using the flat array.
Reviewed-by: Jani Nikula
Signed-off-by: Dmitry Baryshko
Stop using an interim structure rc_parameters for storing calculated
params and then setting drm_dsc_config using that structure. Instead put
calculated params into the struct drm_dsc_config directly.
Reviewed-by: Jani Nikula
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/i915/display/inte
DSC model contains pre-SCR RC parameters for other bpp/bpc combinations,
include them here for completeness.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/display/drm_dsc_helper.c | 72
1 file changed, 72 insertions(+)
diff --git a/drivers/gpu/drm/display/drm_dsc_
Add a helper setting config values which are typically constant across
operating modes (table E-4 of the standard) and mux_word_size (which is
a const according to 3.5.2).
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/display/drm_dsc_helper.c | 21 +
include/drm/display
Include RC parameters for YCbCr 4:2:2 and 4:2:0 configurations.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/display/drm_dsc_helper.c | 438 +++
include/drm/display/drm_dsc_helper.h | 2 +
2 files changed, 440 insertions(+)
diff --git a/drivers/gpu/drm/display/d
Use new DRM DSC helpers to setup DSI DSC configuration. The
initial_scale_value needs to be adjusted according to the standard, but
this is a separate change.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 61 --
1 file changed, 8 insertions(
On Tue, Mar 07, 2023 at 02:16:48PM +0200, Jani Nikula wrote:
> On Mon, 06 Mar 2023, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > When we change the M/N values seamlessly during a fastset we should
> > also update the vblank timestamping stuff to make sure the vblank
> > timestamp correcti
On Tue, Mar 07, 2023 at 02:24:08PM +0200, Jani Nikula wrote:
> On Mon, 06 Mar 2023, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Add some (probably overkill) locking to protect the vblank
> > timestamping constants updates during seamless M/N fastsets.
> >
> > As everything should be natu
On Tue, 07 Mar 2023, Ville Syrjälä wrote:
> On Tue, Mar 07, 2023 at 02:24:08PM +0200, Jani Nikula wrote:
>> On Mon, 06 Mar 2023, Ville Syrjala wrote:
>> > From: Ville Syrjälä
>> >
>> > Add some (probably overkill) locking to protect the vblank
>> > timestamping constants updates during seamless
I collected the, from my POW, uncontroversial patches from V1 of the TTM
shrinker series, some corrected after the initial patch submission, one
patch added from the Xe RFC ("drm/ttm: Don't print error message if
eviction was interrupted"). It would be nice to have these reviewed and
merged while r
Implement i915_gem_fb_mmap() to enable fb_ops.fb_mmap()
callback for i915's framebuffer objects.
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 121 ++-
drivers/gpu/drm/i915/gem/i915_gem_mman.h | 2 +-
2 files changed, 77 insertions(+), 46 deletion
The LRU mechanism may look up a resource in the process of being removed
from an object. The locking rules here are a bit unclear but it looks
currently like res->bo assignment is protected by the LRU lock, whereas
bo->resource is protected by the object lock, while *clearing* of
bo->resource is al
If stolen memory allocation fails for fbdev, the driver will
fallback to system memory. Calculation of smem_start is wrong
for such framebuffer objs if the platform comes with no gmadr or
no aperture. Solve this by adding fb_mmap callback which will
use GTT if aperture is available otherwise will u
When hitting an error, the error path forgot to unmap dma mappings and
could call set_pages_wb() on already uncached pages.
Fix this by introducing a common __ttm_pool_free() function that
does the right thing.
v2:
- Simplify __ttm_pool_free() (Christian König)
Fixes: d099fc8f540a ("drm/ttm: new
New code is recommended to use the BIT macro instead of the explicit
shifts. Change the older defines so that we can keep the style consistent
with upcoming changes.
v2:
- Also change the value of the _PRIV_POPULATED bit (Christian König)
Signed-off-by: Thomas Hellström
---
include/drm/ttm/ttm_
Unexport ttm_global_swapout() since it is not used outside of TTM.
Signed-off-by: Thomas Hellström
---
drivers/gpu/drm/ttm/ttm_device.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/ttm/ttm_device.c b/drivers/gpu/drm/ttm/ttm_device.c
index ae2f19dc9f81..64a59f46f6c3 100644
-
Avoid printing an error message if eviction was interrupted by,
for example, the user pressing CTRL-C. That may happen if eviction
is waiting for something, like for example a free batch-buffer.
Signed-off-by: Thomas Hellström
---
drivers/gpu/drm/ttm/ttm_bo.c | 3 ++-
1 file changed, 2 insertion
When swapping out, we will split multi-order pages both in order to
move them to the swap-cache and to be able to return memory to the
swap cache as soon as possible on a page-by-page basis.
Reduce the page max order to the system PMD size, as we can then be nicer
to the system and avoid splitting
When swapping in, or under memory pressure ttm_tt_populate() may sleep
for a substantiable amount of time. Allow interrupts during the sleep.
This will also allow us to inject -EINTR errors during swapin in upcoming
patches.
Also avoid returning VM_FAULT_OOM, since that will confuse the core
mm, m
Hi Ville,
On 3/6/2023 3:32 PM, Ville Syrjälä wrote:
On Mon, Mar 06, 2023 at 11:28:50AM +0100, Nirmoy Das wrote:
If stolen memory allocation fails for fbdev, the driver will
fallback to system memory. Calculation of smem_start is wrong
for such framebuffer objs if the platform comes with no gmad
== Series Details ==
Series: series starting with [RFC,1/2] drm/i915: Add a function to mmap
framebuffer obj
URL : https://patchwork.freedesktop.org/series/114775/
State : warning
== Summary ==
Error: dim checkpatch failed
d0b102d9dd12 drm/i915: Add a function to mmap framebuffer obj
-:120: W
== Series Details ==
Series: series starting with [RFC,1/2] drm/i915: Add a function to mmap
framebuffer obj
URL : https://patchwork.freedesktop.org/series/114775/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separa
Hi,
On Thu, Feb 16, 2023 at 12:12:13PM +0100, Daniel Vetter wrote:
> The stuff never really worked, and leads to lots of fun because it
> out-of-order frees atomic states. Which upsets KASAN, among other
> things.
>
> For async updates we now have a more solid solution with the
> ->atomic_async_c
== Series Details ==
Series: series starting with [RFC,1/2] drm/i915: Add a function to mmap
framebuffer obj
URL : https://patchwork.freedesktop.org/series/114775/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12821 -> Patchwork_114775v1
==
== Series Details ==
Series: drm/i915/xelp: Implement Wa_1606376872
URL : https://patchwork.freedesktop.org/series/114745/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12820_full -> Patchwork_114745v1_full
Summary
---
This is a note to let you know that I've just added the patch titled
drm/i915: Don't use BAR mappings for ring buffers with LLC
to the 6.2-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
This is a note to let you know that I've just added the patch titled
drm/i915: Don't use stolen memory for ring buffers with LLC
to the 6.2-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
From: Ville Syrjälä
AFAICS Bspec has never asked us to switch to TPS1 when *disabling*
DP_TP_CTL. Let's stop doing that in case it confuses something.
We do have to switch before we *enable* DP_TP_CTL, but that
is already being handled correctly.
v2: Do the same for FDI
Reviewed-by: Imre Deak
This is a note to let you know that I've just added the patch titled
drm/i915: Don't use stolen memory for ring buffers with LLC
to the 6.1-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
This is a note to let you know that I've just added the patch titled
drm/i915: Don't use BAR mappings for ring buffers with LLC
to the 6.1-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
This is a note to let you know that I've just added the patch titled
drm/i915: Don't use BAR mappings for ring buffers with LLC
to the 5.15-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
Am 07.03.23 um 15:46 schrieb Thomas Hellström:
The LRU mechanism may look up a resource in the process of being removed
from an object. The locking rules here are a bit unclear but it looks
currently like res->bo assignment is protected by the LRU lock, whereas
bo->resource is protected by the ob
== Series Details ==
Series: Enable HDCP2.x via GSC CS (rev11)
URL : https://patchwork.freedesktop.org/series/111876/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12820_full -> Patchwork_111876v11_full
Summary
---
*
On 3/7/23 17:55, Christian König wrote:
Am 07.03.23 um 15:46 schrieb Thomas Hellström:
The LRU mechanism may look up a resource in the process of being removed
from an object. The locking rules here are a bit unclear but it looks
currently like res->bo assignment is protected by the LRU lock,
From: John Harrison
commit 690e0ec8e63da9a29b39fedc6ed5da09c7c82651 upstream.
Direction from hardware is that stolen memory should never be used for
ring buffer allocations on platforms with LLC. There are too many
caching pitfalls due to the way stolen memory accesses are routed. So
it is safes
From: John Harrison
commit 85636167e3206c3fbd52254fc432991cc4e90194 upstream.
Direction from hardware is that ring buffers should never be mapped
via the BAR on systems with LLC. There are too many caching pitfalls
due to the way BAR accesses are routed. So it is safest to just not
use it.
Sign
On 3/7/23 13:42, Thomas Zimmermann wrote:
> Hi
>
> Am 05.03.23 um 23:10 schrieb Dmitry Osipenko:
> [...]
>> *bo_ptr = bo;
>> diff --git a/drivers/gpu/drm/virtio/virtgpu_plane.c
>> b/drivers/gpu/drm/virtio/virtgpu_plane.c
>> index 4c09e313bebc..3f21512ff153 100644
>> --- a/drivers/gpu/drm/v
On 3/7/23 21:25, Dmitry Osipenko wrote:
>> Not really a problem with this patchset, but having such branches looks
>> like a bug in the driver's GEM design. Whatever your GEM object needs or
>> does, it should be hidden in the implementation. Why is virtio doing this?
> There is another "VRAM" Virt
From: John Harrison
commit 690e0ec8e63da9a29b39fedc6ed5da09c7c82651 upstream.
Direction from hardware is that stolen memory should never be used for
ring buffer allocations on platforms with LLC. There are too many
caching pitfalls due to the way stolen memory accesses are routed. So
it is safes
From: John Harrison
commit 85636167e3206c3fbd52254fc432991cc4e90194 upstream.
Direction from hardware is that ring buffers should never be mapped
via the BAR on systems with LLC. There are too many caching pitfalls
due to the way BAR accesses are routed. So it is safest to just not
use it.
Sign
From: John Harrison
commit 85636167e3206c3fbd52254fc432991cc4e90194 upstream.
Direction from hardware is that ring buffers should never be mapped
via the BAR on systems with LLC. There are too many caching pitfalls
due to the way BAR accesses are routed. So it is safest to just not
use it.
Sign
, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url:
https://github.com/intel-lab-lkp/linux/commits/Thomas-Hellstr-m/drm-ttm-Fix-a-NULL-pointer-dereference/20230307-224931
base: git://anongit.freedesktop.org/drm/drm-mis
From: Madhumitha Tolakanahalli Pradeep
Add support to load DMC on MTL.
According to the spec and based on tests done on real hardware, 0x7000
is a reasonable size limit that covers each possible payload.
v2:
- Tighten payload size limit. (Matt, Rodrigo)
- Use a better name for the defined
On Tue, Mar 07, 2023 at 04:51:11PM -0300, Gustavo Sousa wrote:
> From: Madhumitha Tolakanahalli Pradeep
>
>
> Add support to load DMC on MTL.
>
> According to the spec and based on tests done on real hardware, 0x7000
> is a reasonable size limit that covers each possible payload.
>
> v2:
> -
== Series Details ==
Series: drm/i915/display: Set correct voltage level for 480MHz CDCLK
URL : https://patchwork.freedesktop.org/series/114752/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12820_full -> Patchwork_114752v1_full
On Tue, Mar 07, 2023 at 12:22:38AM -0300, Gustavo Sousa wrote:
> Wa_1606376872 applies to all Xe_LP IPs.
"...except DG1"
Aside from that,
Reviewed-by: Matt Roper
>
> Signed-off-by: Gustavo Sousa
> ---
> drivers/gpu/drm/i915/gt/intel_gt_regs.h | 3 +++
> drivers/gpu/drm/i915/gt/intel_wor
From: Chris Wilson
If we fail to adjust the GuC run-control on opening the perf stream,
make sure we unwind the wakeref just taken.
v2: Retain old goto label names (Ashutosh)
Fixes: 01e742746785 ("drm/i915/guc: Support OA when Wa_16011777198 is enabled")
Signed-off-by: Chris Wilson
Reviewed-by
Now that we may have multiple OA units in a single GT as well as on
separate GTs, create an engine group that maps to a single OA unit.
v2: (Jani)
- Drop warning on ENOMEM
- Reorder patch in the series
v3: (Ashutosh)
- Remove unused members from perf structs
- Update comments
- Update engine_supp
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