[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/psr: Add continuous full frame bit together with single (rev2)

== Series Details == Series: drm/i915/psr: Add continuous full frame bit together with single (rev2) URL : https://patchwork.freedesktop.org/series/111420/ State : success == Summary == CI Bug Log - changes from CI_DRM_12457 -> Patchwork_111420v2 ===

[Intel-gfx] [PULL] drm-intel-fixes

Hi Dave, Daniel, A few more small fixes for the release candidate week. Fixes for confused return values when waiting on request retirement, which can explode in the GuC backend, fix for reading on DRAM info data and a fix to filter out impossible display pipes from the bigjoiner code. Regards,

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/pvc: Implement recommended caching policy

== Series Details == Series: drm/i915/pvc: Implement recommended caching policy URL : https://patchwork.freedesktop.org/series/111491/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12456_full -> Patchwork_111491v1_full Summ

Re: [Intel-gfx] [PATCH v4 3/5] drm/i915: Introduce guard pages to i915_vma

On 30/11/2022 23:58, Andi Shyti wrote: From: Chris Wilson Introduce the concept of padding the i915_vma with guard pages before and after. The major consequence is that all ordinary uses of i915_vma must use i915_vma_offset/i915_vma_size and not i915_vma.node.start/size directly, as the drm_m

Re: [Intel-gfx] [PATCH v4 4/5] drm/i915: Refine VT-d scanout workaround

On 30/11/2022 23:58, Andi Shyti wrote: From: Chris Wilson VT-d may cause overfetch of the scanout PTE, both before and after the vma (depending on the scanout orientation). bspec recommends that we provide a tile-row in either directions, and suggests using 168 PTE, warning that the accesses

Re: [Intel-gfx] [PATCH v4 5/5] Revert "drm/i915: Improve on suspend / resume time with VT-d enabled"

On 30/11/2022 23:58, Andi Shyti wrote: This reverts commit 2ef6efa79fecd5e3457b324155d35524d95f2b6b. Checking the presence if the IRST (Intel Rapid Start Technology) through the ACPI to decide whether to rebuild or not the GGTT puts us at the mercy of the boot firmware and we need to unnecessa

Re: [Intel-gfx] [PATCH v3 5/5] drm/i915/mtl: Hold forcewake and MCR lock over PPAT setup

On 30.11.2022 07:58, Matt Roper wrote: > PPAT setup involves a series of multicast writes. This can be optimized > slightly be acquiring forcewake and the steering lock just once for the > entire sequence. > > v2: > - We should use FW_REG_WRITE instead of FW_REG_READ. (Bala) > > Suggested-by:

Re: [Intel-gfx] [PATCH v7 20/20] drm/i915/vm_bind: Async vm_unbind support

On 29/11/2022 23:26, Niranjana Vishwanathapura wrote: On Wed, Nov 23, 2022 at 11:42:58AM +, Matthew Auld wrote: On 16/11/2022 00:37, Niranjana Vishwanathapura wrote: On Tue, Nov 15, 2022 at 03:15:03PM -0800, Niranjana Vishwanathapura wrote: On Tue, Nov 15, 2022 at 08:33:47AM -0800, Niranjan

Re: [Intel-gfx] [PATCH 2/2] drm/i915/guc: Look for a guilty context when an engine reset fails

On 30/11/2022 21:04, John Harrison wrote: On 11/30/2022 00:30, Tvrtko Ursulin wrote: On 29/11/2022 21:12, john.c.harri...@intel.com wrote: From: John Harrison Engine resets are supposed to never happen. But in the case when one Engine resets or engine reset failures? Hopefully the latter.

Re: [Intel-gfx] [PATCH] drm/i915: fix exiting context timeout calculation

On 01/12/2022 00:22, John Harrison wrote: On 11/29/2022 00:43, Tvrtko Ursulin wrote: On 28/11/2022 16:52, Andrzej Hajda wrote: In case context is exiting preempt_timeout_ms is used for timeout, but since introduction of DRM_I915_PREEMPT_TIMEOUT_COMPUTE it increases to 7.5 seconds. Heartbeat o

Re: [Intel-gfx] [PATCH v4 3/5] drm/i915: Introduce guard pages to i915_vma

Hi Tvrtko, [...] > > @@ -768,8 +773,17 @@ i915_vma_insert(struct i915_vma *vma, struct > > i915_gem_ww_ctx *ww, > > GEM_BUG_ON(!IS_ALIGNED(alignment, I915_GTT_MIN_ALIGNMENT)); > > GEM_BUG_ON(!is_power_of_2(alignment)); > > + guard = vma->guard; /* retain guard across rebinds */ > > +

Re: [Intel-gfx] [PATCH v8 22/22] drm/i915/vm_bind: Support capture of persistent mappings

On 29/11/2022 07:26, Niranjana Vishwanathapura wrote: Support dump capture of persistent mappings upon user request. Signed-off-by: Brian Welty Signed-off-by: Niranjana Vishwanathapura --- .../drm/i915/gem/i915_gem_vm_bind_object.c| 11 +++ drivers/gpu/drm/i915/gt/intel_gtt.c

Re: [Intel-gfx] [PATCH v4 3/5] drm/i915: Introduce guard pages to i915_vma

On 01/12/2022 10:45, Andi Shyti wrote: Hi Tvrtko, [...] @@ -768,8 +773,17 @@ i915_vma_insert(struct i915_vma *vma, struct i915_gem_ww_ctx *ww, GEM_BUG_ON(!IS_ALIGNED(alignment, I915_GTT_MIN_ALIGNMENT)); GEM_BUG_ON(!is_power_of_2(alignment)); + guard = vma->guard; /* re

Re: [Intel-gfx] [PATCH v3 1/2] drm/i915/mtl: limit second scaler vertical scaling in ver >= 14

On Wed, 2022-11-23 at 12:21 +0200, Luciano Coelho wrote: > On Wed, 2022-11-23 at 11:57 +0200, Ville Syrjälä wrote: > > On Wed, Nov 23, 2022 at 09:16:42AM +, Coelho, Luciano wrote: > > > On Wed, 2022-11-23 at 08:47 +0200, Ville Syrjälä wrote: > > > > On Tue, Nov 22, 2022 at 12:23:43PM +0200, Luc

Re: [Intel-gfx] [PATCH v2 4/5] drm/i915/guc: Add GuC CT specific debug print wrappers

On 01.12.2022 01:41, John Harrison wrote: > On 11/23/2022 12:45, Michal Wajdeczko wrote: >> On 23.11.2022 02:25, John Harrison wrote: >>> On 11/22/2022 09:54, Michal Wajdeczko wrote: On 18.11.2022 02:58, john.c.harri...@intel.com wrote: > From: John Harrison > > Re-work the exi

Re: [Intel-gfx] [PATCH v2 4/5] drm/i915/guc: Add GuC CT specific debug print wrappers

On 01/12/2022 11:56, Michal Wajdeczko wrote: On 01.12.2022 01:41, John Harrison wrote: On 11/23/2022 12:45, Michal Wajdeczko wrote: On 23.11.2022 02:25, John Harrison wrote: On 11/22/2022 09:54, Michal Wajdeczko wrote: On 18.11.2022 02:58, john.c.harri...@intel.com wrote: From: John Harris

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/mtl: Initial display workarounds

== Series Details == Series: series starting with [1/2] drm/i915/mtl: Initial display workarounds URL : https://patchwork.freedesktop.org/series/111507/ State : success == Summary == CI Bug Log - changes from CI_DRM_12457_full -> Patchwork_111507v1_full

[Intel-gfx] [PATCH 3/3] drm/i915: allow running mock selftests via Kunit

The mock selftests don't require any hardware to run. They can easily run via kunit with qemu or bare metal. Add support for it. With this change, mock selftest can now run in qemu with: $ ./tools/testing/kunit/kunit.py run --arch=x86_64 \ --kunitconfig=drivers/gpu/drm/i9

[Intel-gfx] [PATCH 1/3] drm/i915: place selftest preparation on a separate function

The selftest preparation logic should also be used by KUnit. So, place it on a separate function and export it. Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH 0/3] at: https://lore.kernel.org/all/c

[Intel-gfx] [PATCH 2/3] drm/i915: export all mock selftest functions

In order to prepare for a new KUnit module that will run selftests, export all mock selftest functions to I915_SELFTEST namespace. No functional changes. Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PA

[Intel-gfx] [PATCH 0/3] Add KUnit support for i915 mock selftests

That's an updated version of my previous KUnit RFC series: https://patchwork.freedesktop.org/series/110481/ While the RFC series added support for live and perf, let's start with mock, as running tests in bare metal is not the current focus of KUnit. So, basically patch 1 was changed to ex

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add KUnit support for i915 mock selftests

== Series Details == Series: Add KUnit support for i915 mock selftests URL : https://patchwork.freedesktop.org/series/111530/ State : warning == Summary == Error: dim checkpatch failed 729ffb89e113 drm/i915: place selftest preparation on a separate function b4a91d0d11ad drm/i915: export all mo

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add KUnit support for i915 mock selftests

== Series Details == Series: Add KUnit support for i915 mock selftests URL : https://patchwork.freedesktop.org/series/111530/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

Re: [Intel-gfx] [PATCH 1/2] drm/i915/mtl: Initial display workarounds

On 30/11/2022 23:17, Matt Atwood wrote: From: Jouni Högander This patch introduces initial workarounds for mtl platform Bspec: 66624 Signed-off-by: Matt Atwood Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_fbc.c | 4 +++- drivers/gpu/drm/i915/display/intel_hdmi

[Intel-gfx] ✗ Fi.CI.BAT: failure for Add KUnit support for i915 mock selftests

== Series Details == Series: Add KUnit support for i915 mock selftests URL : https://patchwork.freedesktop.org/series/111530/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12459 -> Patchwork_111530v1 Summary --- **FA

Re: [Intel-gfx] [PATCH 2/2] drm/i915/mtl: Add initial gt workarounds

On 30/11/2022 23:17, Matt Atwood wrote: From: Matt Roper This patch introduces initial workarounds for mtl platform Bspec:66622 Signed-off-by: Matt Atwood Signed-off-by: Matt Roper --- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 4 +- .../drm/i915/gt/intel_execlists_submission.c

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/mtl: Add OAG 32 bit format support for MTL (rev2)

== Series Details == Series: drm/i915/mtl: Add OAG 32 bit format support for MTL (rev2) URL : https://patchwork.freedesktop.org/series/111512/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12457_full -> Patchwork_111512v2_full ==

[Intel-gfx] [PATCH v5 3/5] drm/i915: Introduce guard pages to i915_vma

From: Chris Wilson Introduce the concept of padding the i915_vma with guard pages before and after. The major consequence is that all ordinary uses of i915_vma must use i915_vma_offset/i915_vma_size and not i915_vma.node.start/size directly, as the drm_mm_node will include the guard pages that su

Re: [Intel-gfx] [PATCH v5 3/5] drm/i915: Introduce guard pages to i915_vma

On 01/12/2022 14:44, Andi Shyti wrote: From: Chris Wilson Introduce the concept of padding the i915_vma with guard pages before and after. The major consequence is that all ordinary uses of i915_vma must use i915_vma_offset/i915_vma_size and not i915_vma.node.start/size directly, as the drm_m

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for add guard padding around i915_vma (rev5)

== Series Details == Series: add guard padding around i915_vma (rev5) URL : https://patchwork.freedesktop.org/series/110720/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for add guard padding around i915_vma (rev5)

== Series Details == Series: add guard padding around i915_vma (rev5) URL : https://patchwork.freedesktop.org/series/110720/ State : warning == Summary == Error: dim checkpatch failed 009020c6bd1a drm/i915: Limit the display memory alignment to 32 bit instead of 64 724ab32df37d drm/i915: Wrap

Re: [Intel-gfx] [PATCH v7 20/20] drm/i915/vm_bind: Async vm_unbind support

On Thu, Dec 01, 2022 at 10:10:14AM +, Matthew Auld wrote: On 29/11/2022 23:26, Niranjana Vishwanathapura wrote: On Wed, Nov 23, 2022 at 11:42:58AM +, Matthew Auld wrote: On 16/11/2022 00:37, Niranjana Vishwanathapura wrote: On Tue, Nov 15, 2022 at 03:15:03PM -0800, Niranjana Vishwanath

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/pvc: Implement recommended caching policy

The failures below appear to be unrelated to my change which is restricted to PVC. On 12/1/22 12:59 AM, Patchwork wrote: > *Patch Details* > *Series:* drm/i915/pvc: Implement recommended caching policy > *URL:*https://patchwork.freedesktop.org/series/111491/ >

Re: [Intel-gfx] [PATCH v8 22/22] drm/i915/vm_bind: Support capture of persistent mappings

On Thu, Dec 01, 2022 at 10:49:15AM +, Matthew Auld wrote: On 29/11/2022 07:26, Niranjana Vishwanathapura wrote: Support dump capture of persistent mappings upon user request. Signed-off-by: Brian Welty Signed-off-by: Niranjana Vishwanathapura --- .../drm/i915/gem/i915_gem_vm_bind_object.

[Intel-gfx] [PATCH v4] drm: Optimise for continuous memory allocation

Currently drm-buddy does not have full knowledge of continuous memory. Lets consider scenario below. order 1:L R order 0: LL LR RL RR for order 1 allocation, it can offer L or R or LR+RL. For now, we only implement L or R case for continuous memory allocation. So t

[Intel-gfx] 回复: [PATCH v4] drm: Optimise for continuous memory allocation

[AMD Official Use Only - General] comments inline. 发件人: Koenig, Christian 发送时间: 2022年11月29日 19:32 收件人: Pan, Xinhui; amd-...@lists.freedesktop.org 抄送: dan...@ffwll.ch; matthew.a...@intel.com; dri-de...@lists.freedesktop.org; linux-ker...@vger.kernel.org;

[Intel-gfx] 回复: [PATCH v4] drm: Optimise for continuous memory allocation

[AMD Official Use Only - General] In one ROCM + gdm restart test, find_continuous_blocks() succeed with ratio 35%. the cod coverage report is below. 7723998 : if (order-- == min_order) { 773 352 : if (!(flags & DR

[Intel-gfx] [PATCH] drm/i915: use sysfs_emit() to instead of scnprintf()

From: ye xingchen Replace the open-code with sysfs_emit() to simplify the code. Signed-off-by: ye xingchen --- drivers/gpu/drm/i915/i915_mitigations.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_mitigations.c b/drivers/gpu/drm/i915/i915_mi

[Intel-gfx] 回复: 回复: [PATCH v4] drm: Optimise for continuous memory allocation

[AMD Official Use Only - General] comments line. 发件人: Koenig, Christian 发送时间: 2022年11月29日 20:07 收件人: Pan, Xinhui; amd-...@lists.freedesktop.org 抄送: dan...@ffwll.ch; matthew.a...@intel.com; dri-de...@lists.freedesktop.org; linux-ker...@vger.kernel.org; Pa

[Intel-gfx] [PATCH v5] drm: Optimise for continuous memory allocation

Currently drm-buddy does not have full knowledge of continuous memory. Adding a new member leaf_link which links all leaf blocks in asceding order. Finding continuous memory within this leaf_link is easier. Say, memory of order 3 can be combined with corresponding memory of order 3 or 2+2 or 1+2+

[Intel-gfx] [PATCH] drm/i915/uc: Fix double free bug

The "fw" pointer is freed again in the clean up code at the end of the function. Set it to NULL here to prevent a double free. Fixes: 016241168dc5 ("drm/i915/uc: use different ggtt pin offsets for uc loads") Signed-off-by: Dan Carpenter --- drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 1 + 1 file

Re: [Intel-gfx] signal: break out of wait loops on kthread_stop()

Tvrtko Ursulin writes: > On 19/10/2022 21:19, Jason A. Donenfeld wrote: >> On Wed, Oct 19, 2022 at 09:09:28PM +0100, Tvrtko Ursulin wrote: >>> Hm why is kthread_stop() after kthread_run() abuse? I don't see it in >>> kerneldoc that it must not be used for stopping threads. >> Because you don't wa

Re: [Intel-gfx] signal: break out of wait loops on kthread_stop()

"Jason A. Donenfeld" writes: > Hi Eric, > > On Mon, Nov 28, 2022 at 7:22 PM Eric W. Biederman > wrote: >> >> Tvrtko Ursulin writes: >> >> > On 19/10/2022 21:19, Jason A. Donenfeld wrote: >> >> On Wed, Oct 19, 2022 at 09:09:28PM +0100, Tvrtko Ursulin wrote: >> >>> Hm why is kthread_stop() after

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/pvc: Implement recommended caching policy

+ Sai Nandan as Lakshmi is out of the office. On 12/1/22 7:13 AM, Wayne Boyer wrote: > The failures below appear to be unrelated to my change which is > restricted to PVC. > > On 12/1/22 12:59 AM, Patchwork wrote: >> *Patch Details* >> *Series:*drm/i915/pvc: Implement recommended caching po

[Intel-gfx] ✗ Fi.CI.BAT: failure for add guard padding around i915_vma (rev5)

== Series Details == Series: add guard padding around i915_vma (rev5) URL : https://patchwork.freedesktop.org/series/110720/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12459 -> Patchwork_110720v5 Summary --- **FAI

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/pvc: Implement recommended caching policy

On Thu, Dec 01, 2022 at 07:13:37AM -0800, Wayne Boyer wrote: > The failures below appear to be unrelated to my change which is > restricted to PVC. Applied to drm-intel-gt-next. Thanks for the patch. Matt > > On 12/1/22 12:59 AM, Patchwork wrote: > > *Patch Details* > > *Series:* drm/i915/p

Re: [Intel-gfx] [PATCH] drm/i915: fix exiting context timeout calculation

On 01.12.2022 11:28, Tvrtko Ursulin wrote: On 01/12/2022 00:22, John Harrison wrote: On 11/29/2022 00:43, Tvrtko Ursulin wrote: On 28/11/2022 16:52, Andrzej Hajda wrote: In case context is exiting preempt_timeout_ms is used for timeout, but since introduction of DRM_I915_PREEMPT_TIMEOUT_COMPU

[Intel-gfx] [PULL] drm-intel-next-fixes

Hi Dave and Daniel, Here goes our next-fixes targeting 6.2-rc1. Please notice that DG2 DMC had a minor bump version in order to fix the remaining issues related to PCI warns at DC state transition. I didn't request the team to provide the fallback to the previous version because we are moving thi

[Intel-gfx] [PATCH i-g-t 1/2] lib/dmabuf_sync_file: move common stuff into lib

So we can use this across different tests. Signed-off-by: Matthew Auld Cc: Kamil Konieczny Cc: Andrzej Hajda Cc: Nirmoy Das --- lib/dmabuf_sync_file.c | 138 +++ lib/dmabuf_sync_file.h | 19 ++ lib/meson.build | 1 + tests/dmabuf_sync_fi

[Intel-gfx] [PATCH i-g-t 2/2] tests/i915/gem_exec_balancer: exercise dmabuf import

With parallel submission it should be easy to get a fence array as the output fence. Try importing this into dma-buf reservation object, to see if anything explodes. v2: (Kamil) - Use ifdef __linux__ for linux headers - Add igt_describe() for new test References: https://gitlab.freedesktop.org/

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: use sysfs_emit() to instead of scnprintf()

== Series Details == Series: drm/i915: use sysfs_emit() to instead of scnprintf() URL : https://patchwork.freedesktop.org/series/111543/ State : success == Summary == CI Bug Log - changes from CI_DRM_12459 -> Patchwork_111543v1 Summary

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/dp: wait on timeout before retry include sw delay (rev2)

== Series Details == Series: drm/i915/dp: wait on timeout before retry include sw delay (rev2) URL : https://patchwork.freedesktop.org/series/111303/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12457_full -> Patchwork_111303v2_full ===

Re: [Intel-gfx] [PATCH 2/2] drm/i915/mtl: Add initial gt workarounds

On Thu, Dec 01, 2022 at 01:15:35PM +, Tvrtko Ursulin wrote: On 30/11/2022 23:17, Matt Atwood wrote: From: Matt Roper This patch introduces initial workarounds for mtl platform Bspec:66622 Signed-off-by: Matt Atwood Signed-off-by: Matt Roper --- drivers/gpu/drm/i915/gt/intel_engine_cs

Re: [Intel-gfx] [PATCH 2/2] drm/i915/mtl: Add initial gt workarounds

On Thu, Dec 01, 2022 at 01:15:35PM +, Tvrtko Ursulin wrote: On 30/11/2022 23:17, Matt Atwood wrote: From: Matt Roper This patch introduces initial workarounds for mtl platform Bspec:66622 Signed-off-by: Matt Atwood Signed-off-by: Matt Roper --- drivers/gpu/drm/i915/gt/intel_engine_cs

Re: [Intel-gfx] [PATCH v2 1/3] drm/i915/pxp: Invalidate all PXP fw sessions during teardown

On Wed, 2022-11-30 at 17:47 -0800, Juston Li wrote: > On Mon, 2022-11-28 at 16:48 -0800, Alan Previn wrote: > > > > > > Alan:[snip] > > +#define INTEL_PXP_MAX_HWDRM_SESSIONS 16 > > This isn't need anymore, otherwise > > Reviewed-by: Juston Li > Alan: Thanks - yeah - will respin a final wit

Re: [Intel-gfx] [PATCH v8 22/22] drm/i915/vm_bind: Support capture of persistent mappings

On Thu, Dec 01, 2022 at 07:27:31AM -0800, Niranjana Vishwanathapura wrote: On Thu, Dec 01, 2022 at 10:49:15AM +, Matthew Auld wrote: On 29/11/2022 07:26, Niranjana Vishwanathapura wrote: Support dump capture of persistent mappings upon user request. Signed-off-by: Brian Welty Signed-off-b

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/mtl: Add OAG 32 bit format support for MTL (rev2)

On Thu, Dec 01, 2022 at 02:08:03PM +, Patchwork wrote: Patch Details Series: drm/i915/mtl: Add OAG 32 bit format support for MTL (rev2) URL: [1]https://patchwork.freedesktop.org/series/111512/ State: failure Details: [2]https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111512v2/in

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/psr: Add continuous full frame bit together with single (rev2)

== Series Details == Series: drm/i915/psr: Add continuous full frame bit together with single (rev2) URL : https://patchwork.freedesktop.org/series/111420/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12457_full -> Patchwork_111420v2_full =

Re: [Intel-gfx] [PATCH v5 1/1] drm/i915/pxp: Promote pxp subsystem to top-level of i915

> > > > > > Please let's avoid the ** here and everywhere. > > > > > Alan: In order to to avoid causing the entire driver into a rebuild because > > of any change in the intel_pxp structure, > > the only way to accomplish that is to use a ptr in i915. But using a ptr > > means we allocate the

Re: [Intel-gfx] [PATCH v6 1/1] drm/i915/pxp: Promote pxp subsystem to top-level of i915

On Wed, 2022-11-30 at 17:42 +, Vivi, Rodrigo wrote: > On Wed, 2022-11-30 at 09:32 -0800, Matt Roper wrote: > > On Tue, Nov 29, 2022 at 06:02:45PM -0800, Alan Previn wrote: > > > Starting with MTL, there will be two GT-tiles, a render and media > > > tile. PXP as a service for supporting workl

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm: Optimise for continuous memory allocation (rev3)

== Series Details == Series: drm: Optimise for continuous memory allocation (rev3) URL : https://patchwork.freedesktop.org/series/111542/ State : warning == Summary == Error: dim checkpatch failed 0c97871616d7 drm: Optimise for continuous memory allocation -:93: CHECK:MULTIPLE_ASSIGNMENTS: mul

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v6,1/1] drm/i915/pxp: Promote pxp subsystem to top-level of i915

On Wed, 2022-11-30 at 11:20 +, Patchwork wrote: > Patch Details > Series: series starting with [v6,1/1] drm/i915/pxp: Promote pxp subsystem to > top-level of i915 URL: > https://patchwork.freedesktop.org/series/111463/ State: failure Details: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwo

[Intel-gfx] ✓ Fi.CI.BAT: success for drm: Optimise for continuous memory allocation (rev3)

== Series Details == Series: drm: Optimise for continuous memory allocation (rev3) URL : https://patchwork.freedesktop.org/series/111542/ State : success == Summary == CI Bug Log - changes from CI_DRM_12460 -> Patchwork_111542v3 Summary ---

[Intel-gfx] [PATCH v6 3/5] drm/i915: Introduce guard pages to i915_vma

From: Chris Wilson Introduce the concept of padding the i915_vma with guard pages before and after. The major consequence is that all ordinary uses of i915_vma must use i915_vma_offset/i915_vma_size and not i915_vma.node.start/size directly, as the drm_mm_node will include the guard pages that su

Re: [Intel-gfx] [PATCH v3 5/5] drm/i915/mtl: Hold forcewake and MCR lock over PPAT setup

On Thu, Dec 01, 2022 at 02:56:30PM +0530, Balasubramani Vivekanandan wrote: > On 30.11.2022 07:58, Matt Roper wrote: > > PPAT setup involves a series of multicast writes. This can be optimized > > slightly be acquiring forcewake and the steering lock just once for the > > entire sequence. > > > >

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/uc: Fix double free bug

== Series Details == Series: drm/i915/uc: Fix double free bug URL : https://patchwork.freedesktop.org/series/111545/ State : success == Summary == CI Bug Log - changes from CI_DRM_12460 -> Patchwork_111545v1 Summary --- **SUCCESS**

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for add guard padding around i915_vma (rev6)

== Series Details == Series: add guard padding around i915_vma (rev6) URL : https://patchwork.freedesktop.org/series/110720/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.BAT: failure for add guard padding around i915_vma (rev6)

== Series Details == Series: add guard padding around i915_vma (rev6) URL : https://patchwork.freedesktop.org/series/110720/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12460 -> Patchwork_110720v6 Summary --- **FAI

Re: [Intel-gfx] [PATCH 3/6] drm/i915/gsc: GSC firmware loading

I only have one minor nits below. Rodrigo already captured other minor issues. Functionally, all LGTM so Reviewed-by: Alan Previn On Mon, 2022-11-21 at 15:16 -0800, Ceraolo Spurio, Daniele wrote: > GSC FW is loaded by submitting a dedicated command via the GSC engine. > The memory area used for

Re: [Intel-gfx] [PATCH 0/2] drm/i915: Remove frontbuffer tracking from gem.

Hi I was given a link to https://patchwork.freedesktop.org/series/111494/ but can't seem to find it on the mailing list, so I'll reply here. On Thu, 2022-08-25 at 08:46 +0200, Maarten Lankhorst wrote: > Frontbuffer tracking in gem is used in old drivers, but nowadays everyone > calls dirtyfb expl

Re: [Intel-gfx] [PATCH 1/2] drm/i915/mtl: Initial display workarounds

On Thu, Dec 01, 2022 at 12:51:33PM +, Tvrtko Ursulin wrote: > > On 30/11/2022 23:17, Matt Atwood wrote: > > From: Jouni Högander > > > > This patch introduces initial workarounds for mtl platform > > > > Bspec: 66624 > > > > Signed-off-by: Matt Atwood > > Signed-off-by: Jouni Högander >

[Intel-gfx] [PATCH] drm/i915/gen12: Apply recommended L3 hashing mask

The TGL/RKL/DG1/ADL performance tuning guide suggests programming a literal value of 0x2FC0100F for this register. The register's hardware default value is 0x2FC0108F, so this translates to just clearing one bit. Take this opportunity to also clean up the register definition and re-write its exis

Re: [Intel-gfx] [PATCH 4/6] drm/i915/gsc: Do a driver-FLR on unload if GSC was loaded

Few nits - most of which are repeats from existing review comments. I did have 1 feedback. Functionally, code logic is correct. To speed things up, I'll provide a conditional R-b if you address the feedback below + fix the the BIT3->to-BIT4 uncore- flags fix. Others are nits in my book:  (conditi

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gen12: Apply recommended L3 hashing mask

== Series Details == Series: drm/i915/gen12: Apply recommended L3 hashing mask URL : https://patchwork.freedesktop.org/series/111562/ State : warning == Summary == Error: dim checkpatch failed 11dd4a184a14 drm/i915/gen12: Apply recommended L3 hashing mask -:46: WARNING:BRACES: braces {} are no

Re: [Intel-gfx] [PATCH 4/6] drm/i915/gsc: Do a driver-FLR on unload if GSC was loaded

On 12/1/2022 2:40 PM, Teres Alexis, Alan Previn wrote: Few nits - most of which are repeats from existing review comments. I did have 1 feedback. Functionally, code logic is correct. To speed things up, I'll provide a conditional R-b if you address the feedback below + fix the the BIT3->to-B

Re: [Intel-gfx] [PATCH 1/2] drm/i915/mtl: Initial display workarounds

On Wed, Nov 30, 2022 at 03:17:08PM -0800, Matt Atwood wrote: > From: Jouni Högander > > This patch introduces initial workarounds for mtl platform > > Bspec: 66624 > > Signed-off-by: Matt Atwood > Signed-off-by: Jouni Högander > --- > drivers/gpu/drm/i915/display/intel_fbc.c | 4 +++- > dr

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gen12: Apply recommended L3 hashing mask

== Series Details == Series: drm/i915/gen12: Apply recommended L3 hashing mask URL : https://patchwork.freedesktop.org/series/111562/ State : success == Summary == CI Bug Log - changes from CI_DRM_12461 -> Patchwork_111562v1 Summary ---

Re: [Intel-gfx] [PATCH 2/2] drm/i915/mtl: Add initial gt workarounds

On Thu, Dec 01, 2022 at 09:23:07AM -0800, Lucas De Marchi wrote: > On Thu, Dec 01, 2022 at 01:15:35PM +, Tvrtko Ursulin wrote: > > > > On 30/11/2022 23:17, Matt Atwood wrote: > > > From: Matt Roper > > > > > > This patch introduces initial workarounds for mtl platform > > > > > > Bspec:6662

Re: [Intel-gfx] [PATCH 1/2] drm/i915/mtl: Initial display workarounds

On Thu, Dec 01, 2022 at 03:01:05PM -0800, Matt Roper wrote: On Wed, Nov 30, 2022 at 03:17:08PM -0800, Matt Atwood wrote: From: Jouni Högander This patch introduces initial workarounds for mtl platform Bspec: 66624 Signed-off-by: Matt Atwood Signed-off-by: Jouni Högander --- drivers/gpu/dr

Re: [Intel-gfx] [PATCH 1/2] drm/i915/mtl: Initial display workarounds

On Thu, Dec 01, 2022 at 03:27:25PM -0800, Lucas De Marchi wrote: > On Thu, Dec 01, 2022 at 03:01:05PM -0800, Matt Roper wrote: > > On Wed, Nov 30, 2022 at 03:17:08PM -0800, Matt Atwood wrote: > > > From: Jouni Högander > > > > > > This patch introduces initial workarounds for mtl platform > > >

Re: [Intel-gfx] [PATCH v5 1/1] drm/i915/pxp: Promote pxp subsystem to top-level of i915

> > struct intel_pxp { > > + /** @i915: back poiner to i915*/ > > + struct drm_i915_private *i915; > > do you really need this pointer back here? > or using a container_of should be enough? I realize i can drop the i915 backptr as i can use pxp->ctrl_gt->i915.

Re: [Intel-gfx] [PATCH v6 1/1] drm/i915/pxp: Promote pxp subsystem to top-level of i915

On Tue, 2022-11-29 at 18:02 -0800, Teres Alexis, Alan Previn wrote: Alan: [snip] > + newpxp->ctrl_gt = pxp_get_ctrl_gt(newpxp->i915); > + > + if (!newpxp->ctrl_gt) > + return -ENODEV; > > /* >* If HuC is loaded by GSC but PXP is disabled, we can skip the init o

Re: [Intel-gfx] [PATCH v6 1/1] drm/i915/pxp: Promote pxp subsystem to top-level of i915

i just realized nothing external to PXP is calling HAS_PXP so I'll probably drop this macro and create a helper for pxp_debugfs (the only caller). ...alan On Thu, 2022-12-01 at 23:55 +, Teres Alexis, Alan Previn wrote: > > On Tue, 2022-11-29 at 18:02 -0800, Teres Alexis, Alan Previn wrote: >

[Intel-gfx] [PATCH v7 1/1] drm/i915/pxp: Promote pxp subsystem to top-level of i915

Starting with MTL, there will be two GT-tiles, a render and media tile. PXP as a service for supporting workloads with protected contexts and protected buffers can be subscribed by process workloads on any tile. However, depending on the platform, only one of the tiles is used for control events pe

Re: [Intel-gfx] [PATCH 1/2] drm/i915/mtl: Initial display workarounds

On Thu, Dec 01, 2022 at 03:44:07PM -0800, Matt Roper wrote: On Thu, Dec 01, 2022 at 03:27:25PM -0800, Lucas De Marchi wrote: On Thu, Dec 01, 2022 at 03:01:05PM -0800, Matt Roper wrote: > On Wed, Nov 30, 2022 at 03:17:08PM -0800, Matt Atwood wrote: > > From: Jouni Högander > > > > This patch int

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v7,1/1] drm/i915/pxp: Promote pxp subsystem to top-level of i915

== Series Details == Series: series starting with [v7,1/1] drm/i915/pxp: Promote pxp subsystem to top-level of i915 URL : https://patchwork.freedesktop.org/series/111569/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v7,1/1] drm/i915/pxp: Promote pxp subsystem to top-level of i915

== Series Details == Series: series starting with [v7,1/1] drm/i915/pxp: Promote pxp subsystem to top-level of i915 URL : https://patchwork.freedesktop.org/series/111569/ State : success == Summary == CI Bug Log - changes from CI_DRM_12461 -> Patchwork_111569v1 ===

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/pvc: Implement recommended caching policy

== Series Details == Series: drm/i915/pvc: Implement recommended caching policy URL : https://patchwork.freedesktop.org/series/111491/ State : success == Summary == CI Bug Log - changes from CI_DRM_12456_full -> Patchwork_111491v1_full Summ

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/pvc: Implement recommended caching policy

Hi, I have re-reported the issue. https://patchwork.freedesktop.org/series/111491/ Thanks, Y Sai Nandan -Original Message- From: Boyer, Wayne Sent: Thursday, December 1, 2022 9:31 PM To: intel-gfx@lists.freedesktop.org Cc: Vudum, Lakshminarayana ; Yedireswarapu, SaiX Nandan Subject:

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: use sysfs_emit() to instead of scnprintf()

== Series Details == Series: drm/i915: use sysfs_emit() to instead of scnprintf() URL : https://patchwork.freedesktop.org/series/111543/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12459_full -> Patchwork_111543v1_full Su