Currently we have only DSC support for DP SST.
Stanislav Lisovskiy (2):
drm: Add missing DP DSC extended capability definitions.
drm/i915: Add DSC support to MST path
drivers/gpu/drm/i915/display/intel_dp.c | 76 +-
drivers/gpu/drm/i915/display/intel_dp.h | 17 +++
drivers/
Adding DP DSC register definitions, we might need for further
DSC implementation, supporting MST and DP branch pass-through mode.
v2: - Fixed checkpatch comment warning
v3: - Removed function which is not yet used(Jani Nikula)
Signed-off-by: Stanislav Lisovskiy
---
include/drm/display/drm_dp.h
Whenever we are not able to get enough timeslots
for required PBN, let's try to allocate those
using DSC, just same way as we do for SST.
v2: Removed intel_dp_mst_dsc_compute_config and refactored
intel_dp_dsc_compute_config to support timeslots as a
parameter(Ville Syrjälä)
v3: - Rebased
Hi Stan,
Please find my comments inline
On Mon, 2022-04-11 at 19:25 +0300, Stanislav Lisovskiy wrote:
> Whenever we are not able to get enough timeslots
> for required PBN, let's try to allocate those
> using DSC, just same way as we do for SST.
>
> v2: Removed intel_dp_mst_dsc_compute_config a
On Thu, 04 Aug 2022, Suraj Kandpal wrote:
> Adding support for writeback transcoder to start capturing frames using
> interrupt mechanism
Basically this changes the assumption that all drm_connectors in i915
are embedded within intel_connectors. That needs to be a separate prep
patch, actually se
On Wed, Aug 10, 2022 at 11:25:13AM +0300, Govindapillai, Vinod wrote:
> Hi Stan,
>
> Please find my comments inline
>
>
> On Mon, 2022-04-11 at 19:25 +0300, Stanislav Lisovskiy wrote:
> > Whenever we are not able to get enough timeslots
> > for required PBN, let's try to allocate those
> > using
Dne 22. 06. 22 v 13:18 Zdenek Kabelac napsal(a):
Hello
While somewhat oldish hw (T61, 4G, C2D) - I've now witnessed new crash with
Xorg:
(happened while reopening iconified Firefox window - running 'standard'
rawhide -nodebug kernel 5.19.0-0.rc2.21.fc37.x86_64)
Hello
Ok, I think I now
On Wed, 10 Aug 2022, "Murthy, Arun R" wrote:
>> -Original Message-
>> From: Intel-gfx On Behalf Of Jani
>> Nikula
>> Sent: Thursday, August 4, 2022 3:29 PM
>> To: intel-gfx@lists.freedesktop.org
>> Cc: Nikula, Jani
>> Subject: [Intel-gfx] [PATCH 2/2] drm/i915/hdcp: replace BIT() with REG
On Fri, 05 Aug 2022, "Piorkowski, Piotr" wrote:
> From: Piotr Piórkowski
>
> For proper operation of i915 we need usable PCI GTTMMADDR BAR 0
> (1 for GEN2). In most cases we also need usable PCI GFXMEM BAR 2.
> Let's add functions to check if BARs are set, and that it have
> a size greater than 0
Hi Dave and Daniel,
here's the weekly PR for drm-misc-next-fixes.
Best regards
Thomas
drm-misc-next-fixes-2022-08-10:
Short summary of fixes pull:
* gem: Annotate WW context in error paths
* shmem-helper: Add missing vunmap in error paths
The following changes since commit 6f2c8d5f16594a13295
On 05.08.2022 17:59, Piorkowski, Piotr wrote:
From: Piotr Piórkowski
At the moment, when we refer to some PCI BAR we use the number of
this BAR in the code. The meaning of BARs between different platforms
may be different. Therefore, in order to organize the code,
let's start using defined name
On Wed, 27 Jul 2022, Radhakrishna Sripada
wrote:
> From: Matt Roper
>
> Going forward, the hardware teams no longer consider new platforms to
> have a "generation" in the way we've defined it for past platforms.
> Instead, each IP block (graphics, media, display) will have their own
> architectu
On Tue, 02 Aug 2022, Matt Roper wrote:
> On Wed, Jul 27, 2022 at 06:34:10PM -0700, Radhakrishna Sripada wrote:
>> Since Xe LPD+, Memory latency data are in LATENCY_LPX_LPY registers
>> instead of GT driver mailbox.
>>
>> Bspec: 64608
>>
>> Cc: Matt Roper
>> Original Author: Caz Yokoyama
>> Sign
On Wed, 10 Aug 2022, Jani Nikula wrote:
> On Tue, 02 Aug 2022, Matt Roper wrote:
>> On Wed, Jul 27, 2022 at 06:34:10PM -0700, Radhakrishna Sripada wrote:
>>> Since Xe LPD+, Memory latency data are in LATENCY_LPX_LPY registers
>>> instead of GT driver mailbox.
>>>
>>> Bspec: 64608
>>>
>>> Cc: Ma
On Wed, 27 Jul 2022, Radhakrishna Sripada
wrote:
> From Meteorlake, Latency Level, SAGV bloack time are read from
> LATENCY_SAGV register instead of the GT driver pcode mailbox. DDR type
> and QGV information are also tob read from Mem SS registers.
>
> Bspec: 49324, 64636
>
> Cc: Matt Roper
> O
On Wed, 27 Jul 2022, Radhakrishna Sripada
wrote:
> From: Madhumitha Tolakanahalli Pradeep
>
>
> In Display version 14, Transcoder Chicken Registers are moved from DPRZ to
> DRPOS
> to reduce register signal crossings for Unit Interface Optimization.
>
> This patch modifies the CHICKEN_TRANS ma
Am 25.07.22 um 17:18 schrieb Dmitry Osipenko:
This patch moves the non-dynamic dma-buf users over to the dynamic
locking specification. The strict locking convention prevents deadlock
situation for dma-buf importers and exporters.
Previously the "unlocked" versions of the dma-buf API functions w
On Wed, 10 Aug 2022, Andrzej Hajda wrote:
> On 05.08.2022 17:59, Piorkowski, Piotr wrote:
>> +/* PCI BARs */
>> +#define GTTMMADR_BAR0
>> +#define GEN2_GTTMMADR_BAR 1
>> +#define GFXMEM_BAR 2
>> +#define GTT_APERTURE_BAR
On Wed, Aug 10, 2022 at 06:48:24AM +0300, Murthy, Arun R wrote:
> [...]
> > diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c
> > b/drivers/gpu/drm/i915/display/intel_dmc.c
> > index 00e18a4a5a5a4..6c35212c36256 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dmc.c
> > +++ b/drivers/gpu/drm
v2 of https://patchwork.freedesktop.org/series/105358/
Move any device info that gets modified runtime into runtime info,
making device info a const pointer. Finally throw mkwrite_device_info()
into the curb.
The data size increases by sizeof(struct intel_runtime_info) for each
struct intel_devic
We'll be moving info between static and runtime info. Combine the
printing functions into one to keep the output sensible and (mostly)
unchanged in the process.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_debugfs.c | 3 +--
drivers/gpu/drm/i915/i915_driver.c | 4 ++--
d
Add initial runtime info that we can copy to runtime info at i915
creation time. This lets us define the initial values for runtime info
statically while making it possible to change them runtime. This will be
the new home for the current "const" device info members that are
modified runtime anyway
If it's modified runtime, it's runtime info.
Signed-off-by: Jani Nikula
---
.../gpu/drm/i915/gem/selftests/huge_pages.c | 4 +--
drivers/gpu/drm/i915/gt/intel_ppgtt.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/i915_pci.c | 36 +++
If it's modified runtime, it's runtime info.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/gem/i915_gem_pages.c | 2 +-
.../gpu/drm/i915/gem/selftests/huge_pages.c| 14 +++---
drivers/gpu/drm/i915/i915_drv.h| 2 +-
drivers/gpu/drm/i915/i915_gem.c
If it's modified runtime, it's runtime info.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_fbc.c | 6 ++---
.../drm/i915/display/skl_universal_plane.c| 2 +-
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/i915_pci.c | 22 +
If it's modified runtime, it's runtime info.
mock_gem_device() is the only one that modifies them. If that could be
fixed, we wouldn't have to do this.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.h| 6 +++---
drivers/gpu/drm/i915/i915_pci.c| 18
If it's modified runtime, it's runtime info.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.h | 4 +-
drivers/gpu/drm/i915/i915_drv.h | 6 +-
drivers/gpu/drm/i915/i915_pci.c | 66 ++--
drivers/gpu/drm/i915/intel_device_info.c
This is the last blocker in making device info a pointer to const
data. Hopefully resetting pipe_mask to 0 and thus ensuring HAS_DISPLAY()
is false is enough, and we don't go ahead and do something with the
display info regardless. Fingers crossed.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/
If it's modified runtime, it's runtime info.
Curiously, the flag was never initialized statically.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/gt/intel_sseu.c | 5 ++---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/intel_device_info.c | 2 ++
drivers/gpu/drm
If it's modified runtime, it's runtime info.
mock_gem_device() is the only one that modifies it. If that could be
fixed, we wouldn't have to do this.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/i915_pci.c | 6 +++-
If it's modified runtime, it's runtime info.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_vdsc.c | 2 +-
drivers/gpu/drm/i915/i915_pci.c | 4 ++--
drivers/gpu/drm/i915/intel_device_info.c | 3 ++-
drivers/gpu/drm/i915/intel_device_info.h | 2 +-
4 files changed,
If it's modified runtime, it's runtime info.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_hdcp.c | 4 ++--
drivers/gpu/drm/i915/i915_pci.c | 6 +++---
drivers/gpu/drm/i915/intel_device_info.c | 4 +++-
drivers/gpu/drm/i915/intel_device_info.h | 3 ++-
4 files cha
Now that the device info is no longer modified runtime, we don't need to
make a copy of it, and we can convert i915->__info into a pointer to
static const data. Also remove mkwrite_device_info().
This does increase the text size slightly.
Signed-off-by: Jani Nikula
---
An alternative is to kee
If it's modified runtime, it's runtime info.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/i915_pci.c | 6 +++---
drivers/gpu/drm/i915/intel_device_info.c | 3 ++-
drivers/gpu/drm/i915/intel_device_info.h | 2 +-
4 files changed, 7
If it's modified runtime, it's runtime info.
mock_gem_device() is the only one that modifies it. If that could be
fixed, we wouldn't have to do this.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +-
drivers/gpu/drm/i915/i915_pci.c | 58
On Wed, 10 Aug 2022, Jani Nikula wrote:
> On Wed, 27 Jul 2022, Radhakrishna Sripada
> wrote:
>> From: Matt Roper
>>
>> Going forward, the hardware teams no longer consider new platforms to
>> have a "generation" in the way we've defined it for past platforms.
>> Instead, each IP block (graphics
On 8/3/2022 7:45 PM, Jani Nikula wrote:
On Tue, 26 Jul 2022, Ankit Nautiyal wrote:
The low voltage sku check can be ignored as OEMs need to consider that
when designing the board and then put any limits in VBT.
Due to this check many DP sink that can be run with higher link rate,
are run at
On 8/2/2022 8:19 PM, Jani Nikula wrote:
On Fri, 22 Jul 2022, Ankit Nautiyal wrote:
DSC capabilities are given in bytes 11-13 of VSDB (i.e. bytes 8-10 of
SCDS). Since minimum length of Data block is 7, all bytes greater than 7
must be read only after checking the length of the data block.
Thi
Wa_22012718247 : When Display PHY is configured in continuous
DCC calibration mode, the DCC (duty cycle correction) for the clock
erroneously goes through a state where the DCC code is 0x00 when it is
supposed to be transitioning from 0x10 to 0x0F. This glitch causes a
distortion in the clock, whic
Platforms with greater system memory will need to relocate more entries.
It may lead to soft hangs.
Adding cond_resched() for rescheduling process to avoid timeouts.
Suggested-by: Chris Wilson
Signed-off-by: S A Muqthyar Ahmed
---
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 18 +++
== Series Details ==
Series: Add DP MST DSC support to i915 (rev5)
URL : https://patchwork.freedesktop.org/series/101492/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+./drivers/gpu/drm/amd/amdgpu/../am
== Series Details ==
Series: Add DP MST DSC support to i915 (rev5)
URL : https://patchwork.freedesktop.org/series/101492/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11981 -> Patchwork_101492v5
Summary
---
**SUCCES
On Wed, Aug 10, 2022 at 08:55:32AM -0700, Hugh Dickins wrote:
> This is not a bug in zram or i915, but what Matthew fixes in
> https://lore.kernel.org/lkml/20220730042518.1264767-1-wi...@infradead.org/
Thanks for tracking that down, Hugh. Nice to know it's a crash rather
than a data corruption.
== Series Details ==
Series: drm/i915: stop modifying "const" device info (rev2)
URL : https://patchwork.freedesktop.org/series/105358/
State : warning
== Summary ==
Error: dim checkpatch failed
8b6f98985b8e drm/i915: combine device info printing into one
9a6f5a0b06ee drm/i915: add initial run
== Series Details ==
Series: drm/i915: stop modifying "const" device info (rev2)
URL : https://patchwork.freedesktop.org/series/105358/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: stop modifying "const" device info (rev2)
URL : https://patchwork.freedesktop.org/series/105358/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11981 -> Patchwork_105358v2
Summary
-
Acked-by: Alex Deucher
On Mon, Aug 1, 2022 at 10:08 AM Simon Ser wrote:
>
> Acked-by: Simon Ser
>
> CC amd-gfx
>
> On Monday, August 1st, 2022 at 15:52, Imre Deak wrote:
>
> > The API change introduced in
> >
> > commit 30c637151cfa ("drm/plane-helper: Export individual helpers")
> >
> > was m
On Tue, 12 Jul 2022 at 12:28, Christian König
wrote:
>
> This reverts commit 8f61973718485f3e89bc4f408f929048b7b47c83.
>
> It turned out that this is not correct. Especially the sync_file info
> IOCTL needs to see even signaled fences to correctly report back their
> status to userspace.
>
> Inste
== Series Details ==
Series: drm/i915/combo_phy: Add Workaround to avoid flicker with HBR3 eDP
Panels (rev2)
URL : https://patchwork.freedesktop.org/series/106967/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11981 -> Patchwork_106967v2
==
Am 10.08.22 um 18:54 schrieb Daniel Vetter:
On Tue, 12 Jul 2022 at 12:28, Christian König
wrote:
This reverts commit 8f61973718485f3e89bc4f408f929048b7b47c83.
It turned out that this is not correct. Especially the sync_file info
IOCTL needs to see even signaled fences to correctly report back
On Wed, Aug 10, 2022 at 07:01:55PM +0200, Christian König wrote:
> Am 10.08.22 um 18:54 schrieb Daniel Vetter:
> > On Tue, 12 Jul 2022 at 12:28, Christian König
> > wrote:
> > > This reverts commit 8f61973718485f3e89bc4f408f929048b7b47c83.
> > >
> > > It turned out that this is not correct. Espec
== Series Details ==
Series: drm/i915/gem: reschedule relocations to avoid timeouts
URL : https://patchwork.freedesktop.org/series/107125/
State : warning
== Summary ==
Error: dim checkpatch failed
56c7eae199db drm/i915/gem: reschedule relocations to avoid timeouts
-:23: ERROR:SPACING: space r
== Series Details ==
Series: drm/i915/gem: reschedule relocations to avoid timeouts
URL : https://patchwork.freedesktop.org/series/107125/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11981 -> Patchwork_107125v1
Summary
--
Btw, what's the plan for this? Figured I'd ask since I noticed this on the ML,
nd I'm now finishing up getting the atomic only MST patches I've been working
on merged :)
On Wed, 2022-08-10 at 11:17 +0300, Stanislav Lisovskiy wrote:
> Currently we have only DSC support for DP SST.
>
> Stanislav Li
== Series Details ==
Series: drm/display/dp_mst: Drop Radeon MST support, make MST atomic-only (rev3)
URL : https://patchwork.freedesktop.org/series/107073/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11981 -> Patchwork_107073v3
==
On Wed, 10 Aug 2022 17:09:37 +0100 Matthew Wilcox wrote:
> On Wed, Aug 10, 2022 at 08:55:32AM -0700, Hugh Dickins wrote:
> > This is not a bug in zram or i915, but what Matthew fixes in
> > https://lore.kernel.org/lkml/20220730042518.1264767-1-wi...@infradead.org/
>
> Thanks for tracking that do
Prior to the commit below the GAMT_CHKN_BIT_REG address was setup for
devices matching (D_KBL | D_CFL), where intel_gvt_get_device_type()
returns D_CFL for either Coffee Lake or Comet Lake. Include the missed
platform.`
Link:
https://lore.kernel.org/all/20220808142711.02d16782.alex.william...@re
== Series Details ==
Series: i915/gvt: Fix Comet Lake
URL : https://patchwork.freedesktop.org/series/107133/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11981 -> Patchwork_107133v1
Summary
---
**SUCCESS**
No reg
On 2022.08.10 15:55:48 -0600, Alex Williamson wrote:
> Prior to the commit below the GAMT_CHKN_BIT_REG address was setup for
> devices matching (D_KBL | D_CFL), where intel_gvt_get_device_type()
> returns D_CFL for either Coffee Lake or Comet Lake. Include the missed
> platform.`
>
> Link:
> htt
== Series Details ==
Series: Add DP MST DSC support to i915 (rev5)
URL : https://patchwork.freedesktop.org/series/101492/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11981_full -> Patchwork_101492v5_full
Summary
---
Reviewed-by: Arun R Murthy
> -Original Message-
> From: Deak, Imre
> Sent: Wednesday, August 10, 2022 6:05 PM
> To: Murthy, Arun R
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/d13: Fix unclaimed accesses while
> loading PIPEDMC-C/D
>
> On Wed, Aug
== Series Details ==
Series: drm/i915: stop modifying "const" device info (rev2)
URL : https://patchwork.freedesktop.org/series/105358/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11981_full -> Patchwork_105358v2_full
Sum
Fix issues in HFVSDB parsing for DSC support.
Also minor refactoring in Logging.
Split from original patch into a new series.
https://patchwork.freedesktop.org/patch/495193/
Ankit Nautiyal (4):
drm/edid: Fix minimum bpc supported with DSC1.2 for HDMI sink
drm/edid: Split DSC parsing into sepa
DSC capabilities are given in bytes 11-13 of VSDB (i.e. bytes 8-10 of
SCDS). Since minimum length of Data block is 7, all bytes greater than 7
must be read only after checking the length of the data block.
This patch adds check for data block length before reading relavant DSC
bytes.
Signed-off-b
Replace multiple log lines with a single log line at the end of
parsing HF-VSDB. Also use drm_dbg_kms instead of DRM_DBG_KMS, and
add log for DSC1.2 support.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/drm_edid.c | 21 +
1 file changed, 13 insertions(+), 8 deletions(-)
Move the DSC parsing logic into separate function.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/drm_edid.c | 128 -
1 file changed, 69 insertions(+), 59 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index cdf10279e1bd.
HF-VSDB/SCDB has bits to advertise support for 16, 12 and 10 bpc.
If none of the bits are set, the minimum bpc supported with DSC is 8.
This patch corrects the min bpc supported to be 8, instead of 0.
Fixes: 76ee7b905678 ("drm/edid: Parse DSC1.2 cap fields from HFVSDB block")
Cc: Ankit Nautiyal
Platforms with greater system memory will need to relocate more entries.
It may lead to soft hangs.
Adding cond_resched() for rescheduling process to avoid timeouts.
Suggested-by: Chris Wilson
Signed-off-by: S A Muqthyar Ahmed
---
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 18 +++
== Series Details ==
Series: drm/i915/combo_phy: Add Workaround to avoid flicker with HBR3 eDP
Panels (rev2)
URL : https://patchwork.freedesktop.org/series/106967/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11981_full -> Patchwork_106967v2_full
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