[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Attach and Set vrr_enabled property (rev2)

== Series Details == Series: Attach and Set vrr_enabled property (rev2) URL : https://patchwork.freedesktop.org/series/102978/ State : warning == Summary == Error: dim checkpatch failed 74f8ea70155d drm/vrr: Attach vrr_enabled property to the drm crtc -:90: CHECK:PARENTHESIS_ALIGNMENT: Alignme

[Intel-gfx] ✗ Fi.CI.BAT: failure for Attach and Set vrr_enabled property (rev2)

== Series Details == Series: Attach and Set vrr_enabled property (rev2) URL : https://patchwork.freedesktop.org/series/102978/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11548 -> Patchwork_102978v2 Summary --- **F

[Intel-gfx] [PATCH v2 00/14] GSC support for XeHP SDV and DG2 platforms

Add GSC support for XeHP SDV and DG2 platforms. The series includes changes for the mei driver: - add ability to use polling instead of interrupts - add ability to use extended timeouts - setup extended operational memory for GSC The series includes changes for the i915 driver: - allocate extende

[Intel-gfx] [PATCH v2 01/14] HAX: drm/i915: force INTEL_MEI_GSC on for CI

From: Daniele Ceraolo Spurio After the new config option is merged we'll enable it by default in the CI config, but for now just force it on via the i915 Kconfig so we can get pre-merge CI results for it. Signed-off-by: Daniele Ceraolo Spurio --- drivers/gpu/drm/i915/Kconfig.debug | 1 + 1 fil

[Intel-gfx] [PATCH v2 02/14] drm/i915/gsc: skip irq initialization if using polling

From: Vitaly Lubart Some platforms require the host to poll on the GSC registers instead of relaying on the interrupts. For those platforms, irq initialization should be skipped Signed-off-by: Vitaly Lubart Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin Reviewed-by: Daniele Cer

[Intel-gfx] [PATCH v2 03/14] drm/i915/gsc: add slow_fw flag to the mei auxiliary device

Add slow_fw flag to the mei auxiliary device info to inform the mei driver about slow underlying firmware. Such firmware will require to use larger operation timeouts. Signed-off-by: Alexander Usyskin Signed-off-by: Tomas Winkler Reviewed-by: Daniele Ceraolo Spurio --- include/linux/mei_aux.h

[Intel-gfx] [PATCH v2 04/14] drm/i915/gsc: add slow_fw flag to the gsc device definition

Add slow_fw flag to the gsc device definition and pass it to mei auxiliary device. Signed-off-by: Alexander Usyskin Reviewed-by: Daniele Ceraolo Spurio --- drivers/gpu/drm/i915/gt/intel_gsc.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_gsc.c b/drivers/gp

[Intel-gfx] [PATCH v2 05/14] drm/i915/gsc: add GSC XeHP SDV platform definition

Define GSC on XeHP SDV (Intel(R) dGPU without display) XeHP SDV uses the same hardware settings as DG1, but uses polling instead of interrupts and runs the firmware in slow pace due to hardware limitations. Signed-off-by: Vitaly Lubart Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usysk

[Intel-gfx] [PATCH v2 07/14] mei: gsc: wait for reset thread on stop

Wait for reset work to complete before initiating stop reset flow sequence. Signed-off-by: Alexander Usyskin Signed-off-by: Tomas Winkler --- drivers/misc/mei/init.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/misc/mei/init.c b/drivers/misc/mei/init.c index eb052005ca86..5bb6b

[Intel-gfx] [PATCH v2 06/14] mei: gsc: use polling instead of interrupts

From: Tomas Winkler A work-around for a HW issue in XEHPSDV that manifests itself when SW reads a gsc register when gsc is sending an interrupt. The work-around is to disable interrupts and to use polling instead. Cc: James Ausmus Signed-off-by: Vitaly Lubart Signed-off-by: Tomas Winkler ---

[Intel-gfx] [PATCH v2 08/14] mei: extend timeouts on slow devices.

Parametrize operational timeouts in order to support slow firmware on some graphic devices. Signed-off-by: Alexander Usyskin Signed-off-by: Tomas Winkler --- drivers/misc/mei/bus-fixup.c | 3 +-- drivers/misc/mei/client.c| 14 +++--- drivers/misc/mei/gsc-me.c| 2 +- drivers/mi

[Intel-gfx] [PATCH v2 09/14] mei: bus: export common mkhi definitions into a separate header

From: Vitaly Lubart Exported common mkhi definitions from bus-fixup.c into a separate header file mkhi.h for other driver usage. Signed-off-by: Vitaly Lubart Signed-off-by: Tomas Winkler --- drivers/misc/mei/bus-fixup.c | 32 ++--- drivers/misc/mei/mkhi.h | 45 +++

[Intel-gfx] [PATCH v2 11/14] mei: gsc: setup gsc extended operational memory

From: Tomas Winkler 1. Retrieve extended operational memory physical pointers from the auxiliary device info. 2. Setup memory registers. 3. Notify firmware that the memory is ready by sending the memory ready command. 4. Disable PXP device if GSC is not in PXP mode. CC: Daniele Ceraolo Spu

[Intel-gfx] [PATCH v2 10/14] mei: mkhi: add memory ready command

From: Tomas Winkler Add GSC memory ready command. The command indicates to the firmware that extend operation memory was setup and the firmware may enter PXP mode. CC: Daniele Ceraolo Spurio Signed-off-by: Tomas Winkler --- drivers/misc/mei/mkhi.h | 14 +- 1 file changed, 13 inser

[Intel-gfx] [PATCH v2 12/14] mei: gsc: add transition to PXP mode in resume flow

From: Vitaly Lubart Added transition to PXP mode in resume flow. CC: Daniele Ceraolo Spurio Signed-off-by: Vitaly Lubart Signed-off-by: Tomas Winkler --- drivers/misc/mei/gsc-me.c | 11 +++ 1 file changed, 11 insertions(+) diff --git a/drivers/misc/mei/gsc-me.c b/drivers/misc/mei/gs

[Intel-gfx] [PATCH v2 13/14] mei: debugfs: add pxp mode to devstate in debugfs

From: Tomas Winkler CC: Vitaly Lubart Signed-off-by: Tomas Winkler --- drivers/misc/mei/debugfs.c | 17 + 1 file changed, 17 insertions(+) diff --git a/drivers/misc/mei/debugfs.c b/drivers/misc/mei/debugfs.c index 1ce61e9e24fc..4074fec866a6 100644 --- a/drivers/misc/mei/debugf

[Intel-gfx] [PATCH v2 14/14] drm/i915/gsc: allocate extended operational memory in LMEM

From: Tomas Winkler GSC requires more operational memory than available on chip. Reserve 4M of LMEM for GSC operation. The memory is provided to the GSC as struct resource to the auxiliary data of the child device. Signed-off-by: Tomas Winkler Signed-off-by: Daniele Ceraolo Spurio Cc: Alan Pre

Re: [Intel-gfx] [PATCH 5/8] drm/i915/gt: Add media RP0/RPn to per-gt sysfs

Hi Ashutosh, On 2022-04-13 at 11:11:06 -0700, Ashutosh Dixit wrote: > Retrieve RP0 and RPn freq for media IP from PCODE and display in per-gt > sysfs. This patch adds the following files to gt/gtN sysfs: > * media_RP0_freq_mhz > * media_RPn_freq_mhz - ^ Can we keep it in lowercase ? So it

Re: [Intel-gfx] [PATCH 1/2] drm/i915/xehp: Add compute engine ABI

On 22/04/2022 20:50, Matt Roper wrote: We're now ready to start exposing compute engines to userspace. While we're at it, let's extend the kerneldoc description for the other engine types as well. Cc: Daniele Ceraolo Spurio Cc: Tvrtko Ursulin Cc: Vinay Belgaumkar Cc: Jordan Justen Cc: Szy

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for GSC support for XeHP SDV and DG2 platforms (rev2)

== Series Details == Series: GSC support for XeHP SDV and DG2 platforms (rev2) URL : https://patchwork.freedesktop.org/series/102339/ State : warning == Summary == Error: dim checkpatch failed 9eb52a6face3 HAX: drm/i915: force INTEL_MEI_GSC on for CI bcb3f3e0f0e6 drm/i915/gsc: skip irq initial

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for GSC support for XeHP SDV and DG2 platforms (rev2)

== Series Details == Series: GSC support for XeHP SDV and DG2 platforms (rev2) URL : https://patchwork.freedesktop.org/series/102339/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.BAT: failure for GSC support for XeHP SDV and DG2 platforms (rev2)

== Series Details == Series: GSC support for XeHP SDV and DG2 platforms (rev2) URL : https://patchwork.freedesktop.org/series/102339/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11550 -> Patchwork_102339v2 Summary ---

Re: [Intel-gfx] [PULL v3] gvt-next

On Thu, 21 Apr 2022, "Wang, Zhi A" wrote: > Hi folks: > > Here is the PR of gvt-next. Thanks so much for the patience. Thanks, pulled to drm-intel-next, applied the below fix for the silent conflict on top, and pushed out. Should show up in linux-next shortly. BR, Jani. > > Mostly it includes t

Re: [Intel-gfx] [PATCH 1/1] drm/i915: Inherit submitter nice when scheduling requests

On 08/04/2022 16:10, Daniel Vetter wrote: On Fri, 8 Apr 2022 at 12:29, Tvrtko Ursulin wrote: On 08/04/2022 10:50, Dave Airlie wrote: On Fri, 8 Apr 2022 at 18:25, Tvrtko Ursulin wrote: On 08/04/2022 08:58, Daniel Vetter wrote: On Thu, Apr 07, 2022 at 04:16:27PM +0100, Tvrtko Ursulin wr

Re: [Intel-gfx] [PATCH 2/3] drm/i915/display: Replace crtc_state's has_drrs by drrs_downclock_mode

On Thu, 21 Apr 2022, José Roberto de Souza wrote: > Will be adding some additional control options to DRRS that will > require to have the DRRS downclock mode stored in the crtc_state. > > So to optimize memory usage a bit here using it to replace has_drrs > as we can check if the drrs_downclock_m

[Intel-gfx] [PATCH v2 0/4] lrc selftest fixes

Few bug fixes for lrc selftest. Resending the reviewed patches for CI feedback. Chris Wilson (4): drm/i915/gt: Explicitly clear BB_OFFSET for new contexts drm/i915/selftests: Check for incomplete LRI from the context image drm/i915/selftest: Always cancel semaphore on error drm/i915/selft

[Intel-gfx] [PATCH v2 2/4] drm/i915/selftests: Check for incomplete LRI from the context image

From: Chris Wilson In order to keep the context image parser simple, we assume that all commands follow a similar format. A few, especially not MI commands on the render engines, have fixed lengths not encoded in a length field. This caused us to incorrectly skip over 3D state commands, and start

[Intel-gfx] [PATCH v2 3/4] drm/i915/selftest: Always cancel semaphore on error

From: Chris Wilson Ensure that we always signal the semaphore when timing out, so that if it happens to be stuck waiting for the semaphore we will quickly recover without having to wait for a reset. Reported-by: CQ Tang Signed-off-by: Chris Wilson Cc: CQ Tang cc: Joonas Lahtinen Signed-off-b

[Intel-gfx] [PATCH v2 1/4] drm/i915/gt: Explicitly clear BB_OFFSET for new contexts

From: Chris Wilson Even though the initial protocontext we load onto HW has the register cleared, by the time we save it into the default image, BB_OFFSET has had the enable bit set. Reclear BB_OFFSET for each new context. Testcase: igt/i915_selftests/gt_lrc Signed-off-by: Chris Wilson Cc: Mik

[Intel-gfx] [PATCH v2 4/4] drm/i915/selftest: Clear the output buffers before GPU writes

From: Chris Wilson When testing whether we can get the GPU to leak information about non-privileged state, we first need to ensure that the output buffer is set to a known value as the HW may opt to skip the write into memory for a non-privileged read of a sensitive register. We chose POISON_INUS

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Fix SEL_FETCH_PLANE_*(PIPE_B+) register addresses

On Fri, Apr 22, 2022 at 06:48:50PM +, Patchwork wrote: > == Series Details == > > Series: drm/i915: Fix SEL_FETCH_PLANE_*(PIPE_B+) register addresses > URL : https://patchwork.freedesktop.org/series/102941/ > State : failure Patch is pushed, thanks for the review. The failures are unrelated

Re: [Intel-gfx] [PULL v3] gvt-next

On Mon, 25 Apr 2022, Jani Nikula wrote: > On Thu, 21 Apr 2022, "Wang, Zhi A" wrote: >> Hi folks: >> >> Here is the PR of gvt-next. Thanks so much for the patience. > > Thanks, pulled to drm-intel-next, applied the below fix for the silent > conflict on top, and pushed out. Should show up in linux

Re: [Intel-gfx] [PULL v3] gvt-next

On 4/25/22 12:33 PM, Jani Nikula wrote: > On Mon, 25 Apr 2022, Jani Nikula wrote: >> On Thu, 21 Apr 2022, "Wang, Zhi A" wrote: >>> Hi folks: >>> >>> Here is the PR of gvt-next. Thanks so much for the patience. >> >> Thanks, pulled to drm-intel-next, applied the below fix for the silent >> conflic

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for lrc selftest fixes (rev4)

== Series Details == Series: lrc selftest fixes (rev4) URL : https://patchwork.freedesktop.org/series/101353/ State : warning == Summary == Error: dim checkpatch failed 9ad1d0f63dda drm/i915/gt: Explicitly clear BB_OFFSET for new contexts 14f50dc6662f drm/i915/selftests: Check for incomplete L

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for lrc selftest fixes (rev4)

== Series Details == Series: lrc selftest fixes (rev4) URL : https://patchwork.freedesktop.org/series/101353/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. - +drivers/gpu/drm/i915/gt/intel_engine_stats.h:2

Re: [Intel-gfx] [PATCH 03/15] dma-buf & drm/amdgpu: remove dma_resv workaround

Am 20.04.22 um 21:28 schrieb Zack Rusin: [SNIP] To figure out what it is could you try the following code fragment: diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_validation.c b/drivers/gpu/drm/vmwgfx/vmwgfx_validation.c index f46891012be3..a36f89d3f36d 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_va

Re: [Intel-gfx] [PATCH 3/9] vfio/mdev: Pass in a struct vfio_device * to vfio_pin/unpin_pages()

On 4/12/22 11:53 AM, Jason Gunthorpe wrote: Every caller has a readily available vfio_device pointer, use that instead of passing in a generic struct device. The struct vfio_device already contains the group we need so this avoids complexity, extra refcountings, and a confusing lifecycle model

Re: [Intel-gfx] [PATCH 1/9] vfio: Make vfio_(un)register_notifier accept a vfio_device

On 4/12/22 11:53 AM, Jason Gunthorpe wrote: All callers have a struct vfio_device trivially available, pass it in directly and avoid calling the expensive vfio_group_get_from_dev(). To support the unconverted kvmgt mdev driver add mdev_legacy_get_vfio_device() which will return the vfio_devic

[Intel-gfx] [PATCH v3 2/2] drm/msm/dp: Implement oob_hotplug_event()

The Qualcomm DisplayPort driver contains traces of the necessary plumbing to hook up USB HPD, in the form of the dp_hpd module and the dp_usbpd_cb struct. Use this as basis for implementing the oob_hotplug_event() callback, by amending the dp_hpd module with the missing logic. Overall the solution

Re: [Intel-gfx] [PATCH 03/15] dma-buf & drm/amdgpu: remove dma_resv workaround

Am 20.04.22 um 20:49 schrieb Christian König: Am 20.04.22 um 20:41 schrieb Zack Rusin: On Wed, 2022-04-20 at 19:40 +0200, Christian König wrote: Am 20.04.22 um 19:38 schrieb Zack Rusin: On Wed, 2022-04-20 at 09:37 +0200, Christian König wrote: ⚠ External Email Hi Zack, Am 20.04.22 um 05:56

Re: [Intel-gfx] [PATCH 1/9] vfio: Make vfio_(un)register_notifier accept a vfio_device

On Tue, 2022-04-12 at 12:53 -0300, Jason Gunthorpe wrote: > All callers have a struct vfio_device trivially available, pass it in > directly and avoid calling the expensive vfio_group_get_from_dev(). > > To support the unconverted kvmgt mdev driver add > mdev_legacy_get_vfio_device() which will re

[Intel-gfx] [PATCH v3 1/2] drm: Add HPD state to drm_connector_oob_hotplug_event()

In some implementations, such as the Qualcomm platforms, the display driver has no way to query the current HPD state and as such it's impossible to distinguish between disconnect and attention events. Add a parameter to drm_connector_oob_hotplug_event() to pass the HPD state. Also push the test

Re: [Intel-gfx] [PATCH 0/1] add support for enum module parameters

+ linux-wireless, netdev Jani Nikula writes: > On Thu, 14 Apr 2022, Greg Kroah-Hartman wrote: >> On Thu, Apr 14, 2022 at 03:30:32PM +0300, Jani Nikula wrote: >>> Hey, I've sent this before, ages ago, but haven't really followed >>> through with it. I still think it would be useful for many scen

Re: [Intel-gfx] [PATCH 0/1] add support for enum module parameters

On 4/19/22 10:13 PM, Kalle Valo wrote: + linux-wireless, netdev Jani Nikula writes: On Thu, 14 Apr 2022, Greg Kroah-Hartman wrote: On Thu, Apr 14, 2022 at 03:30:32PM +0300, Jani Nikula wrote: Hey, I've sent this before, ages ago, but haven't really followed through with it. I still think i

Re: [Intel-gfx] [PATCH 9/9] vfio: Remove calls to vfio_group_add_container_user()

On 4/12/22 11:53 AM, Jason Gunthorpe wrote: When the open_device() op is called the container_users is incremented and held incremented until close_device(). Thus, so long as drivers call functions within their open_device()/close_device() region they do not need to worry about the container_user

Re: [Intel-gfx] [PATCH 0/1] add support for enum module parameters

On Wed, 20 Apr 2022 08:13:47 +0300 Kalle Valo wrote: > Wireless drivers would also desperately need to pass device specific > parameters at (or before) probe time. And not only debug parameters but > also configuration parameters, for example firmware memory allocations > schemes (optimise for feat

Re: [Intel-gfx] [PATCH 1/9] vfio: Make vfio_(un)register_notifier accept a vfio_device

On 4/18/22 11:44 AM, Jason Gunthorpe wrote: On Mon, Apr 18, 2022 at 11:28:30AM -0400, Tony Krowiak wrote: diff --git a/drivers/vfio/vfio.c b/drivers/vfio/vfio.c index a4555014bd1e72..8a5c46aa2bef61 100644 +++ b/drivers/vfio/vfio.c @@ -2484,19 +2484,15 @@ static int vfio_unregister_group_notif

Re: [Intel-gfx] [PATCH 2/9] vfio/ccw: Remove mdev from struct channel_program

On Tue, 2022-04-12 at 12:53 -0300, Jason Gunthorpe wrote: > The next patch wants the vfio_device instead. There is no reason to > store > a pointer here since we can container_of back to the vfio_device. > > Signed-off-by: Jason Gunthorpe > --- > drivers/s390/cio/vfio_ccw_cp.c | 44

Re: [Intel-gfx] [PATCH v3 2/2] drm/msm/dp: Implement oob_hotplug_event()

On Fri 22 Apr 16:07 PDT 2022, Dmitry Baryshkov wrote: > On 23/04/2022 01:32, Bjorn Andersson wrote: [..] > > diff --git a/drivers/gpu/drm/msm/dp/dp_drm.c > > b/drivers/gpu/drm/msm/dp/dp_drm.c > > index 80f59cf99089..76904b1601b1 100644 > > --- a/drivers/gpu/drm/msm/dp/dp_drm.c > > +++ b/drivers/gp

Re: [Intel-gfx] [PATCH 03/15] dma-buf & drm/amdgpu: remove dma_resv workaround

Am 20.04.22 um 19:38 schrieb Zack Rusin: On Wed, 2022-04-20 at 09:37 +0200, Christian König wrote: ⚠ External Email Hi Zack, Am 20.04.22 um 05:56 schrieb Zack Rusin: On Thu, 2022-04-07 at 10:59 +0200, Christian König wrote: Rework the internals of the dma_resv object to allow adding more tha

Re: [Intel-gfx] [PATCH 3/9] vfio/mdev: Pass in a struct vfio_device * to vfio_pin/unpin_pages()

On 4/12/22 11:53, Jason Gunthorpe wrote: Every caller has a readily available vfio_device pointer, use that instead of passing in a generic struct device. The struct vfio_device already contains the group we need so this avoids complexity, extra refcountings, and a confusing lifecycle model. ...

Re: [Intel-gfx] [PATCH v5 09/10] arm64: dts: qcom: sc7180: Add support for HDCP in dp-controller

On Mon 11 Apr 13:47 PDT 2022, Sean Paul wrote: > From: Sean Paul > > This patch adds the register ranges required for HDCP key injection and > HDCP TrustZone interaction as described in the dt-bindings for the > sc7180 dp controller. Can you please mention why this is only done for trogdor and

Re: [Intel-gfx] [PATCH 1/9] vfio: Make vfio_(un)register_notifier accept a vfio_device

On 4/12/22 11:53, Jason Gunthorpe wrote: All callers have a struct vfio_device trivially available, pass it in directly and avoid calling the expensive vfio_group_get_from_dev(). To support the unconverted kvmgt mdev driver add mdev_legacy_get_vfio_device() which will return the vfio_device poin

Re: [Intel-gfx] [PATCH 3/9] vfio/mdev: Pass in a struct vfio_device * to vfio_pin/unpin_pages()

On Tue, 2022-04-12 at 12:53 -0300, Jason Gunthorpe wrote: > Every caller has a readily available vfio_device pointer, use that > instead > of passing in a generic struct device. The struct vfio_device already > contains the group we need so this avoids complexity, extra > refcountings, > and a conf

[Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [01/15] dma-buf: add enum dma_resv_usage v4 (rev2)

== Series Details == Series: series starting with [01/15] dma-buf: add enum dma_resv_usage v4 (rev2) URL : https://patchwork.freedesktop.org/series/102340/ State : failure == Summary == Error: patch https://patchwork.freedesktop.org/api/1.0/series/102340/revisions/2/mbox/ not applied Applyin

[Intel-gfx] ✗ Fi.CI.BAT: failure for lrc selftest fixes (rev4)

== Series Details == Series: lrc selftest fixes (rev4) URL : https://patchwork.freedesktop.org/series/101353/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11550 -> Patchwork_101353v4 Summary --- **FAILURE** Serio

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/2] drm: Add HPD state to drm_connector_oob_hotplug_event()

== Series Details == Series: series starting with [v3,1/2] drm: Add HPD state to drm_connector_oob_hotplug_event() URL : https://patchwork.freedesktop.org/series/103078/ State : warning == Summary == Error: dim checkpatch failed f2ad7f841168 drm: Add HPD state to drm_connector_oob_hotplug_eve

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v3,1/2] drm: Add HPD state to drm_connector_oob_hotplug_event()

== Series Details == Series: series starting with [v3,1/2] drm: Add HPD state to drm_connector_oob_hotplug_event() URL : https://patchwork.freedesktop.org/series/103078/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v3,1/2] drm: Add HPD state to drm_connector_oob_hotplug_event()

== Series Details == Series: series starting with [v3,1/2] drm: Add HPD state to drm_connector_oob_hotplug_event() URL : https://patchwork.freedesktop.org/series/103078/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11550 -> Patchwork_103078v1

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/3] drm: Add infrastructure to allow seamless mode switches (rev2)

== Series Details == Series: series starting with [1/3] drm: Add infrastructure to allow seamless mode switches (rev2) URL : https://patchwork.freedesktop.org/series/102958/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be chec

Re: [Intel-gfx] [PATCH 1/2] drm/i915/xehp: Add compute engine ABI

Hi Matt, On Fri, Apr 22, 2022 at 12:50:06PM -0700, Matt Roper wrote: > We're now ready to start exposing compute engines to userspace. > > While we're at it, let's extend the kerneldoc description for the other > engine types as well. I would make two different patches. The kerneldoc description

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Xe_HP SDV and DG2 have up to 4 CCS engines

On Fri, Apr 22, 2022 at 12:50:07PM -0700, Matt Roper wrote: > From: Daniele Ceraolo Spurio > > Cc: Vinay Belgaumkar > Signed-off-by: Daniele Ceraolo Spurio > Signed-off-by: Matt Roper > Reviewed-by: Matt Roper Reviewed-by: Andi Shyti Andi

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/3] drm: Add infrastructure to allow seamless mode switches (rev2)

== Series Details == Series: series starting with [1/3] drm: Add infrastructure to allow seamless mode switches (rev2) URL : https://patchwork.freedesktop.org/series/102958/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11550 -> Patchwork_102958v2

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Fix SEL_FETCH_PLANE_*(PIPE_B+) register addresses

== Series Details == Series: drm/i915: Fix SEL_FETCH_PLANE_*(PIPE_B+) register addresses URL : https://patchwork.freedesktop.org/series/102941/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11537_full -> Patchwork_102941v1_full =

[Intel-gfx] [PATCH 1/3] drm/i915/xehpsdv/dg1/tgl: Fix issue with LRI relative addressing

From: Akeem G Abodunrin When bit 19 of MI_LOAD_REGISTER_IMM instruction opcode is set on tgl+ devices, HW does not care about certain register address offsets, but instead check the following for valid address ranges on specific engines: RCS && CCS: BITS(0 - 10) BCS: BITS(0 - 11)

[Intel-gfx] [PATCH 0/3] Handle predicate programming

Userspace can leave SET_PREDICATE_RESULT active at the end of their batch, causing all the kernel operations from the ring to be noop'ed. This includes workarounds for memory corruption on dg2, as well as the usual synchronisation, arbitration, coherency and signaling. The latter can be used to cau

[Intel-gfx] [PATCH 2/3] drm/i915/selftests: Skip poisoning SET_PREDICATE_RESULT on dg2

From: Chris Wilson When predication is enabled all commands baring a few (such as MI_BB_END) are nop'ed. If we accidentally enable predication while poisoning the context, not only is the rest of the poisoning skipped (thus disabling the test), but the closing instructions of the poison request a

[Intel-gfx] [PATCH 3/3] drm/i915/gt: Clear SET_PREDICATE_RESULT prior to executing the ring

From: Chris Wilson Userspace may leave predication enabled upon return from the batch buffer, which has the consequent of preventing all operation from the ring from being executed, including all the synchronisation, coherency control, arbitration and user signaling. This is more than just a loca

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Fix SEL_FETCH_PLANE_*(PIPE_B+) register addresses

I see bat results went through successfully. But on shards, there is a boot failure from ICL, where I am unable to load the result page(html). Lakshmi. -Original Message- From: Deak, Imre Sent: Friday, April 22, 2022 2:39 AM To: intel-gfx@lists.freedesktop.org; Vudum, Lakshminarayana

[Intel-gfx] [PATCH] drm/i915: remove superfluous string helper include

Remove the duplicate and incorrect (uses "" instead of <>) linux/string_helpers.h include. Fixes: cc1338f259a2 ("drm/i915/xehp: Update topology dumps for Xe_HP") Cc: Matt Roper Cc: Lucas De Marchi Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/gt/intel_sseu.c | 2 -- 1 file changed, 2 del

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/4] drm/i915: consider min_page_size when migrating

== Series Details == Series: series starting with [CI,1/4] drm/i915: consider min_page_size when migrating URL : https://patchwork.freedesktop.org/series/102879/ State : success == Summary == CI Bug Log - changes from CI_DRM_11528_full -> Patchwork_102879v1_full ==

[Intel-gfx] [PATCH v2 0/4] Flat-CCS eviction enhancements

Flat-CCS eviction enhancements v2: Correcting the memory residency requirement for flat-ccs capability [Thomas] Ramalingam C (4): drm/i915/gt: GEM_BUG_ON unexpected NULL at scatterlist walking drm/i915/gt: optimize the ccs_sz calculation per chunk drm/i915/gt: Document the eviction of t

[Intel-gfx] [PATCH v2 2/4] drm/i915/gt: optimize the ccs_sz calculation per chunk

Calculate the ccs_sz that needs to be emitted based on the src and dst pages emitted per chunk. And handle the return value of emit_pte for the ccs pages. Signed-off-by: Ramalingam C --- drivers/gpu/drm/i915/gt/intel_migrate.c | 36 + 1 file changed, 12 insertions(+), 24

[Intel-gfx] [PATCH v2 3/4] drm/i915/gt: Document the eviction of the Flat-CCS objects

Capture the eviction details for Flat-CCS capable, lmem objects. v2: Fix the Flat-ccs capbility of lmem obj with smem residency possibility [Thomas] Signed-off-by: Ramalingam C cc: Thomas Hellstrom cc: Matthew Auld --- drivers/gpu/drm/i915/gt/intel_migrate.c | 23 ++-

[Intel-gfx] [PATCH v2 1/4] drm/i915/gt: GEM_BUG_ON unexpected NULL at scatterlist walking

While locating the start of ccs scatterlist in smem scatterlist, that has to be the size of lmem obj size + corresponding ccs data size. Report bug if scatterlist terminate before that length. Signed-off-by: Ramalingam C --- drivers/gpu/drm/i915/gt/intel_migrate.c | 6 ++ 1 file changed, 6 i

[Intel-gfx] [PATCH v2 4/4] uapi/drm/i915: Document memory residency and Flat-CCS capability of obj

Capture the impact of memory region preference list of an object, on their memory residency and Flat-CCS capability of the objects. v2: Fix the Flat-CCS capability of an obj with {lmem, smem} preference list [Thomas] Signed-off-by: Ramalingam C cc: Matthew Auld cc: Thomas Hellstrom --- in

[Intel-gfx] ✗ Fi.CI.BAT: failure for Handle predicate programming

== Series Details == Series: Handle predicate programming URL : https://patchwork.freedesktop.org/series/103084/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11550 -> Patchwork_103084v1 Summary --- **FAILURE** Se

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Flat-CCS eviction enhancements (rev3)

== Series Details == Series: Flat-CCS eviction enhancements (rev3) URL : https://patchwork.freedesktop.org/series/102916/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: remove superfluous string helper include

== Series Details == Series: drm/i915: remove superfluous string helper include URL : https://patchwork.freedesktop.org/series/103086/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11550 -> Patchwork_103086v1 Summary --

Re: [Intel-gfx] [PATCH 1/2] drm/i915/xehp: Add compute engine ABI

On Mon, Apr 25, 2022 at 11:41:36AM +0100, Tvrtko Ursulin wrote: > > On 22/04/2022 20:50, Matt Roper wrote: > > We're now ready to start exposing compute engines to userspace. > > > > While we're at it, let's extend the kerneldoc description for the other > > engine types as well. > > > > Cc: Dan

[Intel-gfx] ✗ Fi.CI.BAT: failure for Flat-CCS eviction enhancements (rev3)

== Series Details == Series: Flat-CCS eviction enhancements (rev3) URL : https://patchwork.freedesktop.org/series/102916/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11550 -> Patchwork_102916v3 Summary --- **FAILUR

Re: [Intel-gfx] [PATCH] drm/i915/dmc: Add MMIO range restrictions

On Wed, Apr 06, 2022 at 08:53:56PM +, Anusha Srivatsa wrote: -Original Message- From: De Marchi, Lucas Sent: Wednesday, April 6, 2022 10:46 AM To: Srivatsa, Anusha Cc: intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH] drm/i915/dmc: Add MMIO range restrictions On W

Re: [Intel-gfx] [PATCH 1/2] drm/i915/xehp: Add compute engine ABI

>> > --- a/drivers/gpu/drm/i915/gt/intel_gt.c >> > +++ b/drivers/gpu/drm/i915/gt/intel_gt.c >> > @@ -1175,6 +1175,7 @@ void intel_gt_invalidate_tlbs(struct intel_gt *gt) >> >[VIDEO_DECODE_CLASS]= GEN12_VD_TLB_INV_CR, >> >[VIDEO_ENHANCEMENT_CLASS] = GEN12_VE

Re: [Intel-gfx] [PATCH] drm/i915: remove superfluous string helper include

On Mon, Apr 25, 2022 at 06:47:54PM +0300, Jani Nikula wrote: > Remove the duplicate and incorrect (uses "" instead of <>) > linux/string_helpers.h include. > > Fixes: cc1338f259a2 ("drm/i915/xehp: Update topology dumps for Xe_HP") > Cc: Matt Roper > Cc: Lucas De Marchi > Signed-off-by: Jani Niku

[Intel-gfx] [PATCH v2 2/3] drm/i915: Add first set of DG2 PCI IDs

The IDs added here are the subset reserved for 'motherboard down' designs of DG2. We have all the necessary support upstream to enable these now (although they'll continue to require force_probe until the usual requirements are met). The remaining DG2 IDs for add-in cards will come in a future pa

[Intel-gfx] [PATCH v2 0/3] i915: Upstream initial DG2 PCI IDs

We've had all of our DG2 and ATS-M PCI IDs in the topic/core-for-CI branch for a while, but we've now got the critical uapi changes in place to unblock upstreaming the initial subset (which correspond to "motherboard down" designs) through the drm-intel tree. The remaining IDs (which correspond to

[Intel-gfx] [PATCH v2 3/3] topic/core-for-CI: Add remaining DG2 and ATS-M device IDs

The device IDs here are associated with DG2 add-in cards. We need to wait for some additional functionality (e.g., small BAR recovery) to land before we're ready to truly upstream these via drm-intel; for now we'll just add them to the core-for-CI branch for CI coverage. Cc: Lucas De Marchi Sign

[Intel-gfx] [PATCH v2 1/3] topic/core-for-CI: Revert DG2 and ATS-M device IDs

Some of the IDs here are ready to formally upstream via drm-intel. We'll rebase these out of the topic/core-for-CI branch (but they're sent here as a revert to avoid confusing CI). - 92b805135ed2 ("drm/i915: Add DG2 PCI IDs") - bca8f652e1a0 ("topic/core-for-CI: Add ATS-M PCI IDs") Cc: Lucas De M

Re: [Intel-gfx] False-positive of CI issue w/ AMDGPU patch set

I am not sure if I can take any action here. @Latvala, Petri Any inputs? Lakshmi. From: Zhang, Dingchen (David) Sent: Monday, April 25, 2022 1:16 PM To: Vudum, Lakshminarayana Cc: Siqueira, Rodrigo ; Pillai, Aurabindo Subject: False-positive of CI issue w/ AMD

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915: Upstream initial DG2 PCI IDs

== Series Details == Series: i915: Upstream initial DG2 PCI IDs URL : https://patchwork.freedesktop.org/series/103098/ State : warning == Summary == Error: dim checkpatch failed 54fcf40b14d7 topic/core-for-CI: Revert DG2 and ATS-M device IDs -:9: ERROR:GIT_COMMIT_ID: Please use git commit desc

[Intel-gfx] ✗ Fi.CI.BAT: failure for i915: Upstream initial DG2 PCI IDs

== Series Details == Series: i915: Upstream initial DG2 PCI IDs URL : https://patchwork.freedesktop.org/series/103098/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11550 -> Patchwork_103098v1 Summary --- **FAILURE**

[Intel-gfx] [PATCH] drm/i915/gvt: Add missing symbol export.

When CONFIG_DRM_I915_DEBUG_RUNTIME and CONFIG_DRM_I915_DEBUG_PM are enabled, two more extra symols in i915 are required to be exported. Cc: Jani Nikula Signed-off-by: Zhi Wang --- drivers/gpu/drm/i915/intel_gvt.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_g

Re: [Intel-gfx] [PATCH] drm/i915/gvt: Add missing symbol export.

On 4/25/22 10:03 PM, Zhi Wang wrote: > When CONFIG_DRM_I915_DEBUG_RUNTIME and CONFIG_DRM_I915_DEBUG_PM > are enabled, two more extra symols in i915 are required to be > exported. > > Cc: Jani Nikula > Signed-off-by: Zhi Wang > --- > drivers/gpu/drm/i915/intel_gvt.c | 2 ++ > 1 file changed, 2 i

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/gvt: Add missing symbol export.

== Series Details == Series: drm/i915/gvt: Add missing symbol export. URL : https://patchwork.freedesktop.org/series/103101/ State : failure == Summary == Error: patch https://patchwork.freedesktop.org/api/1.0/series/103101/revisions/1/mbox/ not applied Applying: drm/i915/gvt: Add missing sy

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for i915: Upstream initial DG2 PCI IDs

On Mon, Apr 25, 2022 at 09:58:43PM +, Patchwork wrote: > == Series Details == > > Series: i915: Upstream initial DG2 PCI IDs > URL : https://patchwork.freedesktop.org/series/103098/ > State : failure > > == Summary == > > CI Bug Log - changes from CI_DRM_11550 -> Patchwork_103098v1 > =

[Intel-gfx] ✓ Fi.CI.BAT: success for i915: Upstream initial DG2 PCI IDs

== Series Details == Series: i915: Upstream initial DG2 PCI IDs URL : https://patchwork.freedesktop.org/series/103098/ State : success == Summary == CI Bug Log - changes from CI_DRM_11550 -> Patchwork_103098v1 Summary --- **SUCCESS**

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for i915: Upstream initial DG2 PCI IDs

Filed https://gitlab.freedesktop.org/drm/intel/-/issues/5827 igt@gem_exec_suspend@basic-s0@smem - incomplete - pstore logs - BUG: kernel NULL pointer dereference, address: 0008, RIP: 0010:aq_ring_rx_fill Lakshmi. -Original Message- From: Roper, Matthew D Sent: Monday, April

[Intel-gfx] ✗ Fi.CI.IGT: failure for i915: Upstream initial DG2 PCI IDs

== Series Details == Series: i915: Upstream initial DG2 PCI IDs URL : https://patchwork.freedesktop.org/series/103098/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11550_full -> Patchwork_103098v1_full Summary --- *

[Intel-gfx] [PATCH 1/2] drm/i915: Introduce has_media_ratio_mode

Media ratio mode (the ability for media IP to work at a different frequency from the GT) is available for a subset of dGfx platforms supporting GuC/SLPC. Introduce 'has_media_ratio_mode' flag in intel_device_info to identify these platforms and set it for XEHPSDV and DG2/ATS-M. Cc: Rodrigo Vivi S

[Intel-gfx] [PATCH 2/2] drm/i915/gt: Add media freq factor to per-gt sysfs

Expose new sysfs to program and retrieve media freq factor. Factor values of 0 (dynamic), 0.5 and 1.0 are supported via a u8.8 fixed point representation (corresponding to integer values of 0, 128 and 256 respectively). Media freq factor is converted to media_ratio_mode for GuC. It is programmed i

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