[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Fix i915 error_state_read ptr use (rev2)

== Series Details == Series: Fix i915 error_state_read ptr use (rev2) URL : https://patchwork.freedesktop.org/series/100768/ State : warning == Summary == $ dim checkpatch origin/drm-tip 729b7794c19d drm/i915/reset: Fix error_state_read ptr + offset use -:18: WARNING:COMMIT_LOG_LONG_LINE: Poss

[Intel-gfx] ✓ Fi.CI.BAT: success for Fix i915 error_state_read ptr use (rev2)

== Series Details == Series: Fix i915 error_state_read ptr use (rev2) URL : https://patchwork.freedesktop.org/series/100768/ State : success == Summary == CI Bug Log - changes from CI_DRM_11291 -> Patchwork_22425 Summary --- **SUCCES

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: avoid concurrent writes to aux_inv (rev2)

== Series Details == Series: drm/i915: avoid concurrent writes to aux_inv (rev2) URL : https://patchwork.freedesktop.org/series/100772/ State : warning == Summary == $ dim checkpatch origin/drm-tip f070e684b15e drm/i915: avoid concurrent writes to aux_inv -:6: WARNING:COMMIT_LOG_LONG_LINE: Pos

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: avoid concurrent writes to aux_inv (rev2)

== Series Details == Series: drm/i915: avoid concurrent writes to aux_inv (rev2) URL : https://patchwork.freedesktop.org/series/100772/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: avoid concurrent writes to aux_inv (rev2)

== Series Details == Series: drm/i915: avoid concurrent writes to aux_inv (rev2) URL : https://patchwork.freedesktop.org/series/100772/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11291 -> Patchwork_22426 Summary ---

Re: [Intel-gfx] [PATCH v6 01/13] drm/i915/guc: Update GuC ADS size for error capture lists

your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Alan-Previn/Add-GuC-Error-Capture-Support/20220226-1

Re: [Intel-gfx] [PATCH v6 01/13] drm/i915/guc: Update GuC ADS size for error capture lists

your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Alan-Previn/Add-GuC-Error-Capture-Support/20220226-1

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/psr: Set "SF Partial Frame Enable" also on full update (rev5)

== Series Details == Series: drm/i915/psr: Set "SF Partial Frame Enable" also on full update (rev5) URL : https://patchwork.freedesktop.org/series/100633/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separa

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/psr: Set "SF Partial Frame Enable" also on full update (rev5)

== Series Details == Series: drm/i915/psr: Set "SF Partial Frame Enable" also on full update (rev5) URL : https://patchwork.freedesktop.org/series/100633/ State : success == Summary == CI Bug Log - changes from CI_DRM_11291 -> Patchwork_22427 ===

[Intel-gfx] [PATCH v7 00/13] Add GuC Error Capture Support

This series: 1. Enables support of GuC to report error-state-capture using a list of MMIO registers the driver registers and GuC will dump, log and notify right before a GuC triggered engine-reset event. 2. Updates the ADS blob creation to register said lists of global, engi

[Intel-gfx] [PATCH v7 03/13] drm/i915/guc: Add XE_LP steered register lists support

Add the ability for runtime allocation and freeing of steered register list extentions that depend on the detected HW config fuses. Signed-off-by: Alan Previn --- drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h | 9 + .../gpu/drm/i915/gt/uc/intel_guc_capture.c| 175 -- 2 file

[Intel-gfx] [PATCH v7 06/13] drm/i915/guc: Add GuC's error state capture output structures.

Add GuC's error capture output structures and definitions as how they would appear in GuC log buffer's error capture subregion after an error state capture G2H event notification. Signed-off-by: Alan Previn Reviewed-by: Matthew Brost --- drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h | 47 ++

[Intel-gfx] [PATCH v7 05/13] drm/i915/guc: Add Gen9 registers for GuC error state capture.

Abstract out a Gen9 register list as the default for all other platforms we don't yet formally support GuC submission on. Signed-off-by: Alan Previn Reviewed-by: Umesh Nerlige Ramappa --- .../gpu/drm/i915/gt/uc/intel_guc_capture.c| 82 +-- 1 file changed, 59 insertions(+), 2

[Intel-gfx] [PATCH v7 07/13] drm/i915/guc: Update GuC-log relay function names

For the sake of better code readibility, change previous relay logging function names with "capture_logs" to "copy_debug_logs" to differentiate from error capture functions that will use a different region of the same buffer. Signed-off-by: Alan Previn --- drivers/gpu/drm/i915/gt/uc/intel_guc_lo

[Intel-gfx] [PATCH v7 08/13] drm/i915/guc: Add capture region into intel_guc_log

GuC log buffer regions for debug-log-events, crash-dumps and error-state-capture are all part of a single bo allocation that also includes the guc_log_buffer_state structures. Now that we support it, increase the size allocation for error-capture. Since the error-capture region is accessed at non-

[Intel-gfx] [PATCH v7 01/13] drm/i915/guc: Update GuC ADS size for error capture lists

Update GuC ADS size allocation to include space for the lists of error state capture register descriptors. Also, populate the lists of registers we want GuC to report back to Host on engine reset events. This list should include global, engine-class and engine-instance registers for every engine-c

[Intel-gfx] [PATCH v7 04/13] drm/i915/guc: Add DG2 registers for GuC error state capture.

Add additional DG2 registers for GuC error state capture. Signed-off-by: Alan Previn --- .../gpu/drm/i915/gt/uc/intel_guc_capture.c| 80 ++- 1 file changed, 78 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c b/drivers/gpu/drm/i915/g

[Intel-gfx] [PATCH v7 13/13] drm/i915/guc: Print the GuC error capture output register list.

Print the GuC captured error state register list (string names and values) when gpu_coredump_state printout is invoked via the i915 debugfs for flushing the gpu error-state that was captured prior. Since GuC could have reported multiple engine register dumps in a single notification event, parse t

[Intel-gfx] [PATCH v7 02/13] drm/i915/guc: Add XE_LP static registers for GuC error capture.

Add device specific tables and register lists to cover different engines class types for GuC error state capture for XE_LP products. Signed-off-by: Alan Previn --- .../gpu/drm/i915/gt/uc/intel_guc_capture.c| 116 ++ drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 4 +- 2 fi

[Intel-gfx] [PATCH v7 09/13] drm/i915/guc: Check sizing of guc_capture output

Add intel_guc_capture_output_min_size_est function to provide a reasonable minimum size for error-capture region before allocating the shared buffer. Signed-off-by: Alan Previn --- .../gpu/drm/i915/gt/uc/intel_guc_capture.c| 47 +++ .../gpu/drm/i915/gt/uc/intel_guc_capture.h

[Intel-gfx] [PATCH v7 10/13] drm/i915/guc: Extract GuC error capture lists on G2H notification.

- Upon the G2H Notify-Err-Capture event, parse through the GuC Log Buffer (error-capture-subregion) and generate one or more capture-nodes. A single node represents a single "engine- instance-capture-dump" and contains at least 3 register lists: global, engine-class and engine-instance. An

[Intel-gfx] [PATCH v7 11/13] drm/i915/guc: Pre-allocate output nodes for extraction

In the rare but possible scenario where we are in the midst of multiple GuC error-capture (and engine reset) events and the user also triggers a forced full GT reset or the internal watchdog triggers the same, intel_guc_submission_reset_prepare's call to flush_work(&guc->ct.requests.worker) can cau

[Intel-gfx] [PATCH v7 12/13] drm/i915/guc: Plumb GuC-capture into gpu_coredump

Add a flags parameter through all of the coredump creation functions. Add a bitmask flag to indicate if the top level gpu_coredump event is triggered in response to a GuC context reset notification. Using that flag, ensure all coredump functions that read or print mmio-register values related to w

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add GuC Error Capture Support (rev7)

== Series Details == Series: Add GuC Error Capture Support (rev7) URL : https://patchwork.freedesktop.org/series/97187/ State : warning == Summary == $ dim checkpatch origin/drm-tip fa51e0f956f6 drm/i915/guc: Update GuC ADS size for error capture lists -:32: WARNING:FILE_PATH_CHANGES: added, m

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add GuC Error Capture Support (rev7)

== Series Details == Series: Add GuC Error Capture Support (rev7) URL : https://patchwork.freedesktop.org/series/97187/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.BAT: failure for Add GuC Error Capture Support (rev7)

== Series Details == Series: Add GuC Error Capture Support (rev7) URL : https://patchwork.freedesktop.org/series/97187/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11291 -> Patchwork_22428 Summary --- **FAILURE**

[Intel-gfx] ✗ Fi.CI.IGT: failure for Fix prime_mmap to work when using LMEM

== Series Details == Series: Fix prime_mmap to work when using LMEM URL : https://patchwork.freedesktop.org/series/100737/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11286_full -> Patchwork_22411_full Summary ---

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm/doc: Fix typos and update outdated structure and API names

== Series Details == Series: series starting with [1/3] drm/doc: Fix typos and update outdated structure and API names URL : https://patchwork.freedesktop.org/series/100738/ State : success == Summary == CI Bug Log - changes from CI_DRM_11288_full -> Patchwork_22412_full =

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/mm: Add an iterator to optimally walk over holes suitable for an allocation (rev5)

== Series Details == Series: drm/mm: Add an iterator to optimally walk over holes suitable for an allocation (rev5) URL : https://patchwork.freedesktop.org/series/100136/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11288_full -> Patchwork_22413_full

Re: [Intel-gfx] [PATCH 5/6] drm/rcar_du: changes to rcar-du driver resulting from drm_writeback_connector structure changes

On Wed, Feb 2, 2022 at 7:41 AM Jani Nikula wrote: > > On Wed, 02 Feb 2022, Laurent Pinchart > wrote: > > Hi Jani, > > > > On Wed, Feb 02, 2022 at 03:15:03PM +0200, Jani Nikula wrote: > >> On Wed, 02 Feb 2022, Laurent Pinchart wrote: > >> > On Wed, Feb 02, 2022 at 02:24:28PM +0530, Kandpal Suraj

[Intel-gfx] ✓ Fi.CI.IGT: success for iommu/vt-d: Add RPLS to quirk list to skip TE disabling (rev2)

== Series Details == Series: iommu/vt-d: Add RPLS to quirk list to skip TE disabling (rev2) URL : https://patchwork.freedesktop.org/series/100165/ State : success == Summary == CI Bug Log - changes from CI_DRM_11289_full -> Patchwork_22414_full =

Re: [Intel-gfx] [PATCH v7 01/13] drm/i915/guc: Update GuC ADS size for error capture lists

On 2/26/2022 1:55 AM, Alan Previn wrote: -static void guc_capture_list_init(struct intel_guc *guc) +static int +guc_capture_prep_lists(struct intel_guc *guc) { ... - /* FIXME: Populate a proper capture list */ + /* first, set aside the first page for a capture_list with zero d

[Intel-gfx] ✓ Fi.CI.IGT: success for PCI: vmd: Prevent recursive locking on interrupt allocation

== Series Details == Series: PCI: vmd: Prevent recursive locking on interrupt allocation URL : https://patchwork.freedesktop.org/series/100743/ State : success == Summary == CI Bug Log - changes from CI_DRM_11289_full -> Patchwork_22415_full

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/7] drm/i915: add io_size plumbing

== Series Details == Series: series starting with [CI,1/7] drm/i915: add io_size plumbing URL : https://patchwork.freedesktop.org/series/100746/ State : success == Summary == CI Bug Log - changes from CI_DRM_11289_full -> Patchwork_22416_full ===

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/guc: Initialize GuC submission locks and queues early (rev2)

== Series Details == Series: drm/i915/guc: Initialize GuC submission locks and queues early (rev2) URL : https://patchwork.freedesktop.org/series/100138/ State : success == Summary == CI Bug Log - changes from CI_DRM_11289_full -> Patchwork_22417_full ==

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915: Fix assert in i915_ggtt_pin

== Series Details == Series: series starting with [1/2] drm/i915: Fix assert in i915_ggtt_pin URL : https://patchwork.freedesktop.org/series/100752/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11289_full -> Patchwork_22418_full ===

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/5] drm/i915/vlv_dsi: Add DMI quirk for wrong panel modeline in BIOS on Asus TF103C (v2)

== Series Details == Series: series starting with [1/5] drm/i915/vlv_dsi: Add DMI quirk for wrong panel modeline in BIOS on Asus TF103C (v2) URL : https://patchwork.freedesktop.org/series/100766/ State : success == Summary == CI Bug Log - changes from CI_DRM_11290_full -> Patchwork_22420_full

[Intel-gfx] ✓ Fi.CI.IGT: success for Fix i915 error_state_read ptr use (rev2)

== Series Details == Series: Fix i915 error_state_read ptr use (rev2) URL : https://patchwork.freedesktop.org/series/100768/ State : success == Summary == CI Bug Log - changes from CI_DRM_11291_full -> Patchwork_22425_full Summary ---

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/psr: Set "SF Partial Frame Enable" also on full update (rev5)

== Series Details == Series: drm/i915/psr: Set "SF Partial Frame Enable" also on full update (rev5) URL : https://patchwork.freedesktop.org/series/100633/ State : success == Summary == CI Bug Log - changes from CI_DRM_11291_full -> Patchwork_22427_full =