== Series Details ==
Series: drm/helpers: Make the suballocation manager drm generic. (rev2)
URL : https://patchwork.freedesktop.org/series/99713/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11277 -> Patchwork_22385
Summa
On 23/02/2022 00:42, Chuansheng Liu wrote:
The below memory leak information is caught:
===
unreferenced object 0x997dd4e3b240 (size 64):
comm "gem_tiled_fence", pid 10332, jiffies 4294959326 (age
220778.420s)
hex dump (first 32 bytes):
01 00 00 00 00 00 00 00 00 00 00 00 00 00
On 23/02/2022 19:03, John Harrison wrote:
On 2/23/2022 04:13, Tvrtko Ursulin wrote:
On 23/02/2022 02:11, John Harrison wrote:
On 2/22/2022 01:52, Tvrtko Ursulin wrote:
On 18/02/2022 21:33, john.c.harri...@intel.com wrote:
From: John Harrison
GuC converts the pre-emption timeout and timesl
== Series Details ==
Series: drm/i915: make a handful of read-only arrays static const (rev2)
URL : https://patchwork.freedesktop.org/series/100570/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
3587ab541416 drm/i915: make a handful of read-only arrays static const
-:38: WARNIN
On Wed, Feb 23, 2022 at 11:41:03AM -0800, José Roberto de Souza wrote:
> Some users are suffering with PSR2 issues that are under debug or
> issues that were root caused to panel firmware, to make life of those
> users easier here adding a option to disable PSR1 with kernel
> parameter.
>
> Using
On Wed, Feb 23, 2022 at 12:55:51PM -0800, José Roberto de Souza wrote:
> + union {
> + /* icl+ TC */
> + struct {
> + u32 mg_refclkin_ctl;
> + u32 mg_clktop2_coreclkctl1;
> + u32 mg_clktop2_hsclkctl;
> +
== Series Details ==
Series: drm/i915: make a handful of read-only arrays static const (rev2)
URL : https://patchwork.freedesktop.org/series/100570/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11277 -> Patchwork_22386
Sum
On Wed, Feb 23, 2022 at 12:00:28PM -0800, Navare, Manasi wrote:
> On Wed, Feb 23, 2022 at 03:13:14PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Replace the hardcoded 2 pipe assumptions when we're massaging
> > pipe_mode and the pipe_src rect to be suitable for bigjoiner.
> > Inst
== Series Details ==
Series: Per client GPU utilisation (rev2)
URL : https://patchwork.freedesktop.org/series/100573/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11276_full -> Patchwork_22370_full
Summary
---
**FAI
== Series Details ==
Series: drm/i915: Check input parameter for NULL
URL : https://patchwork.freedesktop.org/series/100647/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
Replace filling the GGTT entirely with scratch pages to avoid invalid
accesses from VT-d overfetch of scanout by only surrounding scanout vma
with guard pages. This eliminates the 100+ms delay in resume where we
have to repopulate the GGTT with scratch.
This should also help in avoiding slow suspe
From: Chris Wilson
We already wrap i915_vma.node.start for use with the GGTT, as there we
can perform additional sanity checks that the node belongs to the GGTT
and fits within the 32b registers. In the next couple of patches, we
will introduce guard pages around the objects _inside_ the drm_mm_n
From: Chris Wilson
Introduce the concept of padding the i915_vma with guard pages before
and aft. The major consequence is that all ordinary uses of i915_vma
must use i915_vma_offset/i915_vma_size and not i915_vma.node.start/size
directly, as the drm_mm_node will include the guard pages that surr
From: Chris Wilson
VT-d may cause overfetch of the scanout PTE, both before and after the
vma (depending on the scanout orientation). bspec recommends that we
provide a tile-row in either directions, and suggests using 168 PTE,
warning that the accesses will wrap around the ends of the GGTT.
Curr
== Series Details ==
Series: drm/i915: Use the memcpy_from_wc function from drm (rev2)
URL : https://patchwork.freedesktop.org/series/100581/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11276_full -> Patchwork_22372_full
== Series Details ==
Series: drm/i915: Check input parameter for NULL
URL : https://patchwork.freedesktop.org/series/100647/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11277 -> Patchwork_22387
Summary
---
**FAILUR
== Series Details ==
Series: drm/i915/dg2: Skip output init on PHY calibration failure
URL : https://patchwork.freedesktop.org/series/100650/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On 23/02/2022 20:00, John Harrison wrote:
On 2/23/2022 05:58, Tvrtko Ursulin wrote:
On 23/02/2022 02:45, John Harrison wrote:
On 2/22/2022 03:19, Tvrtko Ursulin wrote:
On 18/02/2022 21:33, john.c.harri...@intel.com wrote:
From: John Harrison
Compute workloads are inherantly not pre-emptib
Hi Dave, Daniel,
An assortment of display fixes for -rc6.
Regards,
Tvrtko
drm-intel-fixes-2022-02-24:
- Fix QGV handling on ADL-P+ (Ville Syrjälä)
- Fix bw atomic check when switching between SAGV vs. no SAGV (Ville Syrjälä)
- Disconnect PHYs left connected by BIOS on disabled ports (Imre De
== Series Details ==
Series: drm/i915: Move power well code to a separate file (rev2)
URL : https://patchwork.freedesktop.org/series/100591/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11276_full -> Patchwork_22373_full
S
== Series Details ==
Series: drm/i915/dg2: Skip output init on PHY calibration failure
URL : https://patchwork.freedesktop.org/series/100650/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11277 -> Patchwork_22388
Summary
--
== Series Details ==
Series: drm/i915/display: Allow users to disable PSR2
URL : https://patchwork.freedesktop.org/series/100658/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11277 -> Patchwork_22389
Summary
---
**S
On Thu, 2022-02-24 at 12:12 +0200, Ville Syrjälä wrote:
> On Wed, Feb 23, 2022 at 11:41:03AM -0800, José Roberto de Souza wrote:
> > Some users are suffering with PSR2 issues that are under debug or
> > issues that were root caused to panel firmware, to make life of those
> > users easier here addi
From: Tvrtko Ursulin
When a non-persistent context exits we currently mark it as banned in
order to trigger fast termination of any outstanding GPU jobs it may have
left running.
In doing so we apply a very strict 1ms limit in which the left over job
has to preempt before we issues an engine res
On Thu, Feb 24, 2022 at 01:01:24PM +, Souza, Jose wrote:
> On Thu, 2022-02-24 at 12:12 +0200, Ville Syrjälä wrote:
> > On Wed, Feb 23, 2022 at 11:41:03AM -0800, José Roberto de Souza wrote:
> > > Some users are suffering with PSR2 issues that are under debug or
> > > issues that were root cause
On Thu, Feb 24, 2022 at 03:06:30PM +0200, Ville Syrjälä wrote:
> On Thu, Feb 24, 2022 at 01:01:24PM +, Souza, Jose wrote:
> > On Thu, 2022-02-24 at 12:12 +0200, Ville Syrjälä wrote:
> > > On Wed, Feb 23, 2022 at 11:41:03AM -0800, José Roberto de Souza wrote:
> > > > Some users are suffering wit
== Series Details ==
Series: drm/i915: Check stolen memory size before calling drm_mm_init (rev4)
URL : https://patchwork.freedesktop.org/series/99917/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11277 -> Patchwork_22390
On Thu, 2022-02-24 at 12:20 +0200, Ville Syrjälä wrote:
> On Wed, Feb 23, 2022 at 12:55:51PM -0800, José Roberto de Souza wrote:
>
> > + union {
> > + /* icl+ TC */
> > + struct {
> > + u32 mg_refclkin_ctl;
> > + u32 mg_clktop2_coreclkctl1;
From: Ville Syrjälä
This JSP2 PCH actually seems to to be some special Apple
specific ICP variant rather than a JSP. Make it so. Or at
least all the references to it seem to be some Apple ICL
machines. Didn't manage to find these PCI IDs in any
public chipset docs unfortunately.
The only thing w
On Thu, Feb 24, 2022 at 01:17:35PM +, Souza, Jose wrote:
> On Thu, 2022-02-24 at 12:20 +0200, Ville Syrjälä wrote:
> > On Wed, Feb 23, 2022 at 12:55:51PM -0800, José Roberto de Souza wrote:
> >
> > > + union {
> > > + /* icl+ TC */
> > > + struct {
> > > + u32 m
On Thu, 2022-02-24 at 15:25 +0200, Ville Syrjälä wrote:
> On Thu, Feb 24, 2022 at 01:17:35PM +, Souza, Jose wrote:
> > On Thu, 2022-02-24 at 12:20 +0200, Ville Syrjälä wrote:
> > > On Wed, Feb 23, 2022 at 12:55:51PM -0800, José Roberto de Souza wrote:
> > >
> > > > + union {
> > > > +
On 22.02.2022 11:36, Jordan Justen wrote:
> From: John Harrison
>
> Implement support for fetching the hardware description table from the
> GuC. The call is made twice - once without a destination buffer to
> query the size and then a second time to fill in the buffer.
>
> Note that the tabl
+ Rodrigo
On Thu, 2022-02-24 at 15:11 +0200, Ville Syrjälä wrote:
> On Thu, Feb 24, 2022 at 03:06:30PM +0200, Ville Syrjälä wrote:
> > On Thu, Feb 24, 2022 at 01:01:24PM +, Souza, Jose wrote:
> > > On Thu, 2022-02-24 at 12:12 +0200, Ville Syrjälä wrote:
> > > > On Wed, Feb 23, 2022 at 11:41:03
On Thu, Feb 24, 2022 at 02:15:44PM +, Souza, Jose wrote:
> + Rodrigo
>
> On Thu, 2022-02-24 at 15:11 +0200, Ville Syrjälä wrote:
> > On Thu, Feb 24, 2022 at 03:06:30PM +0200, Ville Syrjälä wrote:
> > > On Thu, Feb 24, 2022 at 01:01:24PM +, Souza, Jose wrote:
> > > > On Thu, 2022-02-24 at 1
On Thu, Feb 24, 2022 at 02:15:44PM +, Souza, Jose wrote:
> + Rodrigo
>
> On Thu, 2022-02-24 at 15:11 +0200, Ville Syrjälä wrote:
> > On Thu, Feb 24, 2022 at 03:06:30PM +0200, Ville Syrjälä wrote:
> > > On Thu, Feb 24, 2022 at 01:01:24PM +, Souza, Jose wrote:
> > > > On Thu, 2022-02-24 at 1
== Series Details ==
Series: drm/i915/dg1: Remove require_force_probe protection (rev2)
URL : https://patchwork.freedesktop.org/series/100601/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11276_full -> Patchwork_22377_full
On Fri, Feb 11, 2022 at 11:26:04AM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Drop the locks around cursor plane register writes. The
> lock isn't needed since each plane's register are neatly
> contained on their own cachelines.
>
> The locking did have a secondary effect of disablin
On Thu, Feb 10, 2022 at 08:24:00AM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Drop the locks around most universal plane register writes.
> The lock isn't needed since each plane's register are neatly
> contained on their own cachelines.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by:
== Series Details ==
Series: hda/i915: split wait for component binding
URL : https://patchwork.freedesktop.org/series/100661/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11277 -> Patchwork_22391
Summary
---
**SUCC
== Series Details ==
Series: drm/i915: fix one mem leak in mmap_offset_attach() (rev3)
URL : https://patchwork.freedesktop.org/series/100532/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11276_full -> Patchwork_22378_full
== Series Details ==
Series: drm/i915/display: Use unions per platform in intel_dpll_hw_state (rev3)
URL : https://patchwork.freedesktop.org/series/100577/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separ
On Thu, Feb 24, 2022 at 01:49:36PM +, Souza, Jose wrote:
> On Thu, 2022-02-24 at 15:25 +0200, Ville Syrjälä wrote:
> > On Thu, Feb 24, 2022 at 01:17:35PM +, Souza, Jose wrote:
> > > On Thu, 2022-02-24 at 12:20 +0200, Ville Syrjälä wrote:
> > > > On Wed, Feb 23, 2022 at 12:55:51PM -0800, Jos
== Series Details ==
Series: series starting with [1/2] HAX: drm/i915: Clarify vma lifetime (rev3)
URL : https://patchwork.freedesktop.org/series/100593/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11276_full -> Patchwork_22380_full
==
== Series Details ==
Series: drm/i915/display: Use unions per platform in intel_dpll_hw_state (rev3)
URL : https://patchwork.freedesktop.org/series/100577/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11278 -> Patchwork_22392
==
On Thu, Feb 24, 2022 at 01:22:02AM +0530, Ramalingam C wrote:
Exporting sysctl_hung_task_timeout_secs, to make it available for other
kernel modules.
I guess this should only be done if second patch is accepted by sound
subsystem maintainers. If it is, then I'd do some changes in the commit
mes
== Series Details ==
Series: Use drm_clflush* instead of clflush (rev11)
URL : https://patchwork.freedesktop.org/series/99450/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11276_full -> Patchwork_22381_full
Summary
---
Hi,
On Thu, 24 Feb 2022, Ramalingam C wrote:
> Split the wait for component binding from i915 in multiples of
> sysctl_hung_task_timeout_secs. This helps to avoid the possible kworker
> thread hung detection given below.
while I understand the problem, I'm not sure whether a simpler option
shoul
From: Ville Syrjälä
All the skl+ scaler registers are suitably confined to their own
cachelines so we don't need the uncore.lock to globally serialize
access to these registers. We actually already dropped some of this
in commit 14ad15296d1f ("drm/i915: Make skl+ universal plane
registers unlocke
From: Ville Syrjälä
The ilk+ panel fitter register are sitting nicely on their own
cacheline, so no need for global serialization via uncore.lock.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions
From: Ville Syrjälä
To reduce the amount of registers written during the vblank evade
critical section let's also split the .color_commit() hook to
noarm+arm pair. The noarm hook runs before the vblank evasion
with the arm hook staying inside the critical section.
Just the framework here, actual
From: Ville Syrjälä
Move most of the pipe+output CSC programming to the
.color_commit_noarm() hook which runs before vblank evasion.
Only PIPE_CSC_MODE (the arming register) needs to remain in
inside the critical section.
A test case that just updates the CTM in a loop produces
the following i91
From: Ville Syrjälä
As we did with plane updates we can split the color management
updates to noarm+arm pair. The CSC matrix coefficients can all
be written in the noarm hook, with just the PIPE_CSC_mode (the
arming register) left behind in the arm hook.
Also make the scaler/pfit completely lock
On Thu, Feb 24, 2022 at 04:37:03PM +0200, Lisovskiy, Stanislav wrote:
> On Fri, Feb 11, 2022 at 11:26:04AM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Drop the locks around cursor plane register writes. The
> > lock isn't needed since each plane's register are neatly
> > contained
On Thu, Feb 24, 2022 at 01:22:03AM +0530, Ramalingam C wrote:
Split the wait for component binding from i915 in multiples of
sysctl_hung_task_timeout_secs. This helps to avoid the possible kworker
thread hung detection given below.
<3>[ 60.946316] INFO: task kworker/11:1:104 blocked for more t
== Series Details ==
Series: drm/i915: Move bigjoiner refactoring (rev2)
URL : https://patchwork.freedesktop.org/series/100195/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11276_full -> Patchwork_22383_full
Summary
--
== Series Details ==
Series: drm/i915/dmc: Do not try loading wrong DMC version
URL : https://patchwork.freedesktop.org/series/100664/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
1548d273add7 drm/i915/dmc: Do not try loading wrong DMC version
-:14: WARNING:COMMIT_LOG_LONG_LIN
On Thu, 2022-02-24 at 17:39 +0200, Ville Syrjälä wrote:
> On Thu, Feb 24, 2022 at 01:49:36PM +, Souza, Jose wrote:
> > On Thu, 2022-02-24 at 15:25 +0200, Ville Syrjälä wrote:
> > > On Thu, Feb 24, 2022 at 01:17:35PM +, Souza, Jose wrote:
> > > > On Thu, 2022-02-24 at 12:20 +0200, Ville Syrj
Hi all,
Today's linux-next merge of the drm-intel tree got a conflict in:
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
between commit:
721fd84ea1fe9 ("drm/i915/pmu: Use PM timestamp instead of RING TIMESTAMP for
reference")
from the drm-intel-gt tree and commit:
b3f74938d6566 ("dr
On Thu, Feb 24, 2022 at 05:48:10PM +, Souza, Jose wrote:
> On Thu, 2022-02-24 at 17:39 +0200, Ville Syrjälä wrote:
> > On Thu, Feb 24, 2022 at 01:49:36PM +, Souza, Jose wrote:
> > > On Thu, 2022-02-24 at 15:25 +0200, Ville Syrjälä wrote:
> > > > On Thu, Feb 24, 2022 at 01:17:35PM +, Sou
On Thu, Feb 24, 2022 at 07:48:10PM +0200, Souza, Jose wrote:
> On Thu, 2022-02-24 at 17:39 +0200, Ville Syrjälä wrote:
> > On Thu, Feb 24, 2022 at 01:49:36PM +, Souza, Jose wrote:
> > > On Thu, 2022-02-24 at 15:25 +0200, Ville Syrjälä wrote:
> > > > On Thu, Feb 24, 2022 at 01:17:35PM +, Sou
== Series Details ==
Series: drm/i915/dmc: Do not try loading wrong DMC version
URL : https://patchwork.freedesktop.org/series/100664/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11279 -> Patchwork_22393
Summary
---
== Series Details ==
Series: drm/i915/display/vrr: Reset VRR capable property on a long hpd (rev4)
URL : https://patchwork.freedesktop.org/series/98801/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
244f36e5190c drm/i915/display/vrr: Reset VRR capable property on a long hpd
-:1
== Series Details ==
Series: drm/i915/psr: Set "SF Partial Frame Enable" also on full update (rev2)
URL : https://patchwork.freedesktop.org/series/100633/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11276 -> Patchwork_22382
===
Acked-by: Vivek Kasireddy
> -Original Message-
> From: Ville Syrjala
> Sent: Thursday, February 24, 2022 5:22 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Roper, Matthew D ; Kasireddy, Vivek
>
> Subject: [PATCH] drm/i915: s/JSP2/ICP2/ PCH
>
> From: Ville Syrjälä
>
> This JSP2 PCH a
== Series Details ==
Series: drm/i915/display/vrr: Reset VRR capable property on a long hpd (rev4)
URL : https://patchwork.freedesktop.org/series/98801/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11279 -> Patchwork_22394
Hi,
I fixed the regression in this patch and resent it, it still has BAT failures,
I wanted to understand if it failed to boot some of the machines again or the
errors flagged here are the known errors.
Regards
Manasi
From: Patchwork
Sent: Thursday, February 24, 2022 10:45 AM
To: Navare, Mana
== Series Details ==
Series: Bump DMC to v2.16 on ADL-P
URL : https://patchwork.freedesktop.org/series/100666/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11279 -> Patchwork_22395
Summary
---
**FAILURE**
Serious
On 2/24/2022 01:59, Tvrtko Ursulin wrote:
On 23/02/2022 19:03, John Harrison wrote:
On 2/23/2022 04:13, Tvrtko Ursulin wrote:
On 23/02/2022 02:11, John Harrison wrote:
On 2/22/2022 01:52, Tvrtko Ursulin wrote:
On 18/02/2022 21:33, john.c.harri...@intel.com wrote:
From: John Harrison
GuC co
== Series Details ==
Series: drm/i915: Fix cursor coordinates on bigjoiner slave (rev3)
URL : https://patchwork.freedesktop.org/series/100154/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11277_full -> Patchwork_22384_full
On 2/24/2022 03:41, Tvrtko Ursulin wrote:
On 23/02/2022 20:00, John Harrison wrote:
On 2/23/2022 05:58, Tvrtko Ursulin wrote:
On 23/02/2022 02:45, John Harrison wrote:
On 2/22/2022 03:19, Tvrtko Ursulin wrote:
On 18/02/2022 21:33, john.c.harri...@intel.com wrote:
From: John Harrison
Comput
I'm back so I will try this patch on my machine and see if it helps, thank
you!
On Wed, 2022-02-23 at 14:48 +0200, Jouni Högander wrote:
> Currently we are observing occasional screen flickering when
> PSR2 selective fetch is enabled. More specifically glitch seems
> to happen on full frame update
On 2/24/2022 11:19, John Harrison wrote:
[snip]
I'll change it to _uses_ and repost, then.
[ 7.683149] kernel BUG at drivers/gpu/drm/i915/gt/uc/intel_guc.h:367!
Told you that one went bang.
John.
Hi,
> -Original Message-
> From: Navare, Manasi D
> Sent: torstai 24. helmikuuta 2022 21.00
> To: intel-gfx@lists.freedesktop.org
> Cc: Sarvela, Tomi P ; Syrjala, Ville
> ; Saarinen, Jani ; Nikula,
> Jani
>
> Subject: RE: ✗ Fi.CI.BAT: failure for drm/i915/display/vrr: Reset VRR capable
Also - I realized this is missing an appropriate Fixes: tag for the commit
that enabled PSR2 selective fetch on tigerlake in the first place
On Wed, 2022-02-23 at 17:32 +, Souza, Jose wrote:
> On Wed, 2022-02-23 at 14:48 +0200, Jouni Högander wrote:
> > Currently we are observing occasional sc
On 2/23/2022 04:00, Tvrtko Ursulin wrote:
On 23/02/2022 02:22, John Harrison wrote:
On 2/22/2022 01:53, Tvrtko Ursulin wrote:
On 18/02/2022 21:33, john.c.harri...@intel.com wrote:
From: John Harrison
Compute workloads are inherently not pre-emptible on current hardware.
Thus the pre-emption
Some users are suffering with PSR2 issues that are under debug or
issues that were root caused to panel firmware bugs, to make life of
those users easier here adding a option to disable PSR2 with kernel
parameters so they can still benefit from PSR1 power savings.
Using the same enable_psr that is
== Series Details ==
Series: drm/helpers: Make the suballocation manager drm generic. (rev2)
URL : https://patchwork.freedesktop.org/series/99713/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11277_full -> Patchwork_22385_full
=
Op 23-02-2022 om 16:11 schreef Christian König:
> Am 23.02.22 um 14:51 schrieb Maarten Lankhorst:
>> Second version of the patch. I didn't fix the copyright (which ame up
>> in the previous version), as I feel the original author should send a
>> patch for that.
>>
>> I've made the suballocator int
== Series Details ==
Series: drm/mm: Add an iterator to optimally walk over holes suitable for an
allocation (rev4)
URL : https://patchwork.freedesktop.org/series/100136/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
1a82dfc67642 drm/mm: Add an iterator to optimally walk over
== Series Details ==
Series: drm/mm: Add an iterator to optimally walk over holes suitable for an
allocation (rev4)
URL : https://patchwork.freedesktop.org/series/100136/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't
On 2/23/2022 18:03, Ceraolo Spurio, Daniele wrote:
On 2/23/2022 12:23 PM, John Harrison wrote:
On 2/22/2022 17:12, Ceraolo Spurio, Daniele wrote:
On 2/17/2022 3:52 PM, john.c.harri...@intel.com wrote:
From: John Harrison
The LRC descriptor was being initialised early on in the context
regist
== Series Details ==
Series: drm/mm: Add an iterator to optimally walk over holes suitable for an
allocation (rev4)
URL : https://patchwork.freedesktop.org/series/100136/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11282 -> Patchwork_22396
==
== Series Details ==
Series: drm/i915/cdclk: Add cdclk check to atomic check
URL : https://patchwork.freedesktop.org/series/100671/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
DESCEND objtool
CHK include/generated/compile.h
== Series Details ==
Series: Replace VT-d workaround with guard pages (rev3)
URL : https://patchwork.freedesktop.org/series/97492/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Replace VT-d workaround with guard pages (rev3)
URL : https://patchwork.freedesktop.org/series/97492/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11283 -> Patchwork_22398
Summary
---
**
== Series Details ==
Series: drm/i915: Be more gentle when exiting non-persistent contexts (rev3)
URL : https://patchwork.freedesktop.org/series/93420/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separatel
== Series Details ==
Series: drm/i915: make a handful of read-only arrays static const (rev2)
URL : https://patchwork.freedesktop.org/series/100570/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11277_full -> Patchwork_22386_full
===
== Series Details ==
Series: drm/i915: Be more gentle when exiting non-persistent contexts (rev3)
URL : https://patchwork.freedesktop.org/series/93420/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11283 -> Patchwork_22399
From: John Harrison
The next GuC firmware release includes some significant backwards
breaking API changes. One such is that there is no longer an LRC
descriptor pool. A bunch of prep work for that change can be done in
advance - the descriptor pool was being used for things it shouldn't
really h
From: John Harrison
Some G2H handlers were reading the context id field from the payload
before checking the payload met the minimum length required.
Signed-off-by: John Harrison
Reviewed-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 6 --
1 file chang
From: John Harrison
The LRC descriptor was being initialised early on in the context
registration sequence. It could then be determined that the actual
registration needs to be delayed and the descriptor would be wiped
out. This is inefficient, so move the setup to later in the process
after the
From: John Harrison
The LRC descriptor pool is going away. So, stop naming context ids as
descriptor pool indecies.
While at it, add a bunch of missing line feeds to some error messages.
Signed-off-by: John Harrison
Reviewed-by: Daniele Ceraolo Spurio
---
.../gpu/drm/i915/gt/uc/intel_guc_sub
From: John Harrison
The LRC descriptor pool is going away. So, stop using it as a check for
context registration, use the GuC id instead (being the thing that
actually gets registered with the GuC).
Also, rename the set/clear/query helper functions for context id
mappings to better reflect their
From: John Harrison
The LRC descriptor pool is going away. So, stop using it as a check
for whether submission has been initialised or not.
Signed-off-by: John Harrison
Reviewed-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/gt/uc/intel_guc.h| 2 ++
drivers/gpu/drm/i915/gt/uc
From: John Harrison
The LRC descriptor pool is going away. So, stop using it as the limit
for how many context ids are available. Instead, size the pool
according to the number of contexts allowed. Note that this is just a
naming change, the actual limit is identical in value.
While at it, also
From: John Harrison
The CTB registration process changed significantly a while back using
a single KLV based H2G. So drop the original and now obsolete H2G
definitions.
Signed-off-by: John Harrison
Reviewed-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h | 2 --
From: John Harrison
The LRC descriptor pool is going away. Further, the function that was
populating it was also doing a bunch of logic about the context
registration sequence. So, split that code apart into separate state
setup and try to register functions. Note that some of those 'try to
regis
== Series Details ==
Series: drm/i915: s/JSP2/ICP2/ PCH
URL : https://patchwork.freedesktop.org/series/100689/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
0862321e317b drm/i915: s/JSP2/ICP2/ PCH
-:9: WARNING:REPEATED_WORD: Possible repeated word: 'to'
#9:
This JSP2 PCH actua
== Series Details ==
Series: drm/i915: s/JSP2/ICP2/ PCH
URL : https://patchwork.freedesktop.org/series/100689/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: s/JSP2/ICP2/ PCH
URL : https://patchwork.freedesktop.org/series/100689/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11283 -> Patchwork_22400
Summary
---
**SUCCESS**
No regr
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