The first patch is a drm core patch that replaces the for loop in
drm_mm_insert_node_in_range() with the iterator and would not
cause any functional changes. The second patch is a i915 driver
specific patch that also uses the iterator but solves a different
problem.
v2:
- Added a new patch to this
While looking for next holes suitable for an allocation, although,
it is highly unlikely, make sure that the DECLARE_NEXT_HOLE_ADDR
macro is using a valid node before it extracts the rb_node from it.
Cc: Tvrtko Ursulin
Cc: Christian König
Signed-off-by: Vivek Kasireddy
---
drivers/gpu/drm/drm_
This iterator relies on drm_mm_first_hole() and drm_mm_next_hole()
functions to identify suitable holes for an allocation of a given
size by efficiently traversing the rbtree associated with the given
allocator.
It replaces the for loop in drm_mm_insert_node_in_range() and can
also be used by drm
On platforms capable of allowing 8K (7680 x 4320) modes, pinning 2 or
more framebuffers/scanout buffers results in only one that is mappable/
fenceable. Therefore, pageflipping between these 2 FBs where only one
is mappable/fenceable creates latencies large enough to miss alternate
vblanks thereby
On 2022-02-16 at 10:22:50 +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/perf: Skip the i915_perf_init for dg2
> URL : https://patchwork.freedesktop.org/series/100150/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_11230_full -> Patchwork_22276_fu
On Tue, 15 Feb 2022, Jani Nikula wrote:
> As all access to struct intel_fbdev guts is nicely stowed away in
> intel_fbdev.c, we can hide the struct definition there too.
>
> Reviewed-by: Ville Syrjälä
> Signed-off-by: Jani Nikula
Pushed to din, thanks for the review.
BR,
Jani.
> ---
> .../dr
From: Ville Syrjälä
Adjust the cursor dst coordinates appripriately when it's on
the bigjoiner slave pipe. intel_atomic_plane_check_clipping()
already did this but with the cursor we discard those results
(apart from uapi.visible and error checks) since the hardware
will be doing the clipping for
On Tue, 15 Feb 2022, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Let's not replicate the same piece of code to expand
> the MSO segment timings to full width in many places.
> Pull it into a helper
Did I duplicate that? Yuck.
Reviewed-by: Jani Nikula
>
> Signed-off-by: Ville Syrjälä
> ---
The variable should obviously be local, not static.
Fixes: a421d8a99216 ("drm/i915/dp: rewrite DP 2.0 128b/132b link training based
on errata")
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_dp_link_training.c | 2 +-
1 file changed, 1 insertion(+), 1 delet
Hi
Am 16.02.22 um 18:41 schrieb Lucas De Marchi:
First the simplest ones:
- iosys_map_memset(): when abstracting system and I/O memory,
just like the memcpy() use case, memset() also has dedicated
functions to be called for using IO memory.
- iosys_map_memcpy
On Thu, Feb 17, 2022 at 10:39:38AM +0200, Jani Nikula wrote:
The variable should obviously be local, not static.
Fixes: a421d8a99216 ("drm/i915/dp: rewrite DP 2.0 128b/132b link training based on
errata")
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
Reviewed-by: Lucas De Marchi
Lucas De
d6ebae3137a51b
>> commit: 7ca6504c36709f35c4cc38ae6acc1c9c3d72136f [4/8] Merge remote-tracking
>> branch 'drm-misc/drm-misc-next' into drm-tip
>> config: mips-buildonly-randconfig-r002-20220217
>> (https://download.01.org/0day-ci/archive/20220217/202202171455.bclm1ybc-...@intel.com/config)
>&
On 17/02/2022 07:50, Vivek Kasireddy wrote:
While looking for next holes suitable for an allocation, although,
it is highly unlikely, make sure that the DECLARE_NEXT_HOLE_ADDR
macro is using a valid node before it extracts the rb_node from it.
Was the need for this just a consequence of insuf
: 7ca6504c36709f35c4cc38ae6acc1c9c3d72136f [4/8] Merge remote-tracking
branch 'drm-misc/drm-misc-next' into drm-tip
config: mips-buildonly-randconfig-r002-20220217
(https://download.01.org/0day-ci/archive/20220217/202202171455.bclm1ybc-...@intel.com/config)
compiler: clang version 15.0.0 (https://github.com/llvm/ll
On 17/02/2022 07:50, Vivek Kasireddy wrote:
On platforms capable of allowing 8K (7680 x 4320) modes, pinning 2 or
more framebuffers/scanout buffers results in only one that is mappable/
fenceable. Therefore, pageflipping between these 2 FBs where only one
is mappable/fenceable creates latencies
: e141e36b2871c529379f7ec7d5d6ebae3137a51b
commit: 7ca6504c36709f35c4cc38ae6acc1c9c3d72136f [4/8] Merge remote-tracking
branch 'drm-misc/drm-misc-next' into drm-tip
config: mips-buildonly-randconfig-r002-20220217
(https://download.01.org/0day-ci/archive/20220217/202202171455.bclm1ybc-...@intel.com/config)
compi
On 16/02/2022 17:14, Usyskin, Alexander wrote:
-Original Message-
From: Tvrtko Ursulin
Sent: Wednesday, February 16, 2022 14:04
To: Usyskin, Alexander ; Greg Kroah-
Hartman ; Jani Nikula
; Joonas Lahtinen
; Vivi, Rodrigo ;
David Airlie ; Daniel Vetter
Cc: linux-ker...@vger.kernel.
On 16/02/2022 19:54, Alexander Usyskin wrote:
From: Tomas Winkler
GSC is a graphics system controller, it provides
a chassis controller for graphics discrete cards.
There are two MEI interfaces in GSC: HECI1 and HECI2.
Both interfaces are on the BAR0 at offsets 0x00258000 and 0x00259000.
GS
On 2/17/22 10:25, Lucas De Marchi wrote:
> On Thu, Feb 17, 2022 at 10:00:42AM +0100, Javier Martinez Canillas wrote:
[snip]
>>> this is now called iosys_map in drm-intel... drm-tip will need a fixup
>>> for the merge.
>>>
>>
>> I thought that the drm-intel tree was only for Intel DRM drivers chan
On 16/02/2022 18:15, Vinay Belgaumkar wrote:
SLPC unset param H2G only needs one parameter - the id of the
param.
Fixes: 025cb07bebfa ("drm/i915/guc/slpc: Cache platform frequency limits")
How serious is this? Does it need backporting? If so:
Cc: # v5.15+
?
Regards,
Tvrtko
Suggested-b
Hi
Am 17.02.22 um 10:25 schrieb Lucas De Marchi:
[...]
$ git grep "TODO: Use mapping abstraction properly" | wc -l
15
If you point me the proper way, I'll be happy to post a patch to
change it.
It depends what you want to do with the address. There are APIs to copy
from/to. I also added a fe
tree: git://anongit.freedesktop.org/drm-intel topic/core-for-CI
head: b56d8d7bad86a9badc1d1b9ea2d1730fa1d3978b
commit: b56d8d7bad86a9badc1d1b9ea2d1730fa1d3978b [1/1] drm/i915: Add DG2 PCI IDs
config: x86_64-randconfig-a011
(https://download.01.org/0day-ci/archive/20220217
On 2/17/22 10:41, Thomas Zimmermann wrote:
> Hi
>
> Am 17.02.22 um 10:25 schrieb Lucas De Marchi:
> [...]
>>> $ git grep "TODO: Use mapping abstraction properly" | wc -l
>>> 15
>>>
>>> If you point me the proper way, I'll be happy to post a patch to
>>> change it.
>>
>> It depends what you want t
== Series Details ==
Series: Bump DMC Version on ADL-P to v2.16 (rev3)
URL : https://patchwork.freedesktop.org/series/99938/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11238_full -> Patchwork_22287_full
Summary
---
> -Original Message-
> From: Tvrtko Ursulin
> Sent: Thursday, February 17, 2022 11:26
> To: Usyskin, Alexander ; Greg Kroah-
> Hartman ; Jani Nikula
> ; Joonas Lahtinen
> ; Vivi, Rodrigo ;
> David Airlie ; Daniel Vetter
> Cc: linux-ker...@vger.kernel.org; Winkler, Tomas
> ; Lubart, Vita
Hi,
Was able to test 8k@60/30 with the changes, where bigjoiner will come
into play, didn't get any issues/errors.
Thanks & Regards,
Ankit
On 2/16/2022 12:01 AM, Ville Syrjala wrote:
From: Ville Syrjälä
This is an attempt at more or less finish the bigjoiner
state computation/readout refa
Hi Dave & Daniel,
Here is the first drm-intel-gt-next feature PR towards v5.18.
For DG2 adds subplatform G12, missing workarounds and fixes GuC
loading on ARM64. C0/D0 stepping info added for RPL-S.
For uAPI enables support for simple parallel submission with
execlists which was previously enabl
On Thu, Feb 17, 2022 at 01:06:04AM -, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Move bigjoiner refactoring
> URL : https://patchwork.freedesktop.org/series/100195/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_11238 -> Patchwork_22286
> ==
From: Ville Syrjälä
The latest bigjoiner pipesrc rect series ran into problems
due to stale junk left over in the state of disabled crtcs.
This was a mild surprise since I clearly remember addressing
that very issue a few years ago. Turns out the introduction
of bigjoiner undid that work, so now
From: Ville Syrjälä
Include hw.enable and pipe_mode in the crtc debugfs state dump.
These are fairly fundemental to the operation of the driver
so not seeing them leaves us in the dark.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display_debugfs.c | 7 +--
1 file ch
From: Ville Syrjälä
For some reason we're flagging that we need to run through the
full modeset calculations (any_ms==true -> do cdclk/etc. checks)
if any crtc got initially flagged for a modeset and is not
enabled via the uapi. No idea why this is here since later on
(after all fastset handling)
From: Ville Syrjälä
Currently we just leave the old gunk lying around in the crtc
state when userspace asks us to fully disable the crtc. That
doesn't match what the state would be had we never even enabled
the crtc in the first place. So let's make this consistent and
call intel_crtc_prepare_cle
From: Ville Syrjälä
Let's just dump the "full" hw crtc state in debugs so that we can
see if some stale junk was left behind when the crtc is supposed
to be entirely off.
Signed-off-by: Ville Syrjälä
---
.../gpu/drm/i915/display/intel_display_debugfs.c | 16 +++-
1 file changed, 7
Hi Dave, Daniel,
An assortment of fixes for -rc5, mostly display and one for the TTM
backend.
Contains a merge of two trivial GVT fixes as well which came via GVT pull
request.
Regards,
Tvrtko
drm-intel-fixes-2022-02-17:
- GVT kerneldoc cleanup. (Randy Dunlap)
- GVT Kconfig should depend on
== Series Details ==
Series: drm/i915/dg2: Move misplaced 'ctx' & 'gt' wa's to engine wa list
URL : https://patchwork.freedesktop.org/series/100212/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11238_full -> Patchwork_22291_full
===
== Series Details ==
Series: drm/i915: SAGV fixes (rev2)
URL : https://patchwork.freedesktop.org/series/100091/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11239 -> Patchwork_22302
Summary
---
**SUCCESS**
No reg
Hi Dave and Daniel,
here's drm-misc-fixes for this week.
Best regards
Thomas
drm-misc-fixes-2022-02-17:
* drm/cma-helper: Set VM_DONTEXPAND
* drm/atomic: Fix error handling in drm_atomic_set_mode_for_crtc()
The following changes since commit 9da1e9ab82c92d0e89fe44cad2cd7c2d18d64070:
drm/roc
== Series Details ==
Series: Add data flow metering support for HDMI2.1 (rev3)
URL : https://patchwork.freedesktop.org/series/99668/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11238_full -> Patchwork_22293_full
Summary
-
== Series Details ==
Series: drm/i915/guc/slpc: Correct the param count for unset param
URL : https://patchwork.freedesktop.org/series/100260/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11239 -> Patchwork_22303
Summary
-
On Fri, 2022-02-11 at 17:29 +0200, Imre Deak wrote:
> On Fri, Feb 11, 2022 at 04:26:27PM +0200, Hogander, Jouni wrote:
> > On Tue, 2022-02-08 at 13:36 +0200, Imre Deak wrote:
> > > Add functions to get a power well's actual- and cached-enabled
> > > state,
> > > name, domain mask and refcount, as a
Reviewed-by: Jouni Högander
for all the patches except. I'm expecting you send patch 09/26 again?
On Tue, 2022-02-08 at 13:36 +0200, Imre Deak wrote:
> This is v2 of [1] addressing the review comments from Jani, moving
> the
> power well ops/desc struct accessor functions and implementation of
>
On 10/02/2022 07:19, Thomas Hellström wrote:
It's unclear what reference the initial vma kref refernce refers to.
A vma can have multiple weak references, the object vma list,
the vm's bound list and the GT's closed_list, and the initial vma
reference can be put from lookups of all these lists.
== Series Details ==
Series: series starting with [1/2] drm/i915/lrc: move lrc_get_runtime() to
intel_lrc.c (rev2)
URL : https://patchwork.freedesktop.org/series/100118/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11238_full -> Patchwork_22294_full
=
We dont need to implement reset_domain in intel_engine
_setup(), but can be done as a helper. Implemented as
engine->reset_domain = get_reset_domain().
Cc: Rodrigo Vivi
Signed-off-by: Tejas Upadhyay
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 74 +--
1 file changed, 42 i
== Series Details ==
Series: drm/i915/pxp: prefer forward declaration over includes (rev2)
URL : https://patchwork.freedesktop.org/series/100117/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11238_full -> Patchwork_22295_full
==
On Wed, Feb 16, 2022 at 05:01:35PM +0200, Ville Syrjälä wrote:
> On Wed, Feb 16, 2022 at 02:11:54PM +, Hogander, Jouni wrote:
> > On Wed, 2022-02-16 at 12:07 +0200, Ville Syrjälä wrote:
> > > On Wed, Feb 16, 2022 at 09:36:02AM +, Hogander, Jouni wrote:
> > > > On Wed, 2022-02-16 at 10:50 +0
== Series Details ==
Series: Add driver for GSC controller (rev8)
URL : https://patchwork.freedesktop.org/series/98066/
State : failure
== Summary ==
Applying: drm/i915/gsc: add gsc as a mei auxiliary device
Using index info to reconstruct a base tree...
M drivers/gpu/drm/i915/Makefile
M
== Series Details ==
Series: drm/i915/dg2: Print PHY name properly on calibration error (rev3)
URL : https://patchwork.freedesktop.org/series/100191/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
3553b0dbebae drm/i915/dg2: Print PHY name properly on calibration error
-:9: WARNI
On Wed, Feb 16, 2022 at 08:05:47PM +0100, Rafael J. Wysocki wrote:
> On Tue, Feb 15, 2022 at 8:24 PM Gustavo A. R. Silva
> wrote:
>
> Can you also send the ACPI patch separately, please?
>
> We would like to route it through the upstream ACPICA code base.
Yeah; no problem.
Thanks
--
Gustavo
== Series Details ==
Series: drm/i915/display/tgl+: Implement new PLL programming step (rev3)
URL : https://patchwork.freedesktop.org/series/99867/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11238_full -> Patchwork_22296_full
== Series Details ==
Series: drm/i915/dg2: Print PHY name properly on calibration error (rev3)
URL : https://patchwork.freedesktop.org/series/100191/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11239 -> Patchwork_22305
Su
== Series Details ==
Series: drm/i915: Kill the fake lmem support
URL : https://patchwork.freedesktop.org/series/100276/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
Hi,
Appearance of ref_tracker library allows to drop custom solution for wakeref
tracking used in i915 and reuse the library.
For this few adjustements has been made to ref_tracker, details in patches.
I hope changes are OK for original author.
The patchset has been rebased on top of drm-tip to a
To have reliable detection of leaks, caller must be able to check under the same
lock both: tracked counter and the leaks. dir.lock is natural candidate for such
lock and unlocked print helper can be called with this lock taken.
As a bonus we can reuse this helper in ref_tracker_dir_exit.
Signed-o
In cases references are taken alternately on multiple exec paths leak
report can grow substantially, sorting and grouping leaks by stack_handle
allows to compact it.
Signed-off-by: Andrzej Hajda
Reviewed-by: Chris Wilson
---
lib/ref_tracker.c | 35 +++
1 file cha
To improve readibility of ref_tracker printing following changes
have been performed:
- added display name for ref_tracker_dir,
- stack trace is printed indented, in the same printk call,
- total number of references is printed every time,
- print info about dropped references.
Signed-off-by: Andr
In case one wants to show stats via debugfs.
Signed-off-by: Andrzej Hajda
Reviewed-by: Chris Wilson
---
include/linux/ref_tracker.h | 8 ++
lib/ref_tracker.c | 52 -
2 files changed, 54 insertions(+), 6 deletions(-)
diff --git a/include/linux/
Library can be called in non-sleeping context, so it should not use
__GFP_NOFAIL. Instead it should calmly handle allocation fails, for
this __GFP_NOWARN has been added as well.
Signed-off-by: Andrzej Hajda
---
lib/ref_tracker.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
From: Chris Wilson
Extract the callstack tracking of intel_runtime_pm.c into its own
utility so that that we can reuse it for other online debugging of
scoped wakerefs.
Signed-off-by: Chris Wilson
Reviewed-by: Andrzej Hajda
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/i915/Kconfig.debug
Wakeref has dedicated type. Assumption it will be int
compatible forever is incorrect.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
b/drive
From: Chris Wilson
Track every intel_gt_pm_get() until its corresponding release in
intel_gt_pm_put() by returning a cookie to the caller for acquire that
must be passed by on rleased. When there is an imbalance, we can see who
either tried to free a stale wakeref, or who forgot to free theirs.
Beside reusing existing code, the main advantage of ref_tracker is
tracking per instance of wakeref. It allows also to catch double
put.
On the other side we lose information about the first acquire and
the last release, but the advantages outweigh it.
Signed-off-by: Andrzej Hajda
Reviewed-by: Ch
== Series Details ==
Series: drm/i915/gt: fix unsigned integer to signed assignment
URL : https://patchwork.freedesktop.org/series/100250/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11238_full -> Patchwork_22298_full
Sum
== Series Details ==
Series: drm/i915: Kill the fake lmem support
URL : https://patchwork.freedesktop.org/series/100276/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11239 -> Patchwork_22306
Summary
---
**SUCCESS**
> -Original Message-
> From: Tvrtko Ursulin
> Sent: Thursday, February 17, 2022 11:38
> To: Usyskin, Alexander ; Greg Kroah-
> Hartman ; Jani Nikula
> ; Joonas Lahtinen
> ; Vivi, Rodrigo ;
> David Airlie ; Daniel Vetter
> Cc: Winkler, Tomas ; Lubart, Vitaly
> ; intel-gfx@lists.freedeskt
Hi,
This is the second series that prepares i915 to host multitile
platforms. It introduces the for_each_gt() macro that loops over
the tiles to perform per gt actions.
This patch is a combination of two patches developed originally
by Abdiel, who introduced some refactoring during probe, and the
With the upcoming multitile support each tile will have its own
local memory. Mark the current LMEM with the suffix '0' to
emphasise that it belongs to the root tile.
Suggested-by: Michal Wajdeczko
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/display/intel_fb.c | 2 +-
drive
The "gt_is_root(struct intel_gt *gt)" helper return true if the
gt is the root gt, which means that its id is 0. Return false
otherwise.
Suggested-by: Michal Wajdeczko
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/gt/intel_gt.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/drive
Now that we have tiles we want each of them to have its own
interface. A directory "gt/" is created under "cardN/" that will
contain as many diroctories as the tiles.
In the coming patches tile related interfaces will be added. For
now the sysfs gt structure simply has an id interface related
to t
From: Tvrtko Ursulin
On a multi-tile platform, each tile has its own registers + GGTT
space, and BAR 0 is extended to cover all of them.
Up to four GTs are supported in i915->gt[], with slot zero
shadowing the existing i915->gt0 to enable source compatibility
with legacy driver paths. A for_each
Now tiles have their own sysfs interfaces under the gt/
directory. Because RC6 is a property that can be configured on a
tile basis, then each tile should have its own interface
The new sysfs structure will have a similar layout for the 4 tile
case:
/sys/.../card0
├── gt
│ ├──
Now tiles have their own sysfs interfaces under the gt/
directory. Because RPS is a property that can be configured on a
tile basis, then each tile should have its own interface
The new sysfs structure will have a similar layout for the 4 tile
case:
/sys/.../card0
├── gt
│ ├──
From: Sujaritha Sundaresan
This patch adds the following new sysfs frequency attributes;
- punit_req_freq_mhz
- throttle_reason_status
- throttle_reason_pl1
- throttle_reason_pl2
- throttle_reason_pl4
- throttle_reason_thermal
- throttle_rea
On Thu, Feb 17, 2022 at 03:04:38PM +0100, Andrzej Hajda wrote:
> -static noinline depot_stack_handle_t
> +static intel_wakeref_t
> track_intel_runtime_pm_wakeref(struct intel_runtime_pm *rpm)
> {
> - depot_stack_handle_t stack, *stacks;
> - unsigned long flags;
> -
> - if (rpm->no_wak
== Series Details ==
Series: treewide: Replace zero-length arrays with flexible-array members
URL : https://patchwork.freedesktop.org/series/100251/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11238_full -> Patchwork_22299_full
===
BIOS may leave a TypeC PHY in a connected state even though the
corresponding port is disabled. This will prevent any hotplug events
from being signalled (after the monitor deasserts and then reasserts its
HPD) until the PHY is disconnected and so the driver will not detect a
connected sink. Reboot
GSC is a graphics system controller, it provides
a chassis controller for graphics discrete cards.
There are two MEI interfaces in GSC: HECI1 and HECI2.
This series includes instantiation of the auxiliary devices for HECI2
and mei-gsc auxiliary device driver that binds to the auxiliary device.
T
From: Tomas Winkler
GSC is a graphics system controller, it provides
a chassis controller for graphics discrete cards.
There are two MEI interfaces in GSC: HECI1 and HECI2.
Both interfaces are on the BAR0 at offsets 0x00258000 and 0x00259000.
GSC is a GT Engine (class 4: instance 6). HECI1 inte
From: Tomas Winkler
GSC is a graphics system controller, based on CSE, it provides
a chassis controller for graphics discrete cards, as well as it
supports media protection on selected devices.
mei_gsc binds to a auxiliary devices exposed by Intel discrete
driver i915.
Signed-off-by: Alexander
Setup char device in spite of firmware handshake failure.
In order to provide host access to the firmware status registers and other
information required for the manufacturing process.
Signed-off-by: Alexander Usyskin
Signed-off-by: Tomas Winkler
---
V5: Rebase
V6: Rebase
V7: add Greg KH Reviewe
From: Tomas Winkler
Implement runtime handlers for mei-gsc, to track
idle state of the device properly.
CC: Rodrigo Vivi
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander Usyskin
---
V4: drop debug prints
V5: Rebase
V6: Rebase
V7: add Greg KH Reviewed-by
V8: Rebase
V9: Rebase
---
drivers
Add a hook to retrieve the firmware version of the
GSC devices to bus-fixup.
GSC has a different MKHI clients GUIDs but the same message structure
to retrieve the firmware version as MEI so mei_fwver() can be reused.
CC: Ashutosh Dixit
Signed-off-by: Alexander Usyskin
Signed-off-by: Tomas Winkle
On Thu, 2022-02-17 at 17:22 +0200, Imre Deak wrote:
> BIOS may leave a TypeC PHY in a connected state even though the
> corresponding port is disabled. This will prevent any hotplug events
> from being signalled (after the monitor deasserts and then reasserts its
> HPD) until the PHY is disconnecte
On 17/02/2022 14:41, Andi Shyti wrote:
Now tiles have their own sysfs interfaces under the gt/
directory. Because RC6 is a property that can be configured on a
tile basis, then each tile should have its own interface
The new sysfs structure will have a similar layout for the 4 tile
case:
/sys
Hi,
I forgot to add some note to this patch...
[...]
> +static ssize_t throttle_reason_status_show(struct device *dev,
> +struct device_attribute *attr,
> +char *buff)
> +{
> + struct intel_gt *gt = intel_gt_sysf
Hi Tvrtko,
> > Now tiles have their own sysfs interfaces under the gt/
> > directory. Because RC6 is a property that can be configured on a
> > tile basis, then each tile should have its own interface
> >
> > The new sysfs structure will have a similar layout for the 4 tile
> > case:
> >
> > /sy
On 17/02/2022 15:22, Alexander Usyskin wrote:
From: Tomas Winkler
GSC is a graphics system controller, it provides
a chassis controller for graphics discrete cards.
There are two MEI interfaces in GSC: HECI1 and HECI2.
Both interfaces are on the BAR0 at offsets 0x00258000 and 0x00259000.
GS
On Thu, 2022-02-17 at 13:32 +, Patchwork wrote:
Patch Details
Series: drm/i915/display/tgl+: Implement new PLL programming step (rev3)
URL:https://patchwork.freedesktop.org/series/99867/
State: failure
Details:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22296/index.html
CI
On Wed, Feb 16, 2022 at 12:02:31AM -0800, Shankar, Uma wrote:
>
>
> > -Original Message-
> > From: C, Ramalingam
> > Sent: Tuesday, February 15, 2022 11:22 AM
> > To: intel-gfx ; dri-devel > de...@lists.freedesktop.org>
> > Cc: Ville Syrjälä ; Shankar, Uma
> > ; Roper, Matthew D ;
> > D
Since it apparently caused some confusion on various websites, maybe we
should change the title of the patch to "Enable 5th port" to make it
more clear that this is only a port, not a pipe.
Also, I believe one last line that we need to add to this patch is an
intel_ddi_init() call for TC1 in the i
On 2/17/2022 1:41 AM, Tvrtko Ursulin wrote:
On 16/02/2022 18:15, Vinay Belgaumkar wrote:
SLPC unset param H2G only needs one parameter - the id of the
param.
Fixes: 025cb07bebfa ("drm/i915/guc/slpc: Cache platform frequency
limits")
How serious is this? Does it need backporting? If so:
C
On 2/17/2022 7:45 AM, Andi Shyti wrote:
Hi,
I forgot to add some note to this patch...
[...]
+static ssize_t throttle_reason_status_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buff)
+{
+
On 17/02/2022 17:04, Belgaumkar, Vinay wrote:
On 2/17/2022 1:41 AM, Tvrtko Ursulin wrote:
On 16/02/2022 18:15, Vinay Belgaumkar wrote:
SLPC unset param H2G only needs one parameter - the id of the
param.
Fixes: 025cb07bebfa ("drm/i915/guc/slpc: Cache platform frequency
limits")
How seri
> -Original Message-
> From: Juha-Pekka Heikkila
> Sent: Tuesday, February 15, 2022 6:54 AM
> To: Nanley Chery ; C, Ramalingam
>
> Cc: intel-gfx ; Chery, Nanley G
> ; Auld, Matthew ; dri-
> devel
> Subject: Re: [Intel-gfx] [PATCH v5 15/19] drm/i915/dg2: Add DG2 unified
> compression
>
== Series Details ==
Series: drm/i915: Plane/wm cleanups (rev3)
URL : https://patchwork.freedesktop.org/series/100020/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
0d7ee8c549ee drm/i915: Introduce intel_crtc_planes_update_arm()
f983e7c5abed drm/i915: Clean up SSKPD/MLTR define
== Series Details ==
Series: drm/i915: Plane/wm cleanups (rev3)
URL : https://patchwork.freedesktop.org/series/100020/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On 2022-02-17 at 08:37:47 -0800, Matt Roper wrote:
> Since it apparently caused some confusion on various websites, maybe we
> should change the title of the patch to "Enable 5th port" to make it
> more clear that this is only a port, not a pipe.
Ok sure.
>
> Also, I believe one last line that we
This was useful for early development of lmem, but it's not used
anymore, so remove it.
v2: Remove unneeded fields from struct intel_memory_region
Cc: Chris Wilson
Cc: Matthew Auld
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/Kconfig.unstable | 8 --
drivers/gpu/drm/i915/gt
On Thu, 17 Feb 2022 at 17:55, Lucas De Marchi wrote:
>
> This was useful for early development of lmem, but it's not used
> anymore, so remove it.
>
> v2: Remove unneeded fields from struct intel_memory_region
>
> Cc: Chris Wilson
> Cc: Matthew Auld
> Signed-off-by: Lucas De Marchi
Reviewed-by:
== Series Details ==
Series: drm/i915: Plane/wm cleanups (rev3)
URL : https://patchwork.freedesktop.org/series/100020/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11241 -> Patchwork_22307
Summary
---
**SUCCESS**
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