Grouping inside of the same if all the programing sequences and
workarounds of PSR2.
The order of programing changed in intel_psr_enable_source() but
it will not affect PSR2 as at this point PSR2_ENABLE is still disabled.
Cc: Jouni Högander
Signed-off-by: José Roberto de Souza
---
drivers/gpu/d
PSR2 workaround required when mode has delayed vblank.
BSpec: 52890
BSpec: 49421
Cc: Jouni Högander
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 40 ++--
drivers/gpu/drm/i915/i915_reg.h | 13 +---
2 files changed, 46 insert
On Thu, Feb 10, 2022 at 08:44:30AM -0800, Anusha Srivatsa wrote:
> DMC_DEBUGU3 changes from DG1+
This looks to be the same thing as the patch that Chuansheng Liu sent:
https://patchwork.freedesktop.org/patch/473272/?series=99942&rev=1
Matt
>
> Bspec: 49788
> Signed-off-by: Anusha Srivatsa
>
== Series Details ==
Series: Use drm_clflush* instead of clflush (rev9)
URL : https://patchwork.freedesktop.org/series/99450/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
ea63269ee004 drm: Add arch arm64 for drm_clflush_virt_range
-:40: WARNING:LINE_SPACING: Missing a blank li
== Series Details ==
Series: Use drm_clflush* instead of clflush (rev9)
URL : https://patchwork.freedesktop.org/series/99450/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
> -Original Message-
> From: Roper, Matthew D
> Sent: Thursday, February 10, 2022 10:51 AM
> To: Srivatsa, Anusha
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/dg1: Update DMC_DEBUG3 register
>
> On Thu, Feb 10, 2022 at 08:44:30AM -0800, Anusha Sriv
On 2/10/22 14:14, Paul E. McKenney wrote:
On Thu, Feb 10, 2022 at 10:13:53AM +0100, Peter Zijlstra wrote:
On Wed, Feb 09, 2022 at 04:32:58PM -0800, Namhyung Kim wrote:
On Wed, Feb 9, 2022 at 1:09 AM Peter Zijlstra wrote:
On Tue, Feb 08, 2022 at 10:41:56AM -0800, Namhyung Kim wrote:
Eventual
== Series Details ==
Series: Use drm_clflush* instead of clflush (rev9)
URL : https://patchwork.freedesktop.org/series/99450/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11214 -> Patchwork_22244
Summary
---
**SUCCE
== Series Details ==
Series: series starting with [1/2] drm/i915/display: Group PSR2 prog sequences
and workarounds
URL : https://patchwork.freedesktop.org/series/99989/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't b
== Series Details ==
Series: drm/i915: drm_i915.h cleanup
URL : https://patchwork.freedesktop.org/series/99979/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11214_full -> Patchwork_22241_full
Summary
---
**SUCCESS**
== Series Details ==
Series: series starting with [1/2] drm/i915/display: Group PSR2 prog sequences
and workarounds
URL : https://patchwork.freedesktop.org/series/99989/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11214 -> Patchwork_22245
===
On 2/10/22 03:10, Tvrtko Ursulin wrote:
On 09/02/2022 05:25, Casey Bowman wrote:
On 2/7/22 07:36, Tvrtko Ursulin wrote:
On 20/01/2022 22:16, Casey Bowman wrote:
In this RFC I would like to ask the community their thoughts
on how we can best handle splitting architecture-specific
calls.
I
== Series Details ==
Series: drm/i915/opregion: fixes and cleanups, RESEND (rev2)
URL : https://patchwork.freedesktop.org/series/99961/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11214_full -> Patchwork_22242_full
Summar
This series moves the #define wbvind_on_all_cpus logic to intel_gt.h. This way
all calls to wbvind_on_all_cpus benefit from the logic, and fixes compile
errors on non-x86 platforms.
Michael Cheng (1):
drm/i915/gt: Move wbvind_on_all_cpus #define
drivers/gpu/drm/i915/gem/i915_gem_pm.c | 7
Move wbvind_on_all_cpus to intel_gt.h. This will allow other wbind_on_all_cpus
calls to benefit from the #define logic, and prevent compiler errors
when building for non-x86 architectures.
Signed-off-by: Michael Cheng
---
drivers/gpu/drm/i915/gem/i915_gem_pm.c | 7 ---
drivers/gpu/drm/i915/g
== Series Details ==
Series: drm/i915/dg1: Update DMC_DEBUG3 register (rev2)
URL : https://patchwork.freedesktop.org/series/99942/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11214_full -> Patchwork_22243_full
Summary
---
From: John Harrison
It is possible for reset notifications to arrive for a context that is
in the process of being banned. So don't flag these as an error, just
report it as informational (because it is still useful to know that
resets are happening even if they are being ignored).
Signed-off-by
== Series Details ==
Series: Move #define wbvind_on_all_cpus
URL : https://patchwork.freedesktop.org/series/1/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
8fdf2f52d823 drm/i915/gt: Move wbvind_on_all_cpus #define
-:6: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commi
== Series Details ==
Series: Move #define wbvind_on_all_cpus
URL : https://patchwork.freedesktop.org/series/1/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Move #define wbvind_on_all_cpus
URL : https://patchwork.freedesktop.org/series/1/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11214 -> Patchwork_22246
Summary
---
**SUCCESS**
No
On Tue, Feb 08, 2022 at 02:45:10AM -0800, Lucas De Marchi wrote:
> Convert intel_guc_ads_create() and initialization to use iosys_map
> rather than plain pointer and save it in the guc struct. This will help
> with additional updates to the ads_blob after the
> creation/initialization by abstractin
On Tue, Feb 08, 2022 at 02:45:11AM -0800, Lucas De Marchi wrote:
> Add helpers on top of iosys_map_read_field() /
> iosys_map_write_field() functions so they always use the right
> arguments and make code easier to read.
>
> Cc: Matt Roper
> Cc: Thomas Hellström
> Cc: Daniel Vetter
> Cc: John H
On Tue, Feb 08, 2022 at 02:45:12AM -0800, Lucas De Marchi wrote:
> Now the map is saved during creation, so use it to initialize the
> golden context, reading from shmem and writing to either system or IO
> memory.
>
> v2: Do not use a map iterator: add an offset to keep track of
> destination
>
Registers that exist within the MCH BAR and are mirrored into the GPU's
MMIO space are a good candidate to separate out into their own header.
For reference, the mirror of the MCH BAR lives at the following
locations in the graphics MMIO space:
* Pre-gen6: 0x1 - 0x13000
* Gen6-Ge
== Series Details ==
Series: drm/i915/guc: Do not complain about stale reset notifications
URL : https://patchwork.freedesktop.org/series/2/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11214 -> Patchwork_22247
Summary
== Series Details ==
Series: Use drm_clflush* instead of clflush (rev9)
URL : https://patchwork.freedesktop.org/series/99450/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11214_full -> Patchwork_22244_full
Summary
---
== Series Details ==
Series: drm/i915: Move MCHBAR registers to their own header
URL : https://patchwork.freedesktop.org/series/8/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
312d630a44d8 drm/i915: Move MCHBAR registers to their own header
-:430: WARNING:FILE_PATH_CHANGES
== Series Details ==
Series: drm/i915: Move MCHBAR registers to their own header
URL : https://patchwork.freedesktop.org/series/8/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On Tue, Feb 08, 2022 at 02:45:13AM -0800, Lucas De Marchi wrote:
> Use iosys_map to write the policies update so access to IO and system
> memory is abstracted away.
>
> Cc: Matt Roper
> Cc: Thomas Hellström
> Cc: Daniel Vetter
> Cc: John Harrison
> Cc: Matthew Brost
> Cc: Daniele Ceraolo Spu
== Series Details ==
Series: series starting with [1/2] drm/i915/display: Group PSR2 prog sequences
and workarounds
URL : https://patchwork.freedesktop.org/series/99989/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11214_full -> Patchwork_22245_full
=
== Series Details ==
Series: drm/i915: Move MCHBAR registers to their own header
URL : https://patchwork.freedesktop.org/series/8/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11214 -> Patchwork_22248
Summary
---
From: Clint Taylor
BSPEC: 46123
v2: Address review feedback [MattR]
Cc: Matt Roper
Signed-off-by: Clint Taylor
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 5 +
drivers/gpu/drm/i915/i915_reg.h | 2 ++
2 files changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/i
== Series Details ==
Series: drm/i915/dg2: add Wa_14014947963
URL : https://patchwork.freedesktop.org/series/9/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
90de6a9c3128 drm/i915/dg2: add Wa_14014947963
-:22: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenth
== Series Details ==
Series: drm/i915/dg2: add Wa_14014947963
URL : https://patchwork.freedesktop.org/series/9/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
Current DMC_DEBUG3(_MMIO(0x101090)) address is for TGL,
it is wrong for DG1. Just like commit 5bcc95ca382e
("drm/i915/dg1: Update DMC_DEBUG register"), correct
this issue for DG1 platform to avoid wrong register
being read.
BSpec: 49788
v2: fix "not wrong" typo. (Jani)
Reviewed-by: Matt Roper
C
On Thu, Feb 10, 2022 at 04:13:42PM -0800, clinton.a.tay...@intel.com wrote:
> From: Clint Taylor
>
> BSPEC: 46123
> v2: Address review feedback [MattR]
> Cc: Matt Roper
> Signed-off-by: Clint Taylor
> ---
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 5 +
> drivers/gpu/drm/i915/i915_reg.
== Series Details ==
Series: drm/i915/dg2: add Wa_14014947963
URL : https://patchwork.freedesktop.org/series/9/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11214 -> Patchwork_22249
Summary
---
**SUCCESS**
No
== Series Details ==
Series: drm/i915/dg1: Update DMC_DEBUG3 register (rev3)
URL : https://patchwork.freedesktop.org/series/99942/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On Wed, Jan 26, 2022 at 02:48:19AM -0800, Alan Previn wrote:
- Upon the G2H Notify-Err-Capture event, parse through the
GuC Log Buffer (error-capture-region) and dynamically allocate
capture-nodes, A single node represents a single "engine-
instance-capture-dump" and contains at least 3 regist
== Series Details ==
Series: drm/i915/dg1: Update DMC_DEBUG3 register (rev3)
URL : https://patchwork.freedesktop.org/series/99942/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11214 -> Patchwork_22250
Summary
---
**
Hi all,
Today's linux-next merge of the drm-intel tree got a conflict in:
drivers/gpu/drm/i915/i915_module.c
between commit:
6387a3c4b0c4 ("drm: move the buddy allocator from i915 into common drm")
from the drm tree and commit:
24524e3f43cf ("drm/i915: move the DRIVER_* macros to i915_d
On Wed, Jan 26, 2022 at 02:48:20AM -0800, Alan Previn wrote:
Add a flags parameter through all of the coredump creation
functions. Add a bitmask flag to indicate if the top
level gpu_coredump event is triggered in response to
a GuC context reset notification.
Using that flag, ensure all coredump
In this RFC I would like to ask the community their thoughts
on how we can best handle splitting architecture-specific
calls.
I would like to address the following:
1. How do we want to split architecture calls? Different object files
per platform? Separate function calls within the same object f
Some x86 checks are unnecessary on arm64 systems, so they
are being split out to avoid being used.
We are starting the split with run_as_guest(), which has
an x86-specific usage, while on arm64, we aren't using it.
The split reflects the way the kernel currently handles
platform-specific librarie
== Series Details ==
Series: Splitting up platform-specific calls (rev2)
URL : https://patchwork.freedesktop.org/series/99126/
State : failure
== Summary ==
Applying: i915/drm: Split out x86 and arm64 functionality
.git/rebase-apply/patch:64: new blank line at EOF.
+
warning: 1 line adds white
== Series Details ==
Series: Move #define wbvind_on_all_cpus
URL : https://patchwork.freedesktop.org/series/1/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11214_full -> Patchwork_22246_full
Summary
---
**FAILUR
== Series Details ==
Series: drm/i915/guc: Do not complain about stale reset notifications
URL : https://patchwork.freedesktop.org/series/2/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11214_full -> Patchwork_22247_full
===
== Series Details ==
Series: drm/i915/dg2: add Wa_14014947963
URL : https://patchwork.freedesktop.org/series/9/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11214_full -> Patchwork_22249_full
Summary
---
**SUCCE
From: Clint Taylor
BSPEC: 46123
v2: Address review feedback [MattR]
v3: move register definition to gt_regs [MattR]
Cc: Matt Roper
Signed-off-by: Clint Taylor
---
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 3 +++
drivers/gpu/drm/i915/gt/intel_workarounds.c | 5 +
2 files changed, 8 inse
== Series Details ==
Series: drm/i915/dg2: add Wa_14014947963 (rev2)
URL : https://patchwork.freedesktop.org/series/9/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
14684d204805 drm/i915/dg2: add Wa_14014947963
-:37: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open
From: Matt Roper
DG2 is the first platform, that supports TC but not TBT.
interrupt code is updated to avoid trying to process
TBT-specific bits and registers.
Cc: Swathi Dhanavanthri
Signed-off-by: Matt Roper
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
d
On Thu, Feb 10, 2022 at 1:14 AM Peter Zijlstra wrote:
>
> On Wed, Feb 09, 2022 at 04:32:58PM -0800, Namhyung Kim wrote:
> > On Wed, Feb 9, 2022 at 1:09 AM Peter Zijlstra wrote:
> > >
> > > On Tue, Feb 08, 2022 at 10:41:56AM -0800, Namhyung Kim wrote:
> > >
> > > > Eventually I'm mostly interested
== Series Details ==
Series: drm/i915/dg2: add Wa_14014947963 (rev2)
URL : https://patchwork.freedesktop.org/series/9/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11215 -> Patchwork_22252
Summary
---
**SUCCESS*
Hi Paul,
On Thu, Feb 10, 2022 at 12:10 PM Paul E. McKenney wrote:
>
> On Thu, Feb 10, 2022 at 02:27:11PM -0500, Waiman Long wrote:
> > On 2/10/22 14:14, Paul E. McKenney wrote:
> > > On Thu, Feb 10, 2022 at 10:13:53AM +0100, Peter Zijlstra wrote:
> > > > On Wed, Feb 09, 2022 at 04:32:58PM -0800,
== Series Details ==
Series: drm/i915/dg2: Don't try to process TBT interrupts
URL : https://patchwork.freedesktop.org/series/100011/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/dg2: Don't try to process TBT interrupts
URL : https://patchwork.freedesktop.org/series/100011/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11215 -> Patchwork_22253
Summary
---
== Series Details ==
Series: drm/i915/dg2: add Wa_14014947963 (rev2)
URL : https://patchwork.freedesktop.org/series/9/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11215_full -> Patchwork_22252_full
Summary
---
== Series Details ==
Series: drm/i915/dg2: Don't try to process TBT interrupts
URL : https://patchwork.freedesktop.org/series/100011/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11215_full -> Patchwork_22253_full
Summary
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