Re: [Intel-gfx] refactor the i915 GVT support and move to the modern mdev API v2

On Thu, Nov 04, 2021 at 02:59:18PM +0200, Joonas Lahtinen wrote: > The minimal we should do is to eliminate the double underscore > prefixed functions. But I would prefer to have the symbol exports by > default so that we can enable the functionality just by loading the > module. I'm fine with exp

Re: [Intel-gfx] refactor the i915 GVT support and move to the modern mdev API v2

On Thu, Nov 04, 2021 at 02:51:28PM +, Wang, Zhi A wrote: > Is it possible to separate the refactor part from the using new mdev API > stuff? So that the design opens in the re-factor patches wouldn’t block the > process of mdev API improvement? Jason had an early patch for it, but it looks s

Re: [Intel-gfx] [PATCH] drm/i915/dsi: disable lpdt if it is not enabled

On Tue, 09 Nov 2021, William Tseng wrote: > Avoid setting LP_DATA_TRANSFER when enable_lpdt is false > > Cc: Ville Syrjala > Cc: Jani Nikula > Cc: Vandita Kulkarni > Cc: Lee Shawn C > Cc: Cooper Chiou > Signed-off-by: William Tseng > --- > drivers/gpu/drm/i915/display/icl_dsi.c | 2 ++ > 1

Re: [Intel-gfx] [PATCH] drm/i915/dsi: transmit brightness command in HS state

Thank you, Jani. Yes, it would be good to restore the flags afterwards. I will modify the patch. Regards William -Original Message- From: Jani Nikula Sent: Tuesday, November 9, 2021 3:23 PM To: Tseng, William ; intel-gfx@lists.freedesktop.org Cc: Tseng, William ; Ville Syrjala ; Kul

[Intel-gfx] [PATCH v2] drm/i915/dsi: transmit brightness command in HS state

In Video Mode, if DSI transcoder is set to transmit packets in LP Escape mode, screen flickering would be obseved when brightness commands are continuously and quickly transmitted to a panel. The problem may be resolved by changing the mode to transmit packets from Low Power to HS. Cc: Ville Syrj

Re: [Intel-gfx] [PATCH] drm/i915/dsi: disable lpdt if it is not enabled

Thank you for your consideration. It's my pleasure. Regards William -Original Message- From: Jani Nikula Sent: Tuesday, November 9, 2021 4:05 PM To: Tseng, William ; intel-gfx@lists.freedesktop.org Cc: Tseng, William ; Ville Syrjala ; Kulkarni, Vandita ; Lee, Shawn C ; Chiou, Cooper

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/dsi: transmit brightness command in HS state

== Series Details == Series: drm/i915/dsi: transmit brightness command in HS state URL : https://patchwork.freedesktop.org/series/96702/ State : success == Summary == CI Bug Log - changes from CI_DRM_10855_full -> Patchwork_21542_full Summa

Re: [Intel-gfx] linux-next: build failure after merge of the drm-misc tree

On Tue, Nov 09, 2021 at 09:40:08AM +0200, Jani Nikula wrote: > On Sat, 06 Nov 2021, Stephen Rothwell wrote: > > Hi Jani, > > > > On Fri, 05 Nov 2021 13:03:43 +0200 Jani Nikula > > wrote: > >> > >> I probably should have pushed c4f08d7246a5 ("drm/locking: fix > >> __stack_depot_* name conflict")

Re: [Intel-gfx] [PATCH 1/3] i915/gvt: seperate tracked MMIO table from handlers.c

On Tue, Nov 09, 2021 at 09:00:39AM +0200, Jani Nikula wrote: > On Mon, 08 Nov 2021, Zhi Wang wrote: > > From: Zhi Wang > > > > To support the new mdev interfaces and the re-factor patches from > > Christoph, which moves the GVT-g code into a dedicated module, the GVT-g > > MMIO snapshot still nee

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dsi: transmit brightness command in HS state (rev2)

== Series Details == Series: drm/i915/dsi: transmit brightness command in HS state (rev2) URL : https://patchwork.freedesktop.org/series/96702/ State : success == Summary == CI Bug Log - changes from CI_DRM_10856 -> Patchwork_21543 Summary

Re: [Intel-gfx] [PATCH 1/3] i915/gvt: seperate tracked MMIO table from handlers.c

On Tue, 09 Nov 2021, "Wang, Zhi A" wrote: > On 11/9/2021 9:00 AM, Jani Nikula wrote: >> On Mon, 08 Nov 2021, Zhi Wang wrote: >>> From: Zhi Wang >>> >>> To support the new mdev interfaces and the re-factor patches from >>> Christoph, which moves the GVT-g code into a dedicated module, the GVT-g >

Re: [Intel-gfx] [PATCH] drm/i915/psr: Fix PSR2 handling of multiplanar format

On Mon, 2021-11-08 at 13:38 -0800, José Roberto de Souza wrote: > When a plane with a multiplanar format is added to the state by > drm_atomic_add_affected_planes(), only the UV plane is > added, so a intel_atomic_get_new_plane_state() call to get the Y > plane state can return a null pointer. I d

Re: [Intel-gfx] [PATCH 1/3] i915/gvt: seperate tracked MMIO table from handlers.c

On Tue, Nov 09, 2021 at 12:20:24PM +0200, Jani Nikula wrote: > Having the functions defined in a single .c file and called (perhaps via > just one or two entry points) sounds much better than including code. > > Perhaps you could pass in the function to call (new_mmio_info) as a > parameter in dif

Re: [Intel-gfx] [PATCH v2] drm/i915/dsi: transmit brightness command in HS state

On Tue, 09 Nov 2021, William Tseng wrote: > In Video Mode, if DSI transcoder is set to transmit packets > in LP Escape mode, screen flickering would be obseved when > brightness commands are continuously and quickly transmitted > to a panel. > > The problem may be resolved by changing the mode to

Re: [Intel-gfx] [PATCH 1/3] i915/gvt: seperate tracked MMIO table from handlers.c

On Tue, Nov 09, 2021 at 10:51:27AM +, Wang, Zhi A wrote: > Can you elaborate more about this? We need the hash query from the table > ASAP when the hypervisor trapped a mmio access. It's a critical path and > we tried different data structure in the kernel and the hash table gives > the best

Re: [Intel-gfx] [PATCH 1/3] i915/gvt: seperate tracked MMIO table from handlers.c

On 11/9/2021 12:58 PM, h...@lst.de wrote: > On Tue, Nov 09, 2021 at 10:51:27AM +, Wang, Zhi A wrote: >> Can you elaborate more about this? We need the hash query from the table >> ASAP when the hypervisor trapped a mmio access. It's a critical path and >> we tried different data structure in th

Re: [Intel-gfx] linux-next: build failure after merge of the drm-misc tree

On Tue, 09 Nov 2021, Daniel Vetter wrote: > On Tue, Nov 09, 2021 at 09:40:08AM +0200, Jani Nikula wrote: >> On Sat, 06 Nov 2021, Stephen Rothwell wrote: >> > Hi Jani, >> > >> > On Fri, 05 Nov 2021 13:03:43 +0200 Jani Nikula >> > wrote: >> >> >> >> I probably should have pushed c4f08d7246a5 ("dr

[Intel-gfx] [PATCH] drm/i915: pin: delete duplicate check in intel_pin_and_fence_fb_obj()

The "ret" variable is checked on the previous line so we know it's zero. No need to check again. Signed-off-by: Dan Carpenter --- drivers/gpu/drm/i915/display/intel_fb_pin.c | 12 +--- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_fb_pi

Re: [Intel-gfx] [PATCH] i915/selftest: Disable irq to calc eng timestamp

A couple of comments below, after addressing those this is: Reviewed-by: Badal Nilawar On 26-10-2021 19:10, Anshuman Gupta wrote: gt_pm selftest calculates engine ticks cycles and wall time cycles by delta of respective engine elapsed TIMESTAMP and ktime for period of 1000us. It compares the en

[Intel-gfx] [PATCH] Revert "drm/i915/tgl/dsi: Gate the ddi clocks after pll mapping"

This reverts commit 991d9557b0c457fb92bc49ddde24a7d9ce6144a8. The Bspec was updated recently with the pll ungate sequence similar to that of icl dsi enable sequence. Hence reverting. Bspec:49187 Signed-off-by: Vandita Kulkarni --- drivers/gpu/drm/i915/display/icl_dsi.c | 10 ++ 1 file c

Re: [Intel-gfx] [V2 4/4] drm/i915/dsi: Ungate clock before enabling the phy

> -Original Message- > From: Intel-gfx On Behalf Of > Kulkarni, Vandita > Sent: Tuesday, November 2, 2021 5:13 PM > To: Nikula, Jani ; intel-gfx@lists.freedesktop.org > Subject: Re: [Intel-gfx] [V2 4/4] drm/i915/dsi: Ungate clock before enabling > the > phy > > > -Original Message---

[Intel-gfx] [PATCH] drm/i915: Use per device iommu check

From: Tvrtko Ursulin On igfx + dgfx setups, it appears that intel_iommu=igfx_off option only disables the igfx iommu. Stop relying on global intel_iommu_gfx_mapped and probe presence of iommu domain per device to accurately reflect its status. Signed-off-by: Tvrtko Ursulin Cc: Lu Baolu --- Bao

[Intel-gfx] [PATCH] drm/i915: Skip error capture when wedged on init

From: Tvrtko Ursulin Trying to capture uninitialised engines when we wedged on init ends in tears. Skip that together with uC capture, since failure to initialise the latter can actually be one of the reasons for wedging on init. Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_gpu_

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/dsi: transmit brightness command in HS state (rev2)

== Series Details == Series: drm/i915/dsi: transmit brightness command in HS state (rev2) URL : https://patchwork.freedesktop.org/series/96702/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10856_full -> Patchwork_21543_full

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: pin: delete duplicate check in intel_pin_and_fence_fb_obj()

== Series Details == Series: drm/i915: pin: delete duplicate check in intel_pin_and_fence_fb_obj() URL : https://patchwork.freedesktop.org/series/96712/ State : success == Summary == CI Bug Log - changes from CI_DRM_10857 -> Patchwork_21544

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for Some fixes in HDMI2.1 PCON FRL configuration (rev2)

Hi Lakshmi, Seems like the below issue: * igt@gem_exec_endless@dispatch@vcs1: * shard-tglb: PASS -> INCOMPLETE

[Intel-gfx] ✓ Fi.CI.BAT: success for Revert "drm/i915/tgl/dsi: Gate the ddi clocks after pll mapping"

== Series Details == Series: Revert "drm/i915/tgl/dsi: Gate the ddi clocks after pll mapping" URL : https://patchwork.freedesktop.org/series/96714/ State : success == Summary == CI Bug Log - changes from CI_DRM_10857 -> Patchwork_21545 Summ

[Intel-gfx] [PATCH 2/3] i915/gvt: save the initial HW state snapshot in i915.

From: Zhi Wang Save the inital HW state snapshot in i915 so that the rest code of GVT-g can be moved into a dedicated module while it can still get a clean initial HW state saved at the correct time during the initialization of i915. The futhrer vGPU created by GVT-g will use this HW state as the

[Intel-gfx] [PATCH 1/3] i915/gvt: seperate tracked MMIO table from handlers.c

From: Zhi Wang To support the new mdev interfaces and the re-factor patches from Christoph, which moves the GVT-g code into a dedicated module, the GVT-g MMIO snapshot still needs to be saved in i915 so that the inital clean HW state can be used for the further vGPU. Seperate the tracked MMIO tab

[Intel-gfx] [PATCH 3/3] i915/gvt: Use the initial HW state snapshot saved in i915

From: Zhi Wang The code of saving initial HW state snapshot has been moved into i915. Let the GVT-g core logic use that snapshot. Cc: Joonas Lahtinen Cc: Jani Nikula Cc: Rodrigo Vivi Cc: Zhenyu Wang Cc: Zhi Wang Cc: Christoph Hellwig Cc: Jason Gunthorpe Signed-off-by: Zhi Wang --- drive

Re: [Intel-gfx] [PATCH] Revert "drm/i915/tgl/dsi: Gate the ddi clocks after pll mapping"

On Tue, 09 Nov 2021, Vandita Kulkarni wrote: > This reverts commit 991d9557b0c457fb92bc49ddde24a7d9ce6144a8. > The Bspec was updated recently with the pll ungate sequence > similar to that of icl dsi enable sequence. > Hence reverting. > > Bspec:49187 Please add a space after : in the Bspec tag,

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Use per device iommu check

== Series Details == Series: drm/i915: Use per device iommu check URL : https://patchwork.freedesktop.org/series/96715/ State : success == Summary == CI Bug Log - changes from CI_DRM_10857 -> Patchwork_21546 Summary --- **SUCCESS**

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: pin: delete duplicate check in intel_pin_and_fence_fb_obj()

== Series Details == Series: drm/i915: pin: delete duplicate check in intel_pin_and_fence_fb_obj() URL : https://patchwork.freedesktop.org/series/96712/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10857_full -> Patchwork_21544_full ===

[Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [1/3] i915/gvt: seperate tracked MMIO table from handlers.c

== Series Details == Series: series starting with [1/3] i915/gvt: seperate tracked MMIO table from handlers.c URL : https://patchwork.freedesktop.org/series/96704/ State : failure == Summary == Applying: i915/gvt: seperate tracked MMIO table from handlers.c error: sha1 information is lacking

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Skip error capture when wedged on init

== Series Details == Series: drm/i915: Skip error capture when wedged on init URL : https://patchwork.freedesktop.org/series/96718/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10857 -> Patchwork_21547 Summary --- *

[Intel-gfx] ✗ Fi.CI.IGT: failure for Revert "drm/i915/tgl/dsi: Gate the ddi clocks after pll mapping"

== Series Details == Series: Revert "drm/i915/tgl/dsi: Gate the ddi clocks after pll mapping" URL : https://patchwork.freedesktop.org/series/96714/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10857_full -> Patchwork_21545_full

[Intel-gfx] ✓ Fi.CI.IGT: success for Some fixes in HDMI2.1 PCON FRL configuration (rev2)

== Series Details == Series: Some fixes in HDMI2.1 PCON FRL configuration (rev2) URL : https://patchwork.freedesktop.org/series/96411/ State : success == Summary == CI Bug Log - changes from CI_DRM_10853_full -> Patchwork_21531_full Summary

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for Some fixes in HDMI2.1 PCON FRL configuration (rev2)

Filed this issue and re-reported. https://gitlab.freedesktop.org/drm/intel/-/issues/4477 igt@gem_exec_endless@dispatch@vcs1 - incomplete - Per-test timeout exceeded. Killing the current test with SIGQUIT. RIP: 0010:cpuidle_enter_state Thanks, Lakshmi. From: Nautiyal, Ankit K Sent: Tuesday, Nove

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Use per device iommu check

== Series Details == Series: drm/i915: Use per device iommu check URL : https://patchwork.freedesktop.org/series/96715/ State : success == Summary == CI Bug Log - changes from CI_DRM_10857_full -> Patchwork_21546_full Summary --- **S

Re: [Intel-gfx] [PATCH] drm/i915: Use per device iommu check

On Tue, Nov 09, 2021 at 12:17:59PM +, Tvrtko Ursulin wrote: From: Tvrtko Ursulin On igfx + dgfx setups, it appears that intel_iommu=igfx_off option only disables the igfx iommu. Stop relying on global intel_iommu_gfx_mapped and probe presence of iommu domain per device to accurately reflect

Re: [Intel-gfx] [PATCH] drm/i915: Use per device iommu check

On 09/11/2021 17:19, Lucas De Marchi wrote: On Tue, Nov 09, 2021 at 12:17:59PM +, Tvrtko Ursulin wrote: From: Tvrtko Ursulin On igfx + dgfx setups, it appears that intel_iommu=igfx_off option only disables the igfx iommu. Stop relying on global intel_iommu_gfx_mapped and probe presence o

Re: [Intel-gfx] [PATCH] drm/i915/psr: Fix PSR2 handling of multiplanar format

On Tue, 2021-11-09 at 10:31 +, Hogander, Jouni wrote: > On Mon, 2021-11-08 at 13:38 -0800, José Roberto de Souza wrote: > > When a plane with a multiplanar format is added to the state by > > drm_atomic_add_affected_planes(), only the UV plane is > > added, so a intel_atomic_get_new_plane_state

Re: [Intel-gfx] [PATCH v3] drm/i915/display: Exit PSR when doing async flips

On Fri, 2021-11-05 at 19:55 +0200, Ville Syrjälä wrote: > On Fri, Nov 05, 2021 at 05:44:21PM +, Souza, Jose wrote: > > On Fri, 2021-11-05 at 15:46 +0200, Ville Syrjälä wrote: > > > On Thu, Nov 04, 2021 at 05:56:52PM +, Souza, Jose wrote: > > > > On Thu, 2021-11-04 at 16:10 +0200, Ville Syrj

Re: [Intel-gfx] [PATCH V2] drm/i915/gt: Hold RPM wakelock during PXP suspend

On 11/8/2021 10:32 PM, Jani Nikula wrote: On Tue, 09 Nov 2021, "Surendrakumar Upadhyay, TejaskumarX" wrote: -Original Message- From: Jani Nikula Sent: 09 November 2021 00:37 To: Surendrakumar Upadhyay, TejaskumarX ; intel- g...@lists.freedesktop.org Subject: Re: [Intel-gfx] [PAT

Re: [Intel-gfx] [RFC v2 05/22] drm/i915/xelpd: Define Degamma Lut range struct for HDR planes

On Tue, Nov 09, 2021 at 03:19:47PM -0500, Harry Wentland wrote: > On 2021-11-05 08:59, Ville Syrjälä wrote: > > On Wed, Nov 03, 2021 at 11:10:37AM -0400, Harry Wentland wrote: > >> > >> > >> On 2021-09-06 17:38, Uma Shankar wrote: > >>> Define the structure with XE_LPD degamma lut ranges. HDR and S

Re: [Intel-gfx] [RFC v2 02/22] drm: Add Enhanced Gamma and color lut range attributes

On Tue, Nov 09, 2021 at 03:47:58PM -0500, Harry Wentland wrote: > On 2021-11-08 04:54, Pekka Paalanen wrote: > > On Thu, 4 Nov 2021 12:27:56 -0400 > > Harry Wentland wrote: > > > >> On 2021-11-04 04:38, Pekka Paalanen wrote: > >>> On Wed, 3 Nov 2021 11:08:13 -0400 > >>> Harry Wentland wrote: > >

Re: [Intel-gfx] [PATCH 4/4] drm/i915: Use unlocked register accesses for LUT loads

On Mon, Nov 08, 2021 at 08:59:31PM +, Shankar, Uma wrote: > > > > -Original Message- > > From: Intel-gfx On Behalf Of > > Ville Syrjala > > Sent: Thursday, October 21, 2021 4:04 AM > > To: intel-gfx@lists.freedesktop.org > > Subject: [Intel-gfx] [PATCH 4/4] drm/i915: Use unlocked re

Re: [Intel-gfx] [PATCH] drm/i915: pin: delete duplicate check in intel_pin_and_fence_fb_obj()

On Tue, Nov 09, 2021 at 02:48:50PM +0300, Dan Carpenter wrote: > The "ret" variable is checked on the previous line so we know it's > zero. No need to check again. > > Signed-off-by: Dan Carpenter Reviewed-by: Rodrigo Vivi and pushed. thanks for the patch > --- > drivers/gpu/drm/i915/displa

[Intel-gfx] [PULL] drm-intel-next-fixes

Hi Dave and Daniel, Here goes drm-intel-next-fixes-2021-11-09: Couple Reverts, build fix, couple virtualization fixes, blank screen and other display rates fixes, and more. Four patches targeting stable in here. Display Fixes: - DP rates related fixes (Imre, Jani) - A Revert on disaling dual eD

Re: [Intel-gfx] [PATCH v2] drm/i915/dsi: transmit brightness command in HS state

Thanks, Jani. That does not restore the mode flags perfectly. I will revise the patch. Regards William -Original Message- From: Jani Nikula Sent: Tuesday, November 9, 2021 6:41 PM To: Tseng, William ; intel-gfx@lists.freedesktop.org Cc: Tseng, William ; Ville Syrjala ; Kulkarni, Van

[Intel-gfx] [PATCH v3] drm/i915/dsi: transmit brightness command in HS state

In Video Mode, if DSI transcoder is set to transmit packets in LP Escape mode, screen flickering would be obseved when brightness commands are continuously and quickly transmitted to a panel. The problem may be resolved by changing the mode to transmit packets from Low Power to HS. Cc: Ville Syrj

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/dsi: transmit brightness command in HS state (rev3)

== Series Details == Series: drm/i915/dsi: transmit brightness command in HS state (rev3) URL : https://patchwork.freedesktop.org/series/96702/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10859 -> Patchwork_21549 Summary

[Intel-gfx] [PATCH 0/1] drm/i915/rpm: Enable runtime pm autosuspend by default

Enable runtime pm autosuspend by default for all Gen12 and Gen12+ platforms Tilak Tangudu (1): drm/i915/rpm: Enable runtime pm autosuspend by default drivers/gpu/drm/i915/intel_runtime_pm.c | 4 1 file changed, 4 insertions(+) -- 2.25.1

[Intel-gfx] [PATCH 1/1] drm/i915/rpm: Enable runtime pm autosuspend by default

Enable runtime pm autosuspend by default for gen12 and later versions. Signed-off-by: Tilak Tangudu --- drivers/gpu/drm/i915/intel_runtime_pm.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index eaf7688

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/rpm: Enable runtime pm autosuspend by default

== Series Details == Series: drm/i915/rpm: Enable runtime pm autosuspend by default URL : https://patchwork.freedesktop.org/series/96741/ State : success == Summary == CI Bug Log - changes from CI_DRM_10859 -> Patchwork_21550 Summary --

Re: [Intel-gfx] [PATCH] drm/i915: Use per device iommu check

Hi Tvrtko, On 2021/11/9 20:17, Tvrtko Ursulin wrote: From: Tvrtko Ursulin On igfx + dgfx setups, it appears that intel_iommu=igfx_off option only disables the igfx iommu. Stop relying on global intel_iommu_gfx_mapped and probe presence of iommu domain per device to accurately reflect its status

Re: [Intel-gfx] [PATCH] drm/i915: Use per device iommu check

On 2021/11/10 1:35, Tvrtko Ursulin wrote: On 09/11/2021 17:19, Lucas De Marchi wrote: On Tue, Nov 09, 2021 at 12:17:59PM +, Tvrtko Ursulin wrote: From: Tvrtko Ursulin On igfx + dgfx setups, it appears that intel_iommu=igfx_off option only disables the igfx iommu. Stop relying on global i

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/rpm: Enable runtime pm autosuspend by default

== Series Details == Series: drm/i915/rpm: Enable runtime pm autosuspend by default URL : https://patchwork.freedesktop.org/series/96741/ State : success == Summary == CI Bug Log - changes from CI_DRM_10859_full -> Patchwork_21550_full Summ

[Intel-gfx] [PATCH v3 0/2] Some fixes in HDMI2.1 PCON FRL configuration

Some optimizations in HDMI2.1 PCON configuration and avoiding resetting the config DPCD. v2: Addressed comments from Uma. v3: Rebased. Ankit Nautiyal (2): drm/i915/dp: Optimize the FRL configuration for HDMI2.1 PCON drm/i915/dp: For PCON TMDS mode set only the relavant bits in config DPCD

[Intel-gfx] [PATCH v3 1/2] drm/i915/dp: Optimize the FRL configuration for HDMI2.1 PCON

Currently the HDMI2.1 PCON's frl link config DPCD registers are reset and configured even if they are already configured. Also the HDMI Link Mode does not settle to FRL MODE immediately after HDMI Link Status is active. This patch: -Checks if the PCON is already configured for FRL. -Include HDMI L

[Intel-gfx] [PATCH v3 2/2] drm/i915/dp: For PCON TMDS mode set only the relavant bits in config DPCD

Currently we reset the whole PCON linkConfig DPCD to set the TMDS mode. This also resets the Source control bit and HDMI link enable bit and goes to autonomous mode of operation, which is seen to spoil the PCONs internal state. This patch avoids resetting the PCON link config register and sets onl