[Intel-gfx] ✗ Fi.CI.IGT: failure for Bump DMC version on ADLP to v2.11

== Series Details == Series: Bump DMC version on ADLP to v2.11 URL : https://patchwork.freedesktop.org/series/93081/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10406_full -> Patchwork_20721_full Summary --- **FAIL

Re: [Intel-gfx] [PATCH 03/33] drm/i915: Hold reference to intel_context over life of i915_request

On Tue, Jul 27, 2021 at 2:06 AM Matthew Brost wrote: > Hold a reference to the intel_context over life of an i915_request. > Without this an i915_request can exist after the context has been > destroyed (e.g. request retired, context closed, but user space holds a > reference to the request from a

[Intel-gfx] [PATCH] drm/i915/gt: Fix a lockdep warning with disable interrupts

When disable local interrupt irq of CPU hardware, some spin_lock are called by inside signal_irq_work(), intel_breadcrumbs_disarm_irq() and intel_breadcrumbs_arm_irq(). RT complains about might sleep inside interrupt disable by spin_lock, so switch spin_lock to spin_lock_irqsave with the shutdown

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/gt: Fix a lockdep warning with disable interrupts

== Series Details == Series: drm/i915/gt: Fix a lockdep warning with disable interrupts URL : https://patchwork.freedesktop.org/series/93100/ State : failure == Summary == Applying: drm/i915/gt: Fix a lockdep warning with disable interrupts Using index info to reconstruct a base tree... M

[Intel-gfx] [PATCH i-g-t v2 01/11] lib/i915/gem_mman: add FIXED mmap mode

We need this for discrete. Signed-off-by: Matthew Auld Cc: Maarten Lankhorst Cc: Ashutosh Dixit Cc: Daniel Vetter Cc: Ramalingam C --- lib/i915/gem_mman.c | 37 + lib/i915/gem_mman.h | 4 2 files changed, 41 insertions(+) diff --git a/lib/i915/gem_m

[Intel-gfx] [PATCH i-g-t v2 02/11] lib/i915/gem_mman: add fixed mode to mmap__device_coherent

On discrete we need to fallback to this mode. Signed-off-by: Matthew Auld Cc: Maarten Lankhorst Cc: Ashutosh Dixit Cc: Daniel Vetter Cc: Ramalingam C --- lib/i915/gem_mman.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c index

[Intel-gfx] [PATCH i-g-t v2 03/11] lib/i915/gem_mman: add fixed mode to mmap__cpu_coherent

On discrete we only support the new fixed mode. Signed-off-by: Matthew Auld Cc: Maarten Lankhorst Cc: Ashutosh Dixit Cc: Daniel Vetter Cc: Ramalingam C --- lib/i915/gem_mman.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c index 222e8896..337d

[Intel-gfx] [PATCH i-g-t v2 04/11] lib/i915/gem_mman: add fixed mode to gem_mmap__cpu

On discrete we only support the new fixed mode. Signed-off-by: Matthew Auld Cc: Maarten Lankhorst Cc: Ashutosh Dixit Cc: Daniel Vetter Cc: Ramalingam C --- lib/i915/gem_mman.c | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c

[Intel-gfx] [PATCH i-g-t v2 05/11] lib/i915/gem_mman: update mmap_offset_types with FIXED

We need to also iterate the fixed mode in the tests which rely on this. Signed-off-by: Matthew Auld Cc: Maarten Lankhorst Cc: Ashutosh Dixit Cc: Daniel Vetter Cc: Ramalingam C --- lib/i915/gem_mman.c | 1 + 1 file changed, 1 insertion(+) diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.

[Intel-gfx] [PATCH i-g-t v2 06/11] lib/ioctl_wrappers: update mmap_{read, write} for discrete

We can no longer just call get_caching or set_domain, and the mmap mode must be FIXED. This should bring back gem_exec_basic and a few others in CI on DG1. Signed-off-by: Matthew Auld Cc: Maarten Lankhorst Cc: Ashutosh Dixit Cc: Daniel Vetter Cc: Ramalingam C --- lib/ioctl_wrappers.c | 25 ++

[Intel-gfx] [PATCH i-g-t v2 07/11] lib/intel_bufops: update mmap_{read, write} for discrete

On discrete we can no longer call get_caching or set_domain, and the mmap mode must be FIXED. Signed-off-by: Matthew Auld Cc: Maarten Lankhorst Cc: Ashutosh Dixit Cc: Daniel Vetter Cc: Ramalingam C --- lib/intel_bufops.c | 25 +++-- 1 file changed, 23 insertions(+), 2 del

[Intel-gfx] [PATCH i-g-t v2 08/11] lib/ioctl_wrappers: update set_domain for discrete

On discrete set_domain is now gone, instead we just need to add the wait. Signed-off-by: Matthew Auld Cc: Maarten Lankhorst Cc: Ashutosh Dixit Cc: Daniel Vetter Cc: Ramalingam C --- lib/ioctl_wrappers.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/lib/ioctl_wrapp

[Intel-gfx] [PATCH i-g-t v2 09/11] tests/i915/module_load: update for discrete

The set_caching ioctl is gone for discrete, and now just returns -ENODEV. Update the gem_sanitycheck to account for that. After this we should be back to just having the breakage caused by missing reloc support for the reload testcase. Signed-off-by: Matthew Auld Cc: Maarten Lankhorst Cc: Ashuto

[Intel-gfx] [PATCH i-g-t v2 10/11] lib/i915/gem_mman: add helper query for has_device_coherent

Might be useful in some tests, where we are not explicitly testing WC maps, but rather just require something that is "device coherent", which should also play nice on discrete platforms. Signed-off-by: Matthew Auld Cc: Maarten Lankhorst Cc: Ashutosh Dixit Cc: Daniel Vetter Cc: Ramalingam C -

[Intel-gfx] [PATCH i-g-t v2 11/11] tests/i915/gem_exec_fence: use device_coherent mmap

We lost explicit WC mmaps on discrete, where we now only support FIXED, however such mappings should be device coherent. In gem_exec_fence it looks like we can just use mmap__device_coherent, which should also work on discrete platforms, while still using an explicit WC mmap on integrated platforms

Re: [Intel-gfx] [Linaro-mm-sig] [PATCH v4 03/18] drm/sched: Add dependency tracking

On Wed, Jul 28, 2021 at 1:29 PM Christian König wrote: > Am 27.07.21 um 13:09 schrieb Daniel Vetter: > > Adding a few more people to this bikeshed. > > > > On Mon, Jul 12, 2021 at 10:02 PM Daniel Vetter > > wrote: > > > >> @@ -349,6 +367,13 @@ int drm_sched_job_init(struct drm_sched_job *job, >

[Intel-gfx] [PATCH 1/3] drm/i915/dg1: Adjust the AUDIO power domain

DG1 and XE_PLD platforms has Audio MMIO/VERBS lies in PG0 power well. Adjusting the power domain accordingly to POWER_DOMAIN_AUDIO_VERBS for audio detection and POWER_DOMAIN_AUDIO for audio playback. v1: Changes since RFC - changed power domain names. [Imre] - Removed TC{3,6}, AUX_USBC{3,6} and TB

Re: [Intel-gfx] [Linaro-mm-sig] [PATCH v4 03/18] drm/sched: Add dependency tracking

Am 27.07.21 um 13:09 schrieb Daniel Vetter: Adding a few more people to this bikeshed. On Mon, Jul 12, 2021 at 10:02 PM Daniel Vetter wrote: @@ -349,6 +367,13 @@ int drm_sched_job_init(struct drm_sched_job *job, struct drm_sched_entity *entity,

Re: [Intel-gfx] [PATCH v2 2/3] drm: clarify usage of drm leases

On 27/7/21 9:04 pm, Daniel Vetter wrote: On Sat, Jul 24, 2021 at 07:18:23PM +0800, Desmond Cheong Zhi Xi wrote: We make the following changes to the documentation of drm leases to make it easier to reason about their usage. In particular, we clarify the lifetime and locking rules of lease fields

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for lpsp with hdmi/dp outputs (rev2)

== Series Details == Series: lpsp with hdmi/dp outputs (rev2) URL : https://patchwork.freedesktop.org/series/92108/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. - +drivers/gpu/drm/i915/display/i

[Intel-gfx] [PULL] drm-misc-fixes

Hi Dave and Daniel, here's this week's PR for drm-misc-fixes. Besides the patches, it contains a backmerge of drm-fixes. Best regards Thomas drm-misc-fixes-2021-07-28: Short summary of fixes pull: * panel: Fix bpc for ytc700tlag_05_201c * ttm: debugfs init fixes The following changes since co

[Intel-gfx] ✓ Fi.CI.BAT: success for lpsp with hdmi/dp outputs (rev2)

== Series Details == Series: lpsp with hdmi/dp outputs (rev2) URL : https://patchwork.freedesktop.org/series/92108/ State : success == Summary == CI Bug Log - changes from CI_DRM_10410 -> Patchwork_20723 Summary --- **SUCCESS** No

Re: [Intel-gfx] [PATCH 1/3] drm/i915/dg1: Adjust the AUDIO power domain

On Wed, Jul 28, 2021 at 05:22:16PM +0530, Anshuman Gupta wrote: > DG1 and XE_PLD platforms has Audio MMIO/VERBS lies in PG0 power > well. Adjusting the power domain accordingly to > POWER_DOMAIN_AUDIO_VERBS for audio detection and POWER_DOMAIN_AUDIO > for audio playback. > > v1: Changes since RFC

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/adlp: Add workaround to disable CMTG clock gating

On Tue, Jul 27, 2021 at 10:51:22PM +, Patchwork wrote: > == Series Details == > > Series: drm/i915/adlp: Add workaround to disable CMTG clock gating > URL : https://patchwork.freedesktop.org/series/93067/ > State : failure Thanks for the review pushed to -din with the checkpatch errors fixe

Re: [Intel-gfx] refactor the i915 GVT support

Hi Jason: I guess those APIs you were talking about are KVM-only. For other hypervisors, e.g. Xen, ARCN cannot use the APIs you mentioned. Not sure if you have already noticed that VFIO is KVM-only right now. GVT-g is designed for many hypervisors not only KVM. In the design, we implemented an

Re: [Intel-gfx] refactor the i915 GVT support

A: http://en.wikipedia.org/wiki/Top_post Q: Were do I find info about this thing called top-posting? A: Because it messes up the order in which people normally read text. Q: Why is top-posting such a bad thing? A: Top-posting. Q: What is the most annoying thing in e-mail? A: No. Q: Should I includ

Re: [Intel-gfx] [PATCH 1/3] drm/i915/dg1: Adjust the AUDIO power domain

> -Original Message- > From: Deak, Imre > Sent: Wednesday, July 28, 2021 7:02 PM > To: Gupta, Anshuman > Cc: intel-gfx@lists.freedesktop.org; Ville Syrjälä > ; > Kai Vehmanen ; Shankar, Uma > > Subject: Re: [PATCH 1/3] drm/i915/dg1: Adjust the AUDIO power domain > > On Wed, Jul 28,

[Intel-gfx] [PATCH] drm/i915: Use Transparent Hugepages when IOMMU is enabled

From: Tvrtko Ursulin Usage of Transparent Hugepages was disabled in 9987da4b5dcf ("drm/i915: Disable THP until we have a GPU read BW W/A"), but since it appears majority of performance regressions reported with an enabled IOMMU can be almost eliminated by turning them on, lets do that by adding a

Re: [Intel-gfx] [PATCH] drm/i915/userptr: Probe existence of backing struct pages upon creation

On Mon, 26 Jul 2021 at 17:10, Tvrtko Ursulin wrote: > > > On 26/07/2021 16:14, Jason Ekstrand wrote: > > On Mon, Jul 26, 2021 at 3:31 AM Maarten Lankhorst > > wrote: > >> > >> Op 23-07-2021 om 13:34 schreef Matthew Auld: > >>> From: Chris Wilson > >>> > >>> Jason Ekstrand requested a more effici

Re: [Intel-gfx] [RESEND PATCH v6 03/14] drm/i915/utils: Replace dev_printk with drm helpers

On Wed, Jul 21, 2021 at 1:55 PM Sean Paul wrote: > > From: Sean Paul > > Use drm logging helpers to add support for the upcoming tracefs > implementation. > > Signed-off-by: Sean Paul > Link: > https://patchwork.freedesktop.org/patch/msgid/20200608210505.48519-4-s...@poorly.run > #v5 > > Chang

Re: [Intel-gfx] [PATCH 1/3] drm/i915/dg1: Adjust the AUDIO power domain

On Wed, Jul 28, 2021 at 04:59:26PM +0300, Gupta, Anshuman wrote: > > > > -Original Message- > > From: Deak, Imre > > Sent: Wednesday, July 28, 2021 7:02 PM > > To: Gupta, Anshuman > > Cc: intel-gfx@lists.freedesktop.org; Ville Syrjälä > > ; > > Kai Vehmanen ; Shankar, Uma > > > > Subj

Re: [Intel-gfx] [PATCH 07/10] drm/i915/bios: Enable parse of two DSI panels data

On Wed, Jul 21, 2021 at 10:43:35PM -0700, José Roberto de Souza wrote: > Continuing the conversion from single integrated VBT data to two, now > handling DSI data. > > Cc: Ville Syrjälä > Cc: Jani Nikula > Signed-off-by: José Roberto de Souza Reviewed-by: Matt Atwood > --- > drivers/gpu/drm/i

Re: [Intel-gfx] [Linaro-mm-sig] [PATCH v4 03/18] drm/sched: Add dependency tracking

On 07/28, Daniel Vetter wrote: > On Wed, Jul 28, 2021 at 1:29 PM Christian König > wrote: > > Am 27.07.21 um 13:09 schrieb Daniel Vetter: > > > Adding a few more people to this bikeshed. > > > > > > On Mon, Jul 12, 2021 at 10:02 PM Daniel Vetter > > > wrote: > > > > > >> @@ -349,6 +367,13 @@ int

Re: [Intel-gfx] [PATCH 08/10] drm/i915/bios: Nuke panel_type

On Wed, Jul 21, 2021 at 10:43:36PM -0700, José Roberto de Souza wrote: > All the users was converted now we can drop it. > > Cc: Jani Nikula > Cc: Ville Syrjälä > Signed-off-by: José Roberto de Souza Reviewed-by: Matt Atwood > --- > drivers/gpu/drm/i915/display/intel_bios.c | 36 -

Re: [Intel-gfx] [PATCH 09/10] drm/i915/bios: Only use opregion panel index for display ver 8 and older

On Wed, Jul 21, 2021 at 10:43:37PM -0700, José Roberto de Souza wrote: > On newer platform this opregion call always fails, also it do not > support multiple panels so dropping it. > > Cc: Ville Syrjälä > Cc: Jani Nikula > Signed-off-by: José Roberto de Souza Reviewed-by: Matt Atwood > --- >

Re: [Intel-gfx] [PATCH 10/10] drm/i915/display/tgl+: Use PPS index from vbt

On Wed, Jul 21, 2021 at 10:43:38PM -0700, José Roberto de Souza wrote: > Tigerlake and newer has two instances of PPS, to support up to two > eDP panels. > > Cc: Ville Syrjälä > Cc: Jani Nikula > Signed-off-by: José Roberto de Souza Reveiwed-by: Matt Atwood > --- > drivers/gpu/drm/i915/displa

Re: [Intel-gfx] [PATCH 13/15] drm/i915/guc/slpc: Sysfs hooks for SLPC

On 7/27/2021 9:59 AM, Michal Wajdeczko wrote: On 26.07.2021 21:07, Vinay Belgaumkar wrote: Update the get/set min/max freq hooks to work for SLPC case as well. Consolidate helpers for requested/min/max frequency get/set to intel_rps where the proper action can be taken depending on whether

[Intel-gfx] [PULL] drm-intel-fixes

Hi Dave and Daniel, Here goes drm-intel-fixes-2021-07-28: Display related fixes: - Fix vbt port mask - Fix around reading the right DSC disable fuse in display_ver 10 - Split display version 9 and 10 in intel_setup_outputs Thanks, Rodrigo. The following changes since commit ff1176468d368232b684

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/adlp: Add workaround to disable CMTG clock gating

== Series Details == Series: drm/i915/adlp: Add workaround to disable CMTG clock gating URL : https://patchwork.freedesktop.org/series/93067/ State : success == Summary == CI Bug Log - changes from CI_DRM_10404_full -> Patchwork_20716_full

[Intel-gfx] [PATCH] drm/i915/selftests: fixup igt_shrink_thp

Since the object might still be active here, the shrink_all will simply ignore it, which blows up in the test, since the pages will still be there. Currently THP is disabled which should result in the test being skipped, but if we ever re-enable THP we might start seeing the failure. Fix this by fo

[Intel-gfx] [PATCH] drm/i915/selftests: prefer the create_user helper

No need to hand roll the set_placements stuff, now that that we have a helper for this. Also no need to handle the -ENODEV case here, since NULL mr implies missing device support, where the for_each_memory_region helper will always skip over such regions. Signed-off-by: Matthew Auld Cc: Jason Eks

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Use Transparent Hugepages when IOMMU is enabled

== Series Details == Series: drm/i915: Use Transparent Hugepages when IOMMU is enabled URL : https://patchwork.freedesktop.org/series/93122/ State : warning == Summary == $ dim checkpatch origin/drm-tip 1e72a7f59823 drm/i915: Use Transparent Hugepages when IOMMU is enabled -:6: ERROR:GIT_COMMI

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/adlp: Add workaround to disable CMTG clock gating

Re-reported the series. -Original Message- From: Deak, Imre Sent: Wednesday, July 28, 2021 6:34 AM To: intel-gfx@lists.freedesktop.org; Souza, Jose ; Vudum, Lakshminarayana Subject: Re: ✗ Fi.CI.IGT: failure for drm/i915/adlp: Add workaround to disable CMTG clock gating On Tue, Jul 27

Re: [Intel-gfx] [PATCH] drm/i915: Use Transparent Hugepages when IOMMU is enabled

On Wed, Jul 28, 2021 at 03:12:49PM +0100, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin > > Usage of Transparent Hugepages was disabled in 9987da4b5dcf > ("drm/i915: Disable THP until we have a GPU read BW W/A"), but since it > appears majority of performance regressions reported with an enabled I

Re: [Intel-gfx] [PATCH 1/1] drm/i915/dmc: Bump ADLP DMC version to v2.11

On Tue, Jul 27, 2021 at 11:55:05AM -0700, Anusha Srivatsa wrote: > Release notes mention that this verion has: > - Fixes for DC6v issue. > - Flip queue enabled on pipe C and pipe D. > > Cc: Imre Deak > Signed-off-by: Anusha Srivatsa I suggest merging this only once we can look at the firmware s

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Use Transparent Hugepages when IOMMU is enabled

== Series Details == Series: drm/i915: Use Transparent Hugepages when IOMMU is enabled URL : https://patchwork.freedesktop.org/series/93122/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10411 -> Patchwork_20724 Summary ---

Re: [Intel-gfx] [PATCH 1/1] drm/i915: dgfx cards need to wait on pcode's uncore init done

On Tue, Jul 27, 2021 at 11:03:38PM +0530, badal.nila...@intel.com wrote: > From: Badal Nilawar > > In discrete cards, the graphics driver shouldn't proceed with the probe > or resume unless PCODE indicated everything is done, including memory > training and gt bring up. > > For this reason, the

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/1] drm/i915: dgfx cards need to wait on pcode's uncore init done

On Wed, Jul 28, 2021 at 05:10:01AM -, Patchwork wrote: >Patch Details > >Series: series starting with [1/1] drm/i915: dgfx cards need to wait on >pcode's uncore init done >URL: [1]https://patchwork.freedesktop.org/series/93075/ >State: failure >Details: >[2]https://

Re: [Intel-gfx] [PATCH v2 04/10] drm/i915/xelpd: First stab at DPT support

On Wed, Jul 28, 2021 at 08:50:20AM +0200, Daniel Vetter wrote: > On Thu, May 6, 2021 at 6:19 PM Imre Deak wrote: > > > > From: Ville Syrjälä > > > > Add support for DPT (display page table). DPT is a > > slightly peculiar two level page table scheme used for > > tiled scanout buffers (linear uses

[Intel-gfx] ✗ Fi.CI.IGT: failure for lpsp with hdmi/dp outputs (rev2)

== Series Details == Series: lpsp with hdmi/dp outputs (rev2) URL : https://patchwork.freedesktop.org/series/92108/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10410_full -> Patchwork_20723_full Summary --- **FAILU

Re: [Intel-gfx] [Linaro-mm-sig] [PATCH v4 03/18] drm/sched: Add dependency tracking

Am 28.07.21 um 14:09 schrieb Daniel Vetter: On Wed, Jul 28, 2021 at 1:29 PM Christian König wrote: Am 27.07.21 um 13:09 schrieb Daniel Vetter: Adding a few more people to this bikeshed. On Mon, Jul 12, 2021 at 10:02 PM Daniel Vetter wrote: @@ -349,6 +367,13 @@ int drm_sched_job_init(struct

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: fixup igt_shrink_thp

== Series Details == Series: drm/i915/selftests: fixup igt_shrink_thp URL : https://patchwork.freedesktop.org/series/93128/ State : success == Summary == CI Bug Log - changes from CI_DRM_10411 -> Patchwork_20725 Summary --- **SUCCESS

[Intel-gfx] i915 DMC Updates - TGL:v2.12 and RKL v2.03

Hi, Kindly pull these updates from i915. The following changes since commit 168452ee695b5edb9deb641059bc110b9c5e8fc7: Merge tag 'iwlwifi-fw-2021-07-19' of git://git.kernel.org/pub/scm/linux/kernel/git/iwlwifi/linux-firmware into main (2021-07-19 14:35:47 -0400) are available in the Git repos

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for lpsp with hdmi/dp outputs (rev2)

Hi Lakshmi , Below failures are not related to my series. * igt@kms_selftest@all@damage_iter_no_damage: * shard-apl: NOTRUN -> INCOMPLETE Could you please raise the iss

Re: [Intel-gfx] [PATCH 1/2] drm/i915/adl_s: Update ddi buf translation tables

On Thu, 2021-07-22 at 22:34 -0700, Matt Roper wrote: > The hardware team updates the translation tables on 2021-06-23. Let's > update the driver accordingly. Reviewed-by: José Roberto de Souza > > Bspec: 49291 > Signed-off-by: Matt Roper > --- > .../drm/i915/display/intel_ddi_buf_trans.c

[Intel-gfx] ✓ Fi.CI.IGT: success for lpsp with hdmi/dp outputs (rev2)

== Series Details == Series: lpsp with hdmi/dp outputs (rev2) URL : https://patchwork.freedesktop.org/series/92108/ State : success == Summary == CI Bug Log - changes from CI_DRM_10410_full -> Patchwork_20723_full Summary --- **SUCCE

Re: [Intel-gfx] [PATCH v2 2/2] drm/i915/adl_p: Add ddi buf translation tables for combo PHY

On Thu, 2021-07-22 at 22:38 -0700, Matt Roper wrote: > ADL-P now has its own set of DDI buf translation tables (except for eDP > which appears to be the same as TGL). Add the new values (last updated > in bspec 2021-07-22) to the driver. > > v2: > - Actually hook up the new tables via encoder->g

[Intel-gfx] ✓ Fi.CI.IGT: success for lpsp with hdmi/dp outputs (rev2)

== Series Details == Series: lpsp with hdmi/dp outputs (rev2) URL : https://patchwork.freedesktop.org/series/92108/ State : success == Summary == CI Bug Log - changes from CI_DRM_10410_full -> Patchwork_20723_full Summary --- **SUCCE

[Intel-gfx] [PATCH] drm/i915: Disable bonding on gen12+ platforms

Disable bonding on gen12+ platforms aside from ones already supported by the i915 - TGL, RKL, and ADL-S. Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gem/i915_gem_context.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/

Re: [Intel-gfx] [PATCH v2 04/10] drm/i915/xelpd: First stab at DPT support

On Wed, Jul 28, 2021 at 6:41 PM Rodrigo Vivi wrote: > > On Wed, Jul 28, 2021 at 08:50:20AM +0200, Daniel Vetter wrote: > > On Thu, May 6, 2021 at 6:19 PM Imre Deak wrote: > > > > > > From: Ville Syrjälä > > > > > > Add support for DPT (display page table). DPT is a > > > slightly peculiar two le

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/selftests: fixup igt_shrink_thp

== Series Details == Series: drm/i915/selftests: fixup igt_shrink_thp URL : https://patchwork.freedesktop.org/series/93128/ State : success == Summary == CI Bug Log - changes from CI_DRM_10411_full -> Patchwork_20725_full Summary ---

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for lpsp with hdmi/dp outputs (rev2)

Re-reported. From: Gupta, Anshuman Sent: Wednesday, July 28, 2021 10:06 AM To: intel-gfx@lists.freedesktop.org; Vudum, Lakshminarayana Subject: RE: ✗ Fi.CI.IGT: failure for lpsp with hdmi/dp outputs (rev2) Hi Lakshmi , Below failures are not related to my series. * igt@kms_selftest@all@d

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: prefer the create_user helper

== Series Details == Series: drm/i915/selftests: prefer the create_user helper URL : https://patchwork.freedesktop.org/series/93131/ State : warning == Summary == $ dim checkpatch origin/drm-tip 28a3c3987659 drm/i915/selftests: prefer the create_user helper -:6: WARNING:REPEATED_WORD: Possible

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/selftests: prefer the create_user helper

== Series Details == Series: drm/i915/selftests: prefer the create_user helper URL : https://patchwork.freedesktop.org/series/93131/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10413 -> Patchwork_20726 Summary ---

[Intel-gfx] [PATCH v4 00/14] drm/i915/guc/slpc: Enable GuC based power management features

This series enables Single Loop Power Control (SLPC) feature in GuC. GuC implements various power management algorithms as part of it's operation. These need to be specifically enabled by KMD. They replace the legacy host based management of these features. With this series, we will enable two PM

[Intel-gfx] [PATCH 03/14] drm/i915/guc/slpc: Adding SLPC communication interfaces

Add constants and params that are needed to configure SLPC. v2: Add a new abi header for SLPC. Replace bitfields with genmasks. Address other comments from Michal W. v3: Add slpc H2G format in abi, other review commments (Michal W) v4: Update status bits according to latest spec Signed-off-by:

[Intel-gfx] [PATCH 01/14] drm/i915/guc/slpc: Initial definitions for SLPC

Add macros to check for SLPC support. This feature is currently supported for Gen12+ and enabled whenever GuC submission is enabled/selected. Include templates for SLPC init/fini and enable. v2: Move SLPC helper functions to intel_guc_slpc.c/.h. Define basic template for SLPC structure in intel_g

[Intel-gfx] [PATCH 02/14] drm/i915/guc/slpc: Gate Host RPS when SLPC is enabled

Also ensure uc_init is called before we initialize RPS so that we can check for SLPC support. We do not need to enable up/down interrupts when SLPC is enabled. However, we still need the ARAT interrupt, which will be enabled separately later. Signed-off-by: Vinay Belgaumkar Signed-off-by: Sundare

[Intel-gfx] [PATCH 04/14] drm/i915/guc/slpc: Allocate, initialize and release SLPC

Allocate data structures for SLPC and functions for initializing on host side. v2: Address review comments (Michal W) v3: Remove unnecessary header includes (Michal W) v4: Rebase Reviewed-by: Michal Wajdeczko Signed-off-by: Vinay Belgaumkar Signed-off-by: Sundaresan Sujaritha --- drivers/gpu/

[Intel-gfx] [PATCH 05/14] drm/i915/guc/slpc: Enable SLPC and add related H2G events

Add methods for interacting with GuC for enabling SLPC. Enable SLPC after GuC submission has been established. GuC load will fail if SLPC cannot be successfully initialized. Add various helper methods to set/unset the parameters for SLPC. They can be set using H2G calls or directly setting bits in

[Intel-gfx] [PATCH 08/14] drm/i915/guc/slpc: Add get max/min freq hooks

Add helpers to read the min/max frequency being used by SLPC. This is done by send a H2G command which forces SLPC to update the shared data struct which can then be read. These helpers will be used in a sysfs patch later on. v2: Address review comments (Michal W) v3: Return err in case of query f

[Intel-gfx] [PATCH 07/14] drm/i915/guc/slpc: Add methods to set min/max frequency

Add param set h2g helpers to set the min and max frequencies for use by SLPC. v2: Address review comments (Michal W) v3: Check for positive error code (Michal W) v4: Print generic error in set_param (Michal W) Signed-off-by: Sundaresan Sujaritha Signed-off-by: Vinay Belgaumkar --- drivers/gpu/

[Intel-gfx] [PATCH 06/14] drm/i915/guc/slpc: Remove BUG_ON in guc_submission_disable

The assumption when it was added was that GT would not be holding any gt_pm references. However, uc_init is called from gt_init_hw, which holds a forcewake ref. If SLPC enable fails, we will still be holding this ref, which will result in the BUG_ON. Reviewed-by: Matthew Brost Signed-off-by: Vina

[Intel-gfx] [PATCH 09/14] drm/i915/guc/slpc: Add debugfs for SLPC info

This prints out relevant SLPC info from the SLPC shared structure. We will send a H2G message which forces SLPC to update the shared data structure with latest information before reading it. v2: Address review comments (Michal W) v3: Remove unnecessary tasks from slpc_info (Michal W) v4: Rename f

[Intel-gfx] [PATCH 11/14] drm/i915/guc/slpc: Cache platform frequency limits

Cache rp0, rp1 and rpn platform limits into SLPC structure for range checking while setting min/max frequencies. Also add "soft" limits which keep track of frequency changes made from userland. These are initially set to platform min and max. v2: Address review comments (Michal W) v3: Formatting

[Intel-gfx] [PATCH 10/14] drm/i915/guc/slpc: Enable ARAT timer interrupt

This interrupt is enabled during RPS initialization, and now needs to be done by SLPC code. It allows ARAT timer expiry interrupts to get forwarded to GuC. v2: Fix comment (Matthew Brost) Reviewed-by: Matthew Brost Signed-off-by: Vinay Belgaumkar --- drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c

[Intel-gfx] [PATCH 12/14] drm/i915/guc/slpc: Sysfs hooks for SLPC

Update the get/set min/max freq hooks to work for SLPC case as well. Consolidate helpers for requested/min/max frequency get/set to intel_rps where the proper action can be taken depending on whether SLPC is enabled. v2: Add wrappers for getting rp0/1/n frequencies, update softlimits in set min/ma

[Intel-gfx] [PATCH 13/14] drm/i915/guc/slpc: Add SLPC selftest

Tests that exercise the SLPC get/set frequency interfaces. Clamp_max will set max frequency to multiple levels and check that SLPC requests frequency lower than or equal to it. Clamp_min will set min frequency to different levels and check if SLPC requests are higher or equal to those levels. v2

[Intel-gfx] [PATCH 14/14] drm/i915/guc/rc: Setup and enable GuCRC feature

This feature hands over the control of HW RC6 to the GuC. GuC decides when to put HW into RC6 based on it's internal busyness algorithms. GuCRC needs GuC submission to be enabled, and only supported on Gen12+ for now. When GuCRC is enabled, do not set HW RC6. Use a H2G message to tell GuC to enab

Re: [Intel-gfx] [PATCH v3 3/5] drm/print: RFC add choice to use dynamic debug in drm-debug

On Tue, Jul 27, 2021 at 10:03 AM Sean Paul wrote: > > On Thu, Jul 22, 2021 at 11:20 AM Sean Paul wrote: > > > > Reply-all fail. Adding everyone else back to my response. > > > On Tue, Jul 20, 2021 at 03:29:34PM +0200, Daniel Vetter wrote: > > > On Wed, Jul 14, 2021 at 11:51:36AM -0600, Jim Cromie

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Disable bonding on gen12+ platforms

== Series Details == Series: drm/i915: Disable bonding on gen12+ platforms URL : https://patchwork.freedesktop.org/series/93135/ State : success == Summary == CI Bug Log - changes from CI_DRM_10413 -> Patchwork_20727 Summary --- **SU

Re: [Intel-gfx] refactor the i915 GVT support

On Wed, Jul 28, 2021 at 01:38:58PM +, Wang, Zhi A wrote: > I guess those APIs you were talking about are KVM-only. For other > hypervisors, e.g. Xen, ARCN cannot use the APIs you mentioned. Not > sure if you have already noticed that VFIO is KVM-only right now. There is very little hard conne

[Intel-gfx] [PATCH 05/25] drm/i915/display: remove explicit CNL handling from intel_crtc.c

No need for special CNL handling as there is no real platform with that configuration. Signed-off-by: Lucas De Marchi Reviewed-by: Matt Roper --- drivers/gpu/drm/i915/display/intel_crtc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_crtc

[Intel-gfx] [PATCH 01/25] drm/i915/display: remove PORT_F workaround for CNL

Explicit support for CNL is being removed from the driver as it's not expected to work. Remove the workaround for PORT_F from display/intel_bios.c so we can also remove the generic DISPLAY_VER == 10 calls to intel_ddi_init(): the only platform with that display version is already handled separately

[Intel-gfx] [PATCH 02/25] drm/i915/display: remove explicit CNL handling from intel_cdclk.c

The only real platform with DISPLAY_VER == 10 is GLK, so we don't need any checks and supporting code for CNL. Remove code and rename functions/macros accordingly. Signed-off-by: Lucas De Marchi Reviewed-by: Matt Roper --- drivers/gpu/drm/i915/display/intel_cdclk.c | 72 +-

[Intel-gfx] [PATCH 10/25] drm/i915/display: remove explicit CNL handling from intel_dpll_mgr.c

The only real platform with DISPLAY_VER == 10 is GLK. We don't need to handle CNL explicitly in intel_ddi.c. A lot of special code for CNL can be removed. There were some __cnl.*() functions that were created to share the implementation between ICL and CNL. Those are now embedded in the only calle

[Intel-gfx] [PATCH 15/25] drm/i915/display: rename CNL references in skl_scaler.c

With the removal of CNL, let's consider GLK as the first platform using those constants since GLK has DISPLAY_VER == 10. Signed-off-by: Lucas De Marchi Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/display/skl_scaler.c | 10 +- drivers/gpu/drm/i915/i915_reg.h | 4 ++-- 2

[Intel-gfx] [PATCH 08/25] drm/i915/display: remove explicit CNL handling from intel_dmc.c

Remove DMC firmware for CNL. Signed-off-by: Lucas De Marchi Reviewed-by: Matt Roper --- drivers/gpu/drm/i915/display/intel_dmc.c | 9 - 1 file changed, 9 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c index 9895fd957df9..3

[Intel-gfx] [PATCH 07/25] drm/i915/display: remove explicit CNL handling from intel_display_debugfs.c

Only one reference to CNL that is not needed, but code is the same for DISPLAY_VER >= 11, so leave the code around and just remove the special case for CNL. Signed-off-by: Lucas De Marchi Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/display/intel_display_debugfs.c | 2 +- 1 file changed,

[Intel-gfx] [PATCH 04/25] drm/i915/display: remove explicit CNL handling from intel_combo_phy.c

The only real platform with DISPLAY_VER == 10 is GLK, that doesn't have combo phys. We don't need to handle CNL explicitly in intel_combo_phy.c. Remove code and rename functions/macros accordingly to use ICL prefix. Signed-off-by: Lucas De Marchi Reviewed-by: Matt Roper --- .../gpu/drm/i915/di

[Intel-gfx] [PATCH 12/25] drm/i915/display: remove explicit CNL handling from skl_universal_plane.c

The only real platform with DISPLAY_VER == 10 is GLK. We don't need to handle CNL explicitly in skl_universal_plane.c. Remove code and rename functions/macros accordingly to use ICL prefix. Signed-off-by: Lucas De Marchi Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/display/skl_universal_

[Intel-gfx] [PATCH 20/25] drm/i915: rename CNL references in intel_dram.c

With the removal of CNL, let's consider ICL as the first platform using those constants. Signed-off-by: Lucas De Marchi Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/i915_reg.h | 24 +++ drivers/gpu/drm/i915/intel_dram.c | 32 +++ 2 files c

[Intel-gfx] [PATCH 23/25] drm/i915: remove GRAPHICS_VER == 10

Replace all remaining handling of GRAPHICS_VER {==,>=} 10 with {==,>=} 11. With the removal of CNL, there is no platform with graphics version equals 10. Signed-off-by: Lucas De Marchi Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 1 - drivers/gpu/drm/i915/gvt/gtt.

[Intel-gfx] [PATCH 21/25] drm/i915: replace random CNL comments

Cleanup remaining cases that we find CNL in the codebase. Signed-off-by: Lucas De Marchi Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/display/intel_bios.c | 2 +- drivers/gpu/drm/i915/display/intel_display.c | 2 +- drivers/gpu/drm/i915/display/intel_dp_aux.c | 1 - drivers/gpu/drm

[Intel-gfx] [PATCH 03/25] drm/i915/display: remove explicit CNL handling from intel_color.c

The only real platform with DISPLAY_VER == 10 is GLK, so we don't need any checks and supporting code for CNL. For DISPLAY_VER >= 11, ilk_load_csc_matrix() is not used, so make it handle GLK only. Signed-off-by: Lucas De Marchi Reviewed-by: Matt Roper --- drivers/gpu/drm/i915/display/intel_colo

[Intel-gfx] [PATCH 25/25] drm/i915: finish removal of CNL

With all the users removed, finish removing the CNL platform definitions. We will leave the PCI IDs around as those are exposed to userspace. Even if mesa doesn't support CNL anymore, let's avoid build breakages due to changing the headers. Also, due to drm/i915/gt still using IS_CANNONLAKE() let'

[Intel-gfx] [PATCH 09/25] drm/i915/display: remove explicit CNL handling from intel_dp.c

The only real platform with DISPLAY_VER == 10 is GLK. We don't need to handle CNL explicitly in intel_dp.c. Remove code and rename functions/macros accordingly to use ICL prefix. Signed-off-by: Lucas De Marchi Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/display/intel_dp.c | 35 -

[Intel-gfx] [PATCH 14/25] drm/i915/display: remove CNL ddi buf translation tables

The only real platform with DISPLAY_VER == 10 is GLK. We don't need to handle CNL explicitly. Signed-off-by: Lucas De Marchi Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/display/intel_ddi.c | 12 +- .../drm/i915/display/intel_ddi_buf_trans.c| 616 +- .../drm/i915

[Intel-gfx] [PATCH 06/25] drm/i915/display: remove explicit CNL handling from intel_ddi.c

The only real platform with DISPLAY_VER == 10 is GLK. We don't need to handle CNL explicitly in intel_ddi.c. Remove code and rename functions/macros accordingly to use ICL prefix. There's one leftover reference to cnl that comes from the struct intel_ddi_buf_trans. This will be renamed later when

[Intel-gfx] [PATCH 16/25] drm/i915: remove explicit CNL handling from i915_irq.c

Remove special handling of PORT_F in i915_irq.c and only do it for DISPLAY_VER == 11. Signed-off-by: Lucas De Marchi Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/i915_irq.c | 7 +++ drivers/gpu/drm/i915/i915_reg.h | 2 +- 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/

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