From: Leon Romanovsky
Changelog:
v2:
* Changed implementation of first patch, based on our discussion with
Christoph.
https://lore.kernel.org/lkml/ynwavtt0qmqdx...@infradead.org/
v1: https://lore.kernel.org/lkml/cover.1624955710.git.leo...@nvidia.com/
* Fixed sg_page with a _dma_ API in the
From: Maor Gottlieb
In order to avoid incorrect usage of sg_table fields, change umem to
use dma_map_sgtable for map the pages for DMA. Since dma_map_sgtable
update the nents field (number of DMA entries), there is no need
anymore for nmap variable, hence do some cleanups accordingly.
Signed-off
From: Maor Gottlieb
orig_nents should represent the number of entries with pages,
but __sg_alloc_table_from_pages sets orig_nents as the number of
total entries in the table. This is wrong when the API is used for
dynamic allocation where not all the table entries are mapped with
pages. It wasn't
== Series Details ==
Series: SG fix together with update to RDMA umem
URL : https://patchwork.freedesktop.org/series/92682/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
DESCEND objtool
CHK include/generated/compile.h
CC [M]
Reviewed-by: Caz Yokoyama
-caz
On Tue, 2021-07-13 at 20:15 -0700, Matt Roper wrote:
> Due to the removal of legacy slices and the transition to a
> gslice/cslice/mslice/etc. design, we'll internally store all DSS
> under
> "slice0."
>
> Signed-off-by: Matt Roper
> ---
> drivers/gpu/drm/i915/gt
From: Ankit Nautiyal
Till DISPLAY12 the PIPE_MISC bits 5-7 are used to set the
Dithering BPC, with valid values of 6, 8, 10 BPC.
For ADLP+ these bits are used to set the PORT OUTPUT BPC, with valid
values of: 6, 8, 10, 12 BPC, and need to be programmed whether
dithering is enabled or not.
This p
== Series Details ==
Series: drm/i915: Fix the 12 BPC bits for PIPE_MISC reg
URL : https://patchwork.freedesktop.org/series/92690/
State : warning
== Summary ==
$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/i915_cmd_parser.c:1436: warning: Excess function
parameter 'jump
== Series Details ==
Series: drm/i915: Fix the 12 BPC bits for PIPE_MISC reg
URL : https://patchwork.freedesktop.org/series/92690/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10349 -> Patchwork_20642
Summary
---
**
Patch looks good to me.
Please find below some suggestions
On 7/15/2021 4:04 AM, Manasi Navare wrote:
Currently when we do the HW state readout, we dont set the shared dpll to NULL
for the bigjoiner slave which should not have a DPLL assigned. So it has
some garbage while the HW state readout i
