This is a prep patch for Pipe DMC plugging.
Add dmc_info struct in intel_dmc to have all common fields
shared between all DMC's in the package.
Add DMC_FW_MAIN(dmc_id 0) to refer to the blob.
v2: Remove dmc_offset and start_mmioaddr from dmc_info struct (Jose)
Cc: Souza, Jose
Signed-off-by: Anu
One change from previous verison is a fix of SKL
regression. Corner cases for stepping-substepping
combination was missing from fw_info_matches_stepping()
helper. Luckily SKL was the only platform in CI that came
under this category and DMC refused to load.
v2: SKL fix tested on SKL.
v3: Minor ch
This patch adds Pipe A plumbing to the already
existing parsing and loading functions which is
taken care of in the prep patches. Adding MAX_DMC_FW
to keep track for both Main and Pipe A DMC while loading
the respective blobs.
Also adding present field in dmc_info.
s/find_dmc_fw_offset/csr_set_dmc
Load DMC v2.10 on ADLP. The release notes mention that
this version enables few power savings features.
v2: Add DMC_PATH() for ADLP (Lucas)
Cc: Lucas De Marchi
Cc: Clint Taylor
Signed-off-by: Anusha Srivatsa
Reviewed-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_dmc.c | 10 +
ADLP requires us to load both Pipe A and Pipe B.
Plug Pipe B loading support.
Cc: Lucas De Marchi
Signed-off-by: Anusha Srivatsa
Reviewed-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_display_debugfs.c | 2 ++
drivers/gpu/drm/i915/display/intel_dmc.h | 1 +
2 files cha
== Series Details ==
Series: Pipe DMC Support (rev8)
URL : https://patchwork.freedesktop.org/series/90445/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
ee2ef4cb584b drm/i915/dmc: Introduce DMC_FW_MAIN
29dfec8e2a62 drm/i915/xelpd: Pipe A DMC plugging
-:49: WARNING:LONG_LINE: li
== Series Details ==
Series: Pipe DMC Support (rev8)
URL : https://patchwork.freedesktop.org/series/90445/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/display/intel_disp
== Series Details ==
Series: Pipe DMC Support (rev8)
URL : https://patchwork.freedesktop.org/series/90445/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10214 -> Patchwork_20353
Summary
---
**SUCCESS**
No regressi
== Series Details ==
Series: Pipe DMC Support (rev8)
URL : https://patchwork.freedesktop.org/series/90445/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10214_full -> Patchwork_20353_full
Summary
---
**FAILURE**
S
Hi Joonas
Am 11.06.21 um 13:13 schrieb Joonas Lahtinen:
Quoting Joonas Lahtinen (2021-06-11 13:40:56)
Quoting Maarten Lankhorst (2021-06-11 12:27:15)
Pull request for drm-misc-next and drm-intel-gt-next.
topic/i915-ttm-2021-06-11:
drm-misc and drm-intel pull request for topic/i915-ttm:
- Conv
On Fri, Jun 11, 2021 at 11:26:46PM +0800, Claire Chang wrote:
> + spin_lock_init(&mem->lock);
> + for (i = 0; i < mem->nslabs; i++) {
> + mem->slots[i].list = IO_TLB_SEGSIZE - io_tlb_offset(i);
> + mem->slots[i].orig_addr = INVALID_PHYS_ADDR;
> + mem->slo
On Fri, Jun 11, 2021 at 11:26:47PM +0800, Claire Chang wrote:
> Split the debugfs creation to make the code reusable for supporting
> different bounce buffer pools, e.g. restricted DMA pool.
>
> Signed-off-by: Claire Chang
> ---
> kernel/dma/swiotlb.c | 23 ---
> 1 file chang
On Fri, Jun 11, 2021 at 11:33:15PM +0800, Claire Chang wrote:
> I'm not sure if this would break arch/x86/pci/sta2x11-fixup.c
> swiotlb_late_init_with_default_size is called here
> https://elixir.bootlin.com/linux/v5.13-rc5/source/arch/x86/pci/sta2x11-fixup.c#L60
It will. It will also break all n
On Fri, Jun 11, 2021 at 11:26:49PM +0800, Claire Chang wrote:
> Add the initialization function to create restricted DMA pools from
> matching reserved-memory nodes.
Bisection hazard: we should only add the new config option when the
code is actually read to be used. So this patch should move to
Looks good,
Reviewed-by: Christoph Hellwig
___
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> kernel/dma/direct.c | 2 +-
> kernel/dma/swiotlb.c | 4 ++--
> 6 files changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_internal.c
> b/drivers/gpu/drm/i915/gem/i915_gem_internal.c
> index ce6b664b10aa..
On Fri, Jun 11, 2021 at 11:26:52PM +0800, Claire Chang wrote:
> Regardless of swiotlb setting, the restricted DMA pool is preferred if
> available.
>
> The restricted DMA pools provide a basic level of protection against the
> DMA overwriting buffer contents at unexpected times. However, to protec
On Fri, Jun 11, 2021 at 11:26:53PM +0800, Claire Chang wrote:
> Move the maintenance of alloc_size to find_slots for better code
> reusability later.
Looks good,
Reviewed-by: Christoph Hellwig
___
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On Fri, Jun 11, 2021 at 11:26:54PM +0800, Claire Chang wrote:
> Add a new function, release_slots, to make the code reusable for supporting
> different bounce buffer pools, e.g. restricted DMA pool.
>
> Signed-off-by: Claire Chang
> ---
> kernel/dma/swiotlb.c | 35 ---
I think merging this with the next two patches would be a little more
clear.
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On Mon, Jun 14, 2021 at 08:28:01AM +0200, Christoph Hellwig wrote:
> I think merging this with the next two patches would be a little more
> clear.
Sorry, I mean the next patch and the previous one.
___
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Quoting Thomas Zimmermann (2021-06-13 21:54:03)
> Hi Joonas
>
> Am 11.06.21 um 13:13 schrieb Joonas Lahtinen:
> > Quoting Joonas Lahtinen (2021-06-11 13:40:56)
> >> Quoting Maarten Lankhorst (2021-06-11 12:27:15)
> >>> Pull request for drm-misc-next and drm-intel-gt-next.
> >>>
> >>> topic/i915-tt
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