[Intel-gfx] [CI 1/3] drm/i915/gt: Move move context layout registers and offsets to lrc_reg.h

Cleanup intel_lrc.h by moving some of the residual common register definitions into intel_lrc_reg.h, prior to rebranding and splitting off the submission backends. v2: keep the SCHEDULE enum in the old file, since it is specific to the gvt usage of the execlists submission backend (John) Signed-o

[Intel-gfx] [CI 2/3] drm/i915/gt: Rename lrc.c to execlists_submission.c

We want to separate the utility functions for controlling the logical ring context from the execlists submission mechanism (which is an overgrown scheduler). This is similar to Daniele's work to split up the files, but being selfish I wanted to base it after my own changes to intel_lrc.c petered o

[Intel-gfx] [PATCH] drm/sched: Add missing structure comment

Add a missing structure comment for the recently added @list member. Cc: Stephen Rothwell Cc: Daniel Vetter Cc: Christian König Fixes: 8935ff00e3b1 ("drm/scheduler: "node" --> "list"") Reported-by: Stephen Rothwell Signed-off-by: Luben Tuikov --- include/drm/gpu_scheduler.h | 2 +- 1 file c

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/sched: Add missing structure comment

== Series Details == Series: drm/sched: Add missing structure comment URL : https://patchwork.freedesktop.org/series/84746/ State : success == Summary == CI Bug Log - changes from CI_DRM_9465 -> Patchwork_19097 Summary --- **SUCCESS*

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/3] drm/i915/gt: Move move context layout registers and offsets to lrc_reg.h

== Series Details == Series: series starting with [CI,1/3] drm/i915/gt: Move move context layout registers and offsets to lrc_reg.h URL : https://patchwork.freedesktop.org/series/84748/ State : warning == Summary == $ dim checkpatch origin/drm-tip b35c1d7f8cbc drm/i915/gt: Move move context l

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [CI,1/3] drm/i915/gt: Move move context layout registers and offsets to lrc_reg.h

== Series Details == Series: series starting with [CI,1/3] drm/i915/gt: Move move context layout registers and offsets to lrc_reg.h URL : https://patchwork.freedesktop.org/series/84748/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, eac

[Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [CI,1/3] drm/i915/gt: Move move context layout registers and offsets to lrc_reg.h

== Series Details == Series: series starting with [CI,1/3] drm/i915/gt: Move move context layout registers and offsets to lrc_reg.h URL : https://patchwork.freedesktop.org/series/84748/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 Error: Cannot open file ./driver

[Intel-gfx] [CI 1/3] drm/i915/gt: Move move context layout registers and offsets to lrc_reg.h

Cleanup intel_lrc.h by moving some of the residual common register definitions into intel_lrc_reg.h, prior to rebranding and splitting off the submission backends. v2: keep the SCHEDULE enum in the old file, since it is specific to the gvt usage of the execlists submission backend (John) Signed-o

[Intel-gfx] [CI 3/3] drm/i915: split gen8+ flush and bb_start emission functions to their own file

From: Daniele Ceraolo Spurio These functions are independent from the backend used and can therefore be split out of the exelists submission file, so they can be re-used by the upcoming GuC submission backend. Based on a patch by Chris Wilson. Signed-off-by: Daniele Ceraolo Spurio Cc: Chris P

[Intel-gfx] [CI 2/3] drm/i915/gt: Rename lrc.c to execlists_submission.c

We want to separate the utility functions for controlling the logical ring context from the execlists submission mechanism (which is an overgrown scheduler). This is similar to Daniele's work to split up the files, but being selfish I wanted to base it after my own changes to intel_lrc.c petered o

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [CI,1/3] drm/i915/gt: Move move context layout registers and offsets to lrc_reg.h

== Series Details == Series: series starting with [CI,1/3] drm/i915/gt: Move move context layout registers and offsets to lrc_reg.h URL : https://patchwork.freedesktop.org/series/84748/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9465 -> Patchwork_19098

[Intel-gfx] [CI 1/3] drm/i915/gt: Move move context layout registers and offsets to lrc_reg.h

Cleanup intel_lrc.h by moving some of the residual common register definitions into intel_lrc_reg.h, prior to rebranding and splitting off the submission backends. v2: keep the SCHEDULE enum in the old file, since it is specific to the gvt usage of the execlists submission backend (John) Signed-o

[Intel-gfx] [CI 2/3] drm/i915/gt: Rename lrc.c to execlists_submission.c

We want to separate the utility functions for controlling the logical ring context from the execlists submission mechanism (which is an overgrown scheduler). This is similar to Daniele's work to split up the files, but being selfish I wanted to base it after my own changes to intel_lrc.c petered o

[Intel-gfx] [CI 3/3] drm/i915: split gen8+ flush and bb_start emission functions to their own file

From: Daniele Ceraolo Spurio These functions are independent from the backend used and can therefore be split out of the exelists submission file, so they can be re-used by the upcoming GuC submission backend. Based on a patch by Chris Wilson. Signed-off-by: Daniele Ceraolo Spurio Cc: Chris P

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/display/tc: Only WARN once for bogus tc port flag

== Series Details == Series: drm/i915/display/tc: Only WARN once for bogus tc port flag URL : https://patchwork.freedesktop.org/series/84745/ State : success == Summary == CI Bug Log - changes from CI_DRM_9465_full -> Patchwork_19096_full S

[Intel-gfx] [PULL] drm-intel-fixes

Hi Dave and Daniel, The commit 7c5c15dffe1e ("drm/i915/gt: Declare gen9 has 64 mocs entries!") should actually be sent last week along with the commit 777a7717d60c ("drm/i915/gt: Program mocs:63 for cache eviction on gen9"), but I had missed that and dim didn't cope with fixes for fixes. Here goe

Re: [Intel-gfx] [PATCH] drm/i915/display/tc: Only WARN once for bogus tc port flag

On Wed, Dec 09, 2020 at 04:16:36PM -0500, Sean Paul wrote: > From: Sean Paul > > No need to spam syslog/console when we can ignore/fix the flag. besides that we are calling from multiple places anyway.. > > Signed-off-by: Sean Paul Reviewed-by: Rodrigo Vivi > --- > drivers/gpu/drm/i915

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/sched: Add missing structure comment (rev2)

== Series Details == Series: drm/sched: Add missing structure comment (rev2) URL : https://patchwork.freedesktop.org/series/84746/ State : success == Summary == CI Bug Log - changes from CI_DRM_9465 -> Patchwork_19099 Summary --- **S

Re: [Intel-gfx] [PATCH] drm/i915: refactor cursor code out of i915_display.c

On Wed, 9 Dec 2020 at 21:48, Ville Syrjälä wrote: > > On Wed, Dec 09, 2020 at 10:51:52AM +1000, Dave Airlie wrote: > > From: Dave Airlie > > > > This file is a monster, let's start simple, the cursor plane code > > seems pretty standalone, and splits out easily enough. > > Is this different from

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/3] drm/i915/gt: Move move context layout registers and offsets to lrc_reg.h

== Series Details == Series: series starting with [CI,1/3] drm/i915/gt: Move move context layout registers and offsets to lrc_reg.h URL : https://patchwork.freedesktop.org/series/84749/ State : warning == Summary == $ dim checkpatch origin/drm-tip fb81d8f013fe drm/i915/gt: Move move context l

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [CI,1/3] drm/i915/gt: Move move context layout registers and offsets to lrc_reg.h

== Series Details == Series: series starting with [CI,1/3] drm/i915/gt: Move move context layout registers and offsets to lrc_reg.h URL : https://patchwork.freedesktop.org/series/84749/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, eac

[Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [CI,1/3] drm/i915/gt: Move move context layout registers and offsets to lrc_reg.h

== Series Details == Series: series starting with [CI,1/3] drm/i915/gt: Move move context layout registers and offsets to lrc_reg.h URL : https://patchwork.freedesktop.org/series/84749/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 Error: Cannot open file ./driver

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/sched: Add missing structure comment (rev2)

== Series Details == Series: drm/sched: Add missing structure comment (rev2) URL : https://patchwork.freedesktop.org/series/84746/ State : success == Summary == CI Bug Log - changes from CI_DRM_9465_full -> Patchwork_19099_full Summary

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/3] drm/i915/gt: Move move context layout registers and offsets to lrc_reg.h

== Series Details == Series: series starting with [CI,1/3] drm/i915/gt: Move move context layout registers and offsets to lrc_reg.h URL : https://patchwork.freedesktop.org/series/84749/ State : success == Summary == CI Bug Log - changes from CI_DRM_9466 -> Patchwork_19100

[Intel-gfx] [RFC 0/5] drm: Extract DPCD backlight helpers from i915, add support in nouveau

This series: * Cleans up i915's DPCD backlight code a little bit * Extracts i915's DPCD backlight code into a set of shared DRM helpers * Starts using those helpers in nouveau to add support to nouveau for DPCD backlight control Cc: Jani Nikula Cc: Dave Airlie Cc: greg.depo...@gmail.com Lyude

[Intel-gfx] [RFC 1/5] drm/nouveau/kms/nv40-/backlight: Assign prop type once

Signed-off-by: Lyude Paul Cc: Jani Nikula Cc: Dave Airlie Cc: greg.depo...@gmail.com --- drivers/gpu/drm/nouveau/nouveau_backlight.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nouveau_backlight.c b/drivers/gpu/drm/nouveau/nouveau_backlight.c

[Intel-gfx] [RFC 3/5] drm/i915/dp: Remove redundant AUX backlight frequency calculations

Noticed this while moving all of the VESA backlight code in i915 over to DRM helpers: it would appear that we calculate the frequency value we want to write to DP_EDP_BACKLIGHT_FREQ_SET twice even though this value never actually changes during runtime. So, let's simplify things by just caching thi

[Intel-gfx] [RFC 2/5] drm/nouveau/kms: Don't probe eDP connectors more then once

eDP doesn't do hotplugging, so there's no reason for us to reprobe it (unless a connection status change is being forced, of course). Signed-off-by: Lyude Paul Cc: Jani Nikula Cc: Dave Airlie Cc: greg.depo...@gmail.com --- drivers/gpu/drm/nouveau/nouveau_connector.c | 6 ++ 1 file changed,

[Intel-gfx] [RFC 4/5] drm/dp: Extract i915's eDP backlight code into DRM helpers

Since we're about to implement eDP backlight support in nouveau using the standard protocol from VESA, we might as well just take the code that's already written for this and move it into a set of shared DRM helpers. Note that these helpers are intended to handle DPCD related backlight control bit

[Intel-gfx] [RFC 5/5] drm/nouveau/kms/nv50-: Add basic DPCD backlight support for nouveau

This adds support for controlling panel backlights over eDP using VESA's standard backlight control interface. Luckily, Nvidia was cool enough to never come up with their own proprietary backlight control interface (at least, not any that I or the laptop manufacturers I've talked to are aware of),

Re: [Intel-gfx] [PATCH 4/4] drm/i915: split fdi code out from intel_display.c

On Wed, 9 Dec 2020 at 20:48, Daniel Vetter wrote: > > On Wed, Dec 9, 2020 at 5:22 AM Dave Airlie wrote: > > > > From: Dave Airlie > > > > This just refactors out the fdi code to a separate file. > > > > Signed-off-by: Dave Airlie > > There's also hsw_fdi_link_train from intel_ddi.c (another fai

[Intel-gfx] [PATCH i-g-t] i915/gem_exec_schedule: Try to spot unfairness

An important property for multi-client systems is that each client gets a 'fair' allotment of system time. (Where fairness is at the whim of the context properties, such as priorities.) This test forks N independent clients (albeit they happen to share a single vm), and does an equal amount of work

[Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [CI,1/3] drm/i915/gt: Move move context layout registers and offsets to lrc_reg.h

== Series Details == Series: series starting with [CI,1/3] drm/i915/gt: Move move context layout registers and offsets to lrc_reg.h URL : https://patchwork.freedesktop.org/series/84750/ State : failure == Summary == Applying: drm/i915/gt: Move move context layout registers and offsets to lrc

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/3] drm/i915/gt: Move move context layout registers and offsets to lrc_reg.h

== Series Details == Series: series starting with [CI,1/3] drm/i915/gt: Move move context layout registers and offsets to lrc_reg.h URL : https://patchwork.freedesktop.org/series/84749/ State : success == Summary == CI Bug Log - changes from CI_DRM_9466_full -> Patchwork_19100_full ==

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gt: Split logical ring contexts from execlist submission

== Series Details == Series: drm/i915/gt: Split logical ring contexts from execlist submission URL : https://patchwork.freedesktop.org/series/84752/ State : warning == Summary == $ dim checkpatch origin/drm-tip fe020da17c4c drm/i915/gt: Split logical ring contexts from execlist submission -:17

[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915/gt: Split logical ring contexts from execlist submission

== Series Details == Series: drm/i915/gt: Split logical ring contexts from execlist submission URL : https://patchwork.freedesktop.org/series/84752/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/gt/intel_lrc.c:1: warning: 'Logical Rings, Logi

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gt: Split logical ring contexts from execlist submission

== Series Details == Series: drm/i915/gt: Split logical ring contexts from execlist submission URL : https://patchwork.freedesktop.org/series/84752/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9467 -> Patchwork_19102 Summ

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm: Extract DPCD backlight helpers from i915, add support in nouveau

== Series Details == Series: drm: Extract DPCD backlight helpers from i915, add support in nouveau URL : https://patchwork.freedesktop.org/series/84754/ State : warning == Summary == $ dim checkpatch origin/drm-tip 07863bf5240e drm/nouveau/kms/nv40-/backlight: Assign prop type once -:7: WARNIN

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm: Extract DPCD backlight helpers from i915, add support in nouveau

== Series Details == Series: drm: Extract DPCD backlight helpers from i915, add support in nouveau URL : https://patchwork.freedesktop.org/series/84754/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separate

[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm: Extract DPCD backlight helpers from i915, add support in nouveau

== Series Details == Series: drm: Extract DPCD backlight helpers from i915, add support in nouveau URL : https://patchwork.freedesktop.org/series/84754/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 Error: Cannot open file ./drivers/gpu/drm/i915/gt/intel_lrc.c WARN

[Intel-gfx] [RFC v2] refactor intel display a bit more

The first 3 are just moving some functions to inline and fixing a wrong comma, the next 4 are cleaned up from yesterday. hsw fdi is definitely a WIP. Skl planes migration is along the lines of what danvet asked for. Dave. ___ Intel-gfx mailing list I

[Intel-gfx] [PATCH 2/9] drm/i915/display: move to_intel_frontbuffer to header

From: Dave Airlie This will be used for some refactoring in other files, so move it first. Signed-off-by: Dave Airlie --- drivers/gpu/drm/i915/display/intel_display.c | 6 -- drivers/gpu/drm/i915/display/intel_display_types.h | 6 ++ 2 files changed, 6 insertions(+), 6 deletions(

[Intel-gfx] [PATCH 1/9] drm/i915/display: move needs_modeset to an inline in header

From: Dave Airlie This function is going to be used in a later change, so clean it up first before moving it. Signed-off-by: Dave Airlie --- drivers/gpu/drm/i915/display/intel_display.c | 78 +-- .../drm/i915/display/intel_display_types.h| 6 ++ 2 files changed, 42 insert

[Intel-gfx] [PATCH 5/9] drm/i915: refactor some crtc code out of intel display.

From: Dave Airlie There may be more crtc code that can be pulled out, but this is a good start. RFC: maybe call the new file something different Signed-off-by: Dave Airlie --- drivers/gpu/drm/i915/Makefile| 1 + drivers/gpu/drm/i915/display/intel_crtc.c| 951

[Intel-gfx] [PATCH 4/9] drm/i915: refactor cursor code out of i915_display.c

From: Dave Airlie This file is a monster, let's start simple, the cursor plane code seems pretty standalone, and splits out easily enough. Signed-off-by: Dave Airlie --- drivers/gpu/drm/i915/Makefile| 1 + drivers/gpu/drm/i915/display/intel_cursor.c | 805 +++

[Intel-gfx] [PATCH 7/9] drm/i915: split fdi code out from intel_display.c

From: Dave Airlie This just refactors out the fdi code to a separate file. Signed-off-by: Dave Airlie --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/display/intel_display.c | 684 +- drivers/gpu/drm/i915/display/intel_display.h | 10 + .../dr

[Intel-gfx] [PATCH 9/9] drm/i915: migrate skl planes code new file

From: Dave Airlie rework the plane init calls to do the gen test one level higher. Signed-off-by: Dave Airlie --- drivers/gpu/drm/i915/Makefile |1 + drivers/gpu/drm/i915/display/intel_crtc.c | 16 +- .../gpu/drm/i915/display/intel_gen9_plane.c | 1427 ++

[Intel-gfx] [PATCH 3/9] drm/i915/display: fix misused comma

From: Dave Airlie There is no need for a comma use here. Signed-off-by: Dave Airlie --- drivers/gpu/drm/i915/display/intel_display.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.

[Intel-gfx] [PATCH 8/9] drm/i915: migrate hsw fdi code to new file.

From: Dave Airlie Daniel asked for this, but it's a bit messy and I'm not sure how best to clean it up yet. Signed-off-by: Dave Airlie --- drivers/gpu/drm/i915/display/intel_ddi.c | 151 +-- drivers/gpu/drm/i915/display/intel_ddi.h | 14 +- drivers/gpu/drm/i915/display

[Intel-gfx] [PATCH 6/9] drm/i915: refactor pll code out into intel_dpll_legacy.c

From: Dave Airlie This pulls a large chunk of the pll calculation code out of intel_display.c to a new file. One function makse sense to be an inline, otherwise this is pretty much a straight copy cover. also all the remaining hooks for g45 and older end up the same now. Signed-off-by: Dave Air

[Intel-gfx] ✓ Fi.CI.BAT: success for drm: Extract DPCD backlight helpers from i915, add support in nouveau

== Series Details == Series: drm: Extract DPCD backlight helpers from i915, add support in nouveau URL : https://patchwork.freedesktop.org/series/84754/ State : success == Summary == CI Bug Log - changes from CI_DRM_9467 -> Patchwork_19103

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/9] drm/i915/display: move needs_modeset to an inline in header

== Series Details == Series: series starting with [1/9] drm/i915/display: move needs_modeset to an inline in header URL : https://patchwork.freedesktop.org/series/84761/ State : warning == Summary == $ dim checkpatch origin/drm-tip ee7dca5fec1e drm/i915/display: move needs_modeset to an inlin

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/9] drm/i915/display: move needs_modeset to an inline in header

== Series Details == Series: series starting with [1/9] drm/i915/display: move needs_modeset to an inline in header URL : https://patchwork.freedesktop.org/series/84761/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't b

[Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [1/9] drm/i915/display: move needs_modeset to an inline in header

== Series Details == Series: series starting with [1/9] drm/i915/display: move needs_modeset to an inline in header URL : https://patchwork.freedesktop.org/series/84761/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 Error: Cannot open file ./drivers/gpu/drm/i915/g

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/9] drm/i915/display: move needs_modeset to an inline in header

== Series Details == Series: series starting with [1/9] drm/i915/display: move needs_modeset to an inline in header URL : https://patchwork.freedesktop.org/series/84761/ State : success == Summary == CI Bug Log - changes from CI_DRM_9467 -> Patchwork_19104

[Intel-gfx] [PATCH v7 01/18] drm/i915/hdcp: Update CP property in update_pipe

When crtc state need_modeset is true it is not necessary it is going to be a real modeset, it can turns to be a fastset instead of modeset. This turns content protection property to be DESIRED and hdcp update_pipe left with property to be in DESIRED state but actual hdcp->value was ENABLED. This i

[Intel-gfx] [PATCH v7 00/18] HDCP 2.2 and HDCP 1.4 Gen12 DP MST support

This is v7 version has added some fixes to below pacthes related to gen11 platform. [PATCH v7 17/18] drm/i915/hdcp: Support for HDCP 2.2 MST shim [PATCH v7 16/18] drm/i915/hdcp: Add HDCP 2.2 stream register It has been tested manually with below IGT series on TGL and ICL. https://patchwork.freede

[Intel-gfx] [PATCH v7 02/18] drm/i915/hdcp: Get conn while content_type changed

Get DRM connector reference count while scheduling a prop work to avoid any possible destroy of DRM connector when it is in DRM_CONNECTOR_REGISTERED state. Fixes: a6597faa2d59 ("drm/i915: Protect workers against disappearing connectors") Cc: Sean Paul Cc: Ramalingam C Reviewed-by: Uma Shankar

[Intel-gfx] [PATCH v7 03/18] drm/i915/hotplug: Handle CP_IRQ for DP-MST

Handle CP_IRQ in DEVICE_SERVICE_IRQ_VECTOR_ESI0 It requires to call intel_hdcp_handle_cp_irq() in case of CP_IRQ is triggered by a sink in DP-MST topology. Cc: "Ville Syrjälä" Cc: Ramalingam C Reviewed-by: Uma Shankar Reviewed-by: Ramalingam C Tested-by: Karthik B S Signed-off-by: Anshuman Gu

[Intel-gfx] [PATCH v7 04/18] drm/i915/hdcp: No HDCP when encoder is't initialized

There can be situation when DP MST connector is created without mst modeset being done, in those cases connector->encoder will be NULL. MST connector->encoder initializes after modeset. Don't enable HDCP in such cases to prevent any crash. Cc: Ramalingam C Cc: Juston Li Tested-by: Karthik B S S

[Intel-gfx] [PATCH v7 05/18] drm/i915/hdcp: DP MST transcoder for link and stream

Gen12 has H/W delta with respect to HDCP{1.x,2.x} display engine instances lies in Transcoder instead of DDI as in Gen11. This requires hdcp driver to use mst_master_transcoder for link authentication and stream transcoder for stream encryption separately. This will be used for both HDCP 1.4 and

[Intel-gfx] [PATCH v7 06/18] drm/i915/hdcp: Move HDCP enc status timeout to header

DP MST stream encryption status requires time of a link frame in order to change its status, but as there were some HDCP encryption timeout observed earlier, it is safer to use ENCRYPT_STATUS_CHANGE_TIMEOUT_MS timeout for stream status too, it requires to move the macro to a header. It will be used

[Intel-gfx] [PATCH v7 07/18] drm/i915/hdcp: HDCP stream encryption support

Both HDCP_{1.x,2.x} requires to select/deselect Multistream HDCP bit in TRANS_DDI_FUNC_CTL in order to enable/disable stream HDCP encryption over DP MST Transport Link. HDCP 1.4 stream encryption requires to validate the stream encryption status in HDCP_STATUS_{TRANSCODER,PORT} register driving th

[Intel-gfx] [PATCH v7 08/18] drm/i915/hdcp: Enable HDCP 1.4 stream encryption

Enable HDCP 1.4 DP MST stream encryption. Enable stream encryption once encryption is enabled on the DP transport driving the link for each stream which has requested encryption. Disable stream encryption for each stream that no longer requires encryption before disabling HDCP encryption on the l

[Intel-gfx] [PATCH v7 09/18] drm/i915/hdcp: Enable Gen12 HDCP 1.4 DP MST support

Enable HDCP 1.4 over DP MST for Gen12. v2: - Enable HDCP for <= Gen12 platforms. [Ram] Cc: Ramalingam C Tested-by: Karthik B S Signed-off-by: Anshuman Gupta --- drivers/gpu/drm/i915/display/intel_dp_mst.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/dr

[Intel-gfx] [PATCH v7 10/18] drm/i915/hdcp: Pass dig_port to intel_hdcp_init

Pass dig_port as an argument to intel_hdcp_init() and intel_hdcp2_init(). This will be required for HDCP 2.2 stream encryption. Cc: Ramalingam C Reviewed-by: Uma Shankar Reviewed-by: Ramalingam C Tested-by: Karthik B S Signed-off-by: Anshuman Gupta --- drivers/gpu/drm/i915/display/intel_dp_h

[Intel-gfx] [PATCH v7 11/18] drm/i915/hdcp: Encapsulate hdcp_port_data to dig_port

hdcp_port_data is specific to a port on which HDCP encryption is getting enabled, so encapsulate it to intel_digital_port. This will be required to enable HDCP 2.2 stream encryption. v2: - 's/port_data/hdcp_port_data'. [Ram] Cc: Ramalingam C Reviewed-by: Uma Shankar Reviewed-by: Ramalingam C T

[Intel-gfx] [PATCH v7 12/18] misc/mei/hdcp: Fix AUTH_STREAM_REQ cmd buffer len

Fix the size of WIRED_REPEATER_AUTH_STREAM_REQ cmd buffer size. It is based upon the actual number of MST streams and size of wired_cmd_repeater_auth_stream_req_in. Excluding the size of hdcp_cmd_header. v2: - hdcp_cmd_header size annotation nitpick. [Tomas] Cc: Tomas Winkler Cc: Ramalingam C A

[Intel-gfx] [PATCH v7 13/18] drm/hdcp: Max MST content streams

Let's define Maximum MST content streams up to four generically which can be supported by modern display controllers. Cc: Sean Paul Cc: Ramalingam C Acked-by: Maarten Lankhorst Reviewed-by: Uma Shankar Reviewed-by: Ramalingam C Tested-by: Karthik B S Signed-off-by: Anshuman Gupta --- inclu

[Intel-gfx] [PATCH v7 14/18] drm/i915/hdcp: MST streams support in hdcp port_data

Add support for multiple mst stream in hdcp port data which will be used by RepeaterAuthStreamManage msg and HDCP 2.2 security f/w for m' validation. Security f/w doesn't have any provision to mark the stream_type for each stream separately, it just take single input of stream_type while authentic

[Intel-gfx] [PATCH v7 15/18] drm/i915/hdcp: Pass connector to check_2_2_link

This requires for HDCP 2.2 MST check link. As for DP/HDMI shims check_2_2_link retrieves the connector from dig_port, this is not sufficient or DP MST connector, there can be multiple DP MST topology connector associated with same dig_port. Cc: Ramalingam C Reviewed-by: Uma Shankar Reviewed-by:

[Intel-gfx] [PATCH v7 16/18] drm/i915/hdcp: Add HDCP 2.2 stream register

Add HDCP 2.2 DP MST HDCP2_STREAM_STATUS and HDCP2_AUTH_STREAM register in i915_reg header. B.Spec: 21780 B.Spec: 14410 B.Spec: 50573 v2 - Modified naming convention of HDCP2_STREAM_STATUS for pre-gen12 platforms inline with B.Spec. Cc: Ramalingam C Reviewed-by: Uma Shankar Reviewed-by: Ramal

[Intel-gfx] [PATCH v7 17/18] drm/i915/hdcp: Support for HDCP 2.2 MST shim callbacks

Add support for HDCP 2.2 DP MST shim callback. This adds existing DP HDCP shim callback for Link Authentication and Encryption and HDCP 2.2 stream encryption callback. v2: - Added a WARN_ON() instead of drm_err. [Uma] - Cosmetic changes. [Uma] v3: - 's/port_data/hdcp_port_data' [Ram] - skip redund

[Intel-gfx] [PATCH v7 18/18] drm/i915/hdcp: Enable HDCP 2.2 MST support

Enable HDCP 2.2 over DP MST. Authenticate and enable port encryption only once for an active HDCP 2.2 session, once port is authenticated and encrypted enable encryption for each stream that requires encryption on this port. Similarly disable the stream encryption for each encrypted stream, once a

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for HDCP 2.2 and HDCP 1.4 Gen12 DP MST support (rev6)

== Series Details == Series: HDCP 2.2 and HDCP 1.4 Gen12 DP MST support (rev6) URL : https://patchwork.freedesktop.org/series/82998/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. - +./drivers/gpu

[Intel-gfx] ✗ Fi.CI.DOCS: warning for HDCP 2.2 and HDCP 1.4 Gen12 DP MST support (rev6)

== Series Details == Series: HDCP 2.2 and HDCP 1.4 Gen12 DP MST support (rev6) URL : https://patchwork.freedesktop.org/series/82998/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 Error: Cannot open file ./drivers/gpu/drm/i915/gt/intel_lrc.c WARNING: kernel-doc './s

Re: [Intel-gfx] [RFC v2] refactor intel display a bit more

There are all in this branch https://github.com/airlied/linux/commits/i915-display-refactor I moved more code in the skl planes patch and move some pipe code in there as well Will repost those tomorrow most likely. Dave. On Thu, 10 Dec 2020 at 14:18, Dave Airlie wrote: > > The first 3 are just

[Intel-gfx] [RFC-v4 02/21] drm/i915/pxp: set KCR reg init during the boot time

Set the KCR init during the boot time, which is required by hardware, to allow us doing further protection operation such as sending commands to GPU or TEE. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/pxp/intel_pxp.c | 8 1 file changed, 8 insertions(+) diff --git a/drivers/g

[Intel-gfx] [RFC-v4 04/21] drm/i915/pxp: Create the arbitrary session after boot

Create the arbitrary session, with the fixed session id 0xf, after system boot, for the case that application allocates the protected buffer without establishing any protection session. Because the hardware requires at least one alive session for protected buffer creation. This arbitrary session n

[Intel-gfx] [RFC-v4 06/21] drm/i915/pxp: Enable PXP irq worker and callback stub

Create the irq worker that serves as callback handler, those callback stubs should be called while the hardware key teardown occurs. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/gt/intel_gt_irq.c | 4 + drivers/gpu/drm/i915/i915_reg.h | 3 +- drivers/gpu/drm/i915/

[Intel-gfx] [RFC-v4 01/21] drm/i915/pxp: Introduce Intel PXP component

PXP (Protected Xe Path) is an i915 componment, available on GEN12+, that helps to establish the hardware protected session and manage the status of the alive software session, as well as its life cycle. This patch series is to allow the kernel space to create and manage a single hardware session (

[Intel-gfx] [RFC-v4 00/21] Introduce Intel PXP component - Mesa single session

PXP is an i915 componment, that helps to establish the hardware protected session and manage the status of the alive software session, as well as its life cycle. This patch series is to allow the kernel space to create and manage a single hardware session (a.k.a default session or arbitrary sessio

[Intel-gfx] [RFC-v4 15/21] drm/i915/pxp: Implement ioctl action to set session in play

With this ioctl action, userspace driver can set the session in state "session in play", after dirver reserved the session slot/id from kernel PXP, and sent the TEE commands to activate the corresponding hardware session. Session state "session in play" means this session is ready for secure playba

[Intel-gfx] [RFC-v4 09/21] drm/i915/pxp: Expose session state for display protection flip

Implement the intel_pxp_gem_object_status() to allow i915 display querying the current PXP session state. In the design, display should not perform protection flip on the protected buffers if there is no PXP session alive. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/pxp/intel_pxp.c | 9

[Intel-gfx] [RFC-v4 20/21] drm/i915/pxp: Add PXP-related registers into allowlist

Add several PXP-related reg into allowlist to allow user space driver to read the those register values. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/i915_reg.h | 6 drivers/gpu/drm/i915/intel_uncore.c | 50 - 2 files changed, 41 insertions(+), 15 d

[Intel-gfx] [RFC-v4 05/21] drm/i915/pxp: Func to send hardware session termination

Implement the functions to allow PXP to send a GPU command, in order to terminate the hardware session, so hardware can recycle this session slot for the next usage. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/Makefile| 1 + drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c | 156

[Intel-gfx] [RFC-v4 03/21] drm/i915/pxp: Implement funcs to create the TEE channel

Implement the funcs to create the TEE channel, so kernel can send the TEE commands directly to TEE for creating the arbitrary (defualt) session. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/Makefile| 3 +- drivers/gpu/drm/i915/i915_drv.c | 1 + drivers/gpu/drm/i

[Intel-gfx] [RFC-v4 16/21] drm/i915/pxp: Implement ioctl action to terminate the session

Implement the PXP ioctl action to allow userspace driver to terminate the hardware session and cleanup its software session state. PXP sends the session termination command to GPU once receves this ioctl action. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/pxp/intel_pxp.c | 10 +++

[Intel-gfx] [RFC-v4 12/21] drm/i915/pxp: User interface for Protected buffer

From: Bommu Krishnaiah This api allow user mode to create Protected buffer and context creation. Signed-off-by: Bommu Krishnaiah Cc: Telukuntla Sreedhar Cc: Kondapally Kalyan Cc: Gupta Anshuman Cc: Huang Sean Z --- drivers/gpu/drm/i915/gem/i915_gem_context.c | 15 ++-- drivers/gp

[Intel-gfx] [RFC-v4 13/21] drm/i915/pxp: Add plane decryption support

From: Anshuman Gupta Add support to enable/disable PLANE_SURF Decryption Request bit. It requires only to enable plane decryption support when following condition met. 1. PAVP session is enabled. 2. Buffer object is protected. v2: - Rebased to libva_cp-drm-tip_tgl_cp tree. - Used gen fb obj user

[Intel-gfx] [RFC-v4 21/21] drm/i915/pxp: Enable the PXP ioctl for protected session

In the previous commits, we have implemented the PXP ioctl functions. Now we enable those handlers and expose them as PXP ioctl, so allow the userspace driver can establish, set, or destory the protected session via this ioctl. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/i915_drv.c

[Intel-gfx] [RFC-v4 11/21] drm/i915/uapi: introduce drm_i915_gem_create_ext

From: Bommu Krishnaiah Same old gem_create but with now with extensions support. This is needed to support various upcoming usecases. For now we use the extensions mechanism to support PAVP. Signed-off-by: Bommu Krishnaiah Signed-off-by: Matthew Auld Cc: Joonas Lahtinen joonas.lahti...@linux.i

[Intel-gfx] [RFC-v4 17/21] drm/i915/pxp: Implement ioctl action to send TEE commands

Implement the ioctl action to allow userspace driver sends TEE commands via PXP ioctl, instead of TEE iotcl. So we can centralize those protection operations at PXP. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/pxp/intel_pxp.c | 48 +--- drivers/gpu/drm/i915/pxp/inte

[Intel-gfx] [RFC-v4 14/21] drm/i915/pxp: Implement ioctl action to reserve session slots

With this ioctl action, userspace driver can reserve one or multiple session slot/id assigned by kernel PXP, as the first step of PXP session establishment flow. The session info is stored in the session list structure. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/Makefile

[Intel-gfx] [RFC-v4 19/21] drm/i915/pxp: Termiante the session upon app crash

PXP should terminate the hardware session and cleanup the software state gracefully when the application has established the protection session, but doesn't close the session correctly due to some cases like application crash. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/i915_drv.c

[Intel-gfx] [RFC-v4 08/21] drm/i915/pxp: Enable PXP power management

During the power event S3+ sleep/resume, hardware will lose all the encryption keys for every hardware session, even though the software session state was marked as alive after resume. So to handle such case, PXP should terminate all the hardware sessions and cleanup all the software states after t

[Intel-gfx] [RFC-v4 10/21] mei: pxp: export pavp client to me client bus

From: Vitaly Lubart Export PAVP client to work with i915_cp driver, for binding it uses kernel component framework. Signed-off-by: Vitaly Lubart Signed-off-by: Tomas Winkler --- drivers/misc/mei/Kconfig | 2 + drivers/misc/mei/Makefile | 1 + drivers/misc/mei/pxp/Kconfig | 1

[Intel-gfx] [RFC-v4 18/21] drm/i915/pxp: Enable ioctl action to query PXP tag

Enable the PXP ioctl action to allow userspace driver to query the PXP tag, which is a 32-bit bitwise value indicating the current session info, including protection type, session id, and whether the session is enabled. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/pxp/intel_pxp.c

[Intel-gfx] [RFC-v4 07/21] drm/i915/pxp: Destroy arb session upon teardown

Teardown is triggered when the display topology changes and no long meets the secure playback requirement, and hardware trashes all the encryption keys for display. So as a result, PXP should handle such case and terminate the type0 sessions, which including arb session Signed-off-by: Huang, Sean

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm: Extract DPCD backlight helpers from i915, add support in nouveau

== Series Details == Series: drm: Extract DPCD backlight helpers from i915, add support in nouveau URL : https://patchwork.freedesktop.org/series/84754/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9467_full -> Patchwork_19103_full

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