Re: [Intel-gfx] [RFC i-g-t] intel_gpu_top: User friendly device listing

2020-10-15 Thread Tvrtko Ursulin
On 15/10/2020 05:36, Zbigniew Kempczyński wrote: On Wed, Oct 14, 2020 at 11:48:53AM +0100, Tvrtko Ursulin wrote: From: Tvrtko Ursulin Adding a new device selection print type suitable for user-facing use cases like intel_gpu_top -L and potentially lsgpu. Instead of: sys:/sys/devices/pci

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t v3] tests/core_hotunplug: Restore i915 debugfs health check

2020-10-15 Thread Marcin Bernatowicz
On Tue, 2020-10-13 at 13:02 +0200, Janusz Krzysztofik wrote: > Removal of igt_fork_hang_detector() from local_i915_healthcheck() by > commit 1fbd127bd4e1 ("core_hotplug: Teach the healthcheck how to > check > execution status") resulted in unintentional removal of an important > though implicit tes

[Intel-gfx] [PATCH i-g-t] i915/sysfs: Verify .defaults are read-only and match their namesakes

2020-10-15 Thread Chris Wilson
Signed-off-by: Chris Wilson --- tests/Makefile.sources | 3 + tests/i915/sysfs_defaults.c | 110 tests/meson.build | 1 + 3 files changed, 114 insertions(+) create mode 100644 tests/i915/sysfs_defaults.c diff --git a/tests/Makefile.sources

Re: [Intel-gfx] [PATCH] drm/i915/ehl: Remove require_force_probe protection

2020-10-15 Thread K, SrinivasX
Hi Hariom, With Sunil's help was able to see EHL achieving rc6 state. Verified from sys entries, under no load to gpu rc6_residency_ms counter is changing. Also ran all the Rodrigo mention tests and I see them passing. But with i915_selftest dmesg warnings are still seen. Thanks, Srinivas ---

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] tests/core_hotunplug: Take care of closing fences before failing

2020-10-15 Thread Marcin Bernatowicz
On Wed, 2020-10-14 at 18:55 +0200, Janusz Krzysztofik wrote: > The test was designed to keep track of open device file descriptors > for safe driver unbind on recovery from a failed subtest. In that > context, fences introduced by commit 1fbd127bd4e1 ("core_hotplug: > Teach the healthcheck how to

[Intel-gfx] [PATCH] drm/i915/jsl: Remove require_force_probe protection

2020-10-15 Thread Kamati Srinivas
Removing force probe protection from JSL platform. Did not observe warnings, errors, flickering or any visual defects while doing ordinary tasks like browsing and editing documents in a two monitor setup. Signed-off-by: Kamati Srinivas --- drivers/gpu/drm/i915/i915_pci.c | 1 - 1 file changed, 1

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/jsl: Remove require_force_probe protection

2020-10-15 Thread Patchwork
== Series Details == Series: drm/i915/jsl: Remove require_force_probe protection URL : https://patchwork.freedesktop.org/series/82710/ State : success == Summary == CI Bug Log - changes from CI_DRM_9139 -> Patchwork_18701 Summary ---

[Intel-gfx] [RFC 02/13] drm/edid: Parse MAX_FRL field from HFVSDB block

2020-10-15 Thread Ankit Nautiyal
From: Swati Sharma This patch parses MAX_FRL field to get the MAX rate in Gbps that the HDMI 2.1 panel can support in FRL mode. Source need this field to determine the optimal rate between the source and sink during FRL training. Signed-off-by: Sharma, Swati2 Signed-off-by: Ankit Nautiyal ---

[Intel-gfx] [RFC 01/13] drm/edid: Add additional HFVSDB fields for HDMI2.1

2020-10-15 Thread Ankit Nautiyal
From: Swati Sharma The HDMI2.1 extends HFVSBD (HDMI Forum Vendor Specific Data block) to have fields related to newly defined methods of FRL (Fixed Rate Link) levels, number of lanes supported, DSC Color bit depth, VRR min/max, FVA (Fast Vactive), ALLM etc. This patch adds the new HFVSDB fields

[Intel-gfx] [RFC 00/13] Add support for DP-HDMI2.1 PCON

2020-10-15 Thread Ankit Nautiyal
This patch series attempts to add support for a DP-HDMI2.1 Protocol Convertor. The VESA spec for the HDMI2.1 PCON are proposed in Errata E5 to DisplayPort_v2.0: https://vesa.org/join-vesamemberships/member-downloads/?action=stamp&fileid=42299 The details are mentioned in DP to HDMI2.1 PCON Enum/Con

[Intel-gfx] [RFC 07/13] drm/dp_helper: Add support for link status and link recovery

2020-10-15 Thread Ankit Nautiyal
From: Swati Sharma This patch adds support for link status and link recovery. There are specific DPCD’s defined for link status check and recovery in case of any issues. PCON will communicate the same using an IRQ_HPD to source. HDMI sink would have indicated the same to PCON using SCDC interrupt

[Intel-gfx] [RFC 08/13] drm/i915: Add support for enabling link status and recovery

2020-10-15 Thread Ankit Nautiyal
From: Swati Sharma In this patch enabled support for link status and recovery in i915 driver. HDMI link loss indication to upstream DP source is indicated via IRQ_HPD. This is followed by reading of HDMI link configuration status (HDMI_TX_LINK_ACTIVE_STATUS). If the PCON → HDMI 2.1 link status is

[Intel-gfx] [RFC 03/13] drm/dp_helper: Add FRL training support for a DP-HDMI2.1 PCON

2020-10-15 Thread Ankit Nautiyal
This patch adds support for configuring a PCON device, connected as a DP branched device to enable FRL Link training with a HDMI2.1 + sink. v2: Minor changes: -removed unnecessary argument supplied to a drm helper function. -fixed return value for max frl read from pcon. Signed-off-by: Ankit Naut

[Intel-gfx] [RFC 04/13] drm/i915: Capture max frl rate for PCON in dfp cap structure

2020-10-15 Thread Ankit Nautiyal
HDMI2.1 PCON advertises Max FRL bandwidth supported by the PCON and by the sink. This patch captures these in dfp cap structure in intel_dp and uses these to prune connector modes that cannot be supported by the PCON and sink FRL bandwidth. Signed-off-by: Ankit Nautiyal --- .../drm/i915/display

[Intel-gfx] [RFC 13/13] drm/i915: Configure PCON for DSC1.1 to DSC1.2 encoding

2020-10-15 Thread Ankit Nautiyal
When a source supporting DSC1.1 is connected to DSC1.2 HDMI2.1 sink via DP HDMI2.1 PCON, the PCON can be configured to decode the DSC1.1 compressed stream and encode to DSC1.2. It then sends the DSC1.2 compressed stream to the HDMI2.1 sink. This patch configures the PCON for DSC1.1 to DSC1.2 encod

[Intel-gfx] [RFC 11/13] drm/i915: Read DSC capabilities of the HDMI2.1 PCON encoder

2020-10-15 Thread Ankit Nautiyal
This patch adds a helper function to read the DSC capabilities of the HDMI2.1 PCon encoder. It also adds a new structure to store these caps, which can then be used to get the PPS parameters for PCON-HDMI2.1 sink pair. Which inturn will be used to take a call to override the existing PPS-metadata,

[Intel-gfx] [RFC 05/13] drm/i915: Add support for starting FRL training for HDMI2.1 via PCON

2020-10-15 Thread Ankit Nautiyal
This patch adds functions to start FRL training for an HDMI2.1 sink, connected via a PCON as a DP branch device. This patch also adds a new structure for storing frl training related data, when FRL training is completed. Signed-off-by: Ankit Nautiyal --- .../drm/i915/display/intel_display_types.

[Intel-gfx] [RFC 06/13] drm/i915: Check for FRL training before DP Link training

2020-10-15 Thread Ankit Nautiyal
This patch calls functions to check FRL training requirements for an HDMI2.1 sink, when connected through PCON. The call is made before the DP link training. In case FRL is not required or failure during FRL training, the TMDS mode is selected for the pcon. Signed-off-by: Ankit Nautiyal --- driv

[Intel-gfx] [RFC 12/13] drm/i915: Add helper functions for calculating DSC parameters for HDMI2.1

2020-10-15 Thread Ankit Nautiyal
The DP-HDMI2.1 PCON spec provides way for a source to set PPS parameters: slice height, slice width and bits_per_pixel, based on the HDMI2.1 sink capabilities. The DSC encoder of the PCON will respect these parameters, while preparing the 128 byte PPS. This patch adds helper functions to calculate

[Intel-gfx] [RFC 09/13] drm/edid: Parse DSC1.2 cap fields from HFVSDB block

2020-10-15 Thread Ankit Nautiyal
This patch parses HFVSDB fields for DSC1.2 capabilities of an HDMI2.1 sink. These fields are required by a source to understand the DSC capability of the sink, to set appropriate PPS parameters, before transmitting compressed data stream. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/drm_edi

[Intel-gfx] [RFC 10/13] drm/dp_helper: Add support for Configuring DSC for HDMI2.1 Pcon

2020-10-15 Thread Ankit Nautiyal
This patch adds registers for getting DSC encoder capability for a HDMI2.1 PCon. It also addes helper functions to configure DSC between the PCON and HDMI2.1 sink. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/drm_dp_helper.c | 93 +++ include/drm/drm_dp_helper.h

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/jsl: Remove require_force_probe protection

2020-10-15 Thread Patchwork
== Series Details == Series: drm/i915/jsl: Remove require_force_probe protection URL : https://patchwork.freedesktop.org/series/82710/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9139_full -> Patchwork_18701_full Summary

[Intel-gfx] [PATCH v3 11/63] drm/i915: Disable userptr pread/pwrite support.

2020-10-15 Thread Maarten Lankhorst
Userptr should not need the kernel for a userspace memcpy, userspace needs to call memcpy directly. Signed-off-by: Maarten Lankhorst --- .../gpu/drm/i915/gem/i915_gem_object_types.h | 2 ++ drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 20 +++ drivers/gpu/drm/i915/i915_gem.c

[Intel-gfx] [PATCH v3 04/63] drm/i915: Pin timeline map after first timeline pin, v3.

2020-10-15 Thread Maarten Lankhorst
We're starting to require the reservation lock for pinning, so wait until we have that. Update the selftests to handle this correctly, and ensure pin is called in live_hwsp_rollover_user() and mock_hwsp_freelist(). Changes since v1: - Fix NULL + XX arithmatic, use casts. (kbuild) Changes since v2

[Intel-gfx] [PATCH v3 03/63] drm/i915: Do not share hwsp across contexts any more, v3.

2020-10-15 Thread Maarten Lankhorst
Instead of sharing pages with breadcrumbs, give each timeline a single page. This allows unrelated timelines not to share locks any more during command submission. As an additional benefit, seqno wraparound no longer requires i915_vma_pin, which means we no longer need to worry about a potential -

[Intel-gfx] [PATCH v3 59/63] drm/i915/selftests: Prepare gtt tests for obj->mm.lock removal

2020-10-15 Thread Maarten Lankhorst
We need to lock the global gtt dma_resv, use i915_vm_lock_objects to handle this correctly. Add ww handling for this where required. Add the object lock around unpin/put pages, and use the unlocked versions of pin_pages and pin_map where required. Signed-off-by: Maarten Lankhorst --- drivers/gp

[Intel-gfx] [PATCH v3 14/63] drm/i915: Reject UNSYNCHRONIZED for userptr

2020-10-15 Thread Maarten Lankhorst
We should not allow this any more, as it will break with the new userptr implementation, it could still be made to work, but there's no point in doing so. Signed-off-by: Maarten Lankhorst --- .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 2 + drivers/gpu/drm/i915/gem/i915_gem_object.h| 4

[Intel-gfx] [PATCH v3 48/63] drm/i915/selftests: Prepare object blit tests for obj->mm.lock removal.

2020-10-15 Thread Maarten Lankhorst
Use some unlocked versions where we're not holding the ww lock. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c b/driv

[Intel-gfx] [PATCH v3 18/63] drm/i915: Make ring submission compatible with obj->mm.lock removal, v2.

2020-10-15 Thread Maarten Lankhorst
We map the initial context during first pin. This allows us to remove pin_map from state allocation, which saves us a few retry loops. We won't need this until first pin anyway. intel_ring_submission_setup() is also reworked slightly to do all pinning in a single ww loop. Changes since v1: - Han

[Intel-gfx] [PATCH v3 02/63] drm/i915: Add missing -EDEADLK handling to execbuf pinning

2020-10-15 Thread Maarten Lankhorst
i915_vma_pin may fail with -EDEADLK when we start locking page tables, so ensure we handle this correctly. Signed-off-by: Maarten Lankhorst --- .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 23 +++ 1 file changed, 18 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i

[Intel-gfx] [PATCH v3 33/63] drm/i915: Add ww locking around vm_access()

2020-10-15 Thread Maarten Lankhorst
i915_gem_object_pin_map potentially needs a ww context, so ensure we have one we can revoke. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/i915_gem_mman.c | 24 ++-- 1 file changed, 22 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_g

[Intel-gfx] [PATCH v3 46/63] drm/i915/selftests: Prepare mman testcases for obj->mm.lock removal.

2020-10-15 Thread Maarten Lankhorst
Ensure we hold the lock around put_pages, and use the unlocked wrappers for pinning pages and mappings. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c | 10 ++ 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/

[Intel-gfx] [PATCH v3 50/63] drm/i915/selftests: Prepare context selftest for obj->mm.lock removal

2020-10-15 Thread Maarten Lankhorst
Only needs to convert a single call to the unlocked version. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gt/selftest_context.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/selftest_context.c b/drivers/gpu/drm/i915/gt/selftest_cont

[Intel-gfx] [PATCH v3 28/63] drm/i915: Defer pin calls in buffer pool until first use by caller.

2020-10-15 Thread Maarten Lankhorst
We need to take the obj lock to pin pages, so wait until the callers have done so, before making the object unshrinkable. Signed-off-by: Maarten Lankhorst --- .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 2 + .../gpu/drm/i915/gem/i915_gem_object_blt.c| 6 +++ .../gpu/drm/i915/gt/intel_g

[Intel-gfx] [PATCH v3 17/63] drm/i915: Populate logical context during first pin.

2020-10-15 Thread Maarten Lankhorst
This allows us to remove pin_map from state allocation, which saves us a few retry loops. We won't need this until first pin, anyway. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gt/intel_context_types.h | 13 ++- drivers/gpu/drm/i915/gt/intel_lrc.c | 107 +---

[Intel-gfx] [PATCH v3 21/63] drm/i915: Pass ww ctx to intel_pin_to_display_plane

2020-10-15 Thread Maarten Lankhorst
Instead of multiple lockings, lock the object once, and perform the ww dance around attach_phys and pin_pages. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/display/intel_display.c | 69 --- drivers/gpu/drm/i915/display/intel_display.h | 2 +- drivers/gpu/drm/i915/

[Intel-gfx] [PATCH v3 20/63] drm/i915: Rework clflush to work correctly without obj->mm.lock.

2020-10-15 Thread Maarten Lankhorst
Pin in the caller, not in the work itself. This should also work better for dma-fence annotations. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/i915_gem_clflush.c | 15 +++ 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_ge

[Intel-gfx] [PATCH v3 47/63] drm/i915/selftests: Prepare object tests for obj->mm.lock removal.

2020-10-15 Thread Maarten Lankhorst
Convert a single pin_pages call to use the unlocked version. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/selftests/i915_gem_object.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_object.c b/drivers/gpu/drm/i915/

[Intel-gfx] [PATCH v3 52/63] drm/i915/selftests: Prepare execlists for obj->mm.lock removal

2020-10-15 Thread Maarten Lankhorst
Convert normal functions to unlocked versions where needed. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gt/selftest_lrc.c | 34 +- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/

[Intel-gfx] [PATCH v3 54/63] drm/i915/selftests: Prepare ring submission for obj->mm.lock removal

2020-10-15 Thread Maarten Lankhorst
Use unlocked versions when the ww lock is not held. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gt/selftest_ring_submission.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/selftest_ring_submission.c b/drivers/gpu/drm/i915/gt/selfte

[Intel-gfx] [PATCH v3 43/63] drm/i915/selftests: Prepare context tests for obj->mm.lock removal.

2020-10-15 Thread Maarten Lankhorst
Straightforward conversion, just convert a bunch of calls to unlocked versions. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_co

[Intel-gfx] [PATCH v3 31/63] drm/i915: Prepare for obj->mm.lock removal

2020-10-15 Thread Maarten Lankhorst
From: Thomas Hellström Stolen objects need to lock, and we may call put_pages when refcount drops to 0, ensure all calls are handled correctly. Idea-from: Thomas Hellström Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/i915_gem_object.h | 14 ++ drivers/gpu/drm/i915

[Intel-gfx] [PATCH v3 37/63] drm/i915: Add missing ww lock in intel_dsb_prepare.

2020-10-15 Thread Maarten Lankhorst
Because of the long lifetime of the mapping, we cannot wrap this in a simple limited ww lock. Just use the unlocked version of pin_map, because we'll likely release the mapping a lot later, in a different thread. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/display/intel_dsb.c | 2 +

[Intel-gfx] [PATCH v3 07/63] drm/i915: Move HAS_STRUCT_PAGE to obj->flags

2020-10-15 Thread Maarten Lankhorst
We want to remove the changing of ops structure for attaching phys pages, so we need to kill off HAS_STRUCT_PAGE from ops->flags, and put it in the bo. This will remove a potential race of dereferencing the wrong obj->ops without ww mutex held. Signed-off-by: Maarten Lankhorst --- drivers/gpu/d

[Intel-gfx] [PATCH v3 05/63] drm/i915: Ensure we hold the object mutex in pin correctly.

2020-10-15 Thread Maarten Lankhorst
Currently we have a lot of places where we hold the gem object lock, but haven't yet been converted to the ww dance. Complain loudly about those places. i915_vma_pin shouldn't have the obj lock held, so we can do a ww dance, while i915_vma_pin_ww should. Signed-off-by: Maarten Lankhorst --- dri

[Intel-gfx] [PATCH v3 30/63] drm/i915: Fix workarounds selftest, part 1

2020-10-15 Thread Maarten Lankhorst
pin_map needs the ww lock, so ensure we pin both before submission. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/i915_gem_object.h| 3 + drivers/gpu/drm/i915/gem/i915_gem_pages.c | 12 +++ .../gpu/drm/i915/gt/selftest_workarounds.c| 76 --- 3 files c

[Intel-gfx] [PATCH v3 25/63] drm/i915: Make intel_init_workaround_bb more compatible with ww locking.

2020-10-15 Thread Maarten Lankhorst
Make creation separate from pinning, in order to take the lock only once, and pin the mapping with the lock held. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gt/intel_lrc.c | 43 ++--- 1 file changed, 33 insertions(+), 10 deletions(-) diff --git a/drivers/g

[Intel-gfx] [PATCH v3 13/63] drm/i915: Reject more ioctls for userptr

2020-10-15 Thread Maarten Lankhorst
Allow set_domain to fail silently, waiting for idle should be good enough. set_tiling and set_caching are rejected with -ENXIO, there's no valid reason to allow it. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/display/intel_display.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_domain.

[Intel-gfx] [PATCH v3 38/63] drm/i915: Fix ww locking in shmem_create_from_object

2020-10-15 Thread Maarten Lankhorst
Quick fix, just use the unlocked version. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gt/shmem_utils.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/shmem_utils.c b/drivers/gpu/drm/i915/gt/shmem_utils.c index 43c7acbdc79d..8c8dfa41e032

[Intel-gfx] [PATCH v3 60/63] drm/i915: Finally remove obj->mm.lock.

2020-10-15 Thread Maarten Lankhorst
With all callers and selftests fixed to use ww locking, we can now finally remove this lock. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/i915_gem_object.c| 2 - drivers/gpu/drm/i915/gem/i915_gem_object.h| 5 +-- .../gpu/drm/i915/gem/i915_gem_object_types.h | 1 - dr

[Intel-gfx] [PATCH v3 00/63] drm/i915: Remove obj->mm.lock!

2020-10-15 Thread Maarten Lankhorst
Finally there, just needs a lot of fixes! A lot of places were calling certain calls without any object lock held, with the removal of mm.lock we can no longer do this, and have to fix it. Phys page handling has to be redone, as nothing protects obj->ops structure, we have to remove swapping it,

[Intel-gfx] [PATCH v3 27/63] drm/i915: Take obj lock around set_domain ioctl

2020-10-15 Thread Maarten Lankhorst
We need to lock the object to move it to the correct domain, add the missing lock. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/i915_gem_domain.c | 17 + 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.c b/d

[Intel-gfx] [PATCH v3 01/63] drm/i915: Move cmd parser pinning to execbuffer

2020-10-15 Thread Maarten Lankhorst
We need to get rid of allocations in the cmd parser, because it needs to be called from a signaling context, first move all pinning to execbuf, where we already hold all locks. Allocate jump_whitelist in the execbuffer, and add annotations around intel_engine_cmd_parser(), to ensure we only call t

[Intel-gfx] [PATCH v3 35/63] drm/i915: Lock ww in ucode objects correctly

2020-10-15 Thread Maarten Lankhorst
In the ucode functions, the calls are done before userspace runs, when debugging using debugfs, or when creating semi-permanent mappings; we can safely use the unlocked versions that does the ww dance for us. Because there is no pin_pages_unlocked yet, add it as convenience function. This removes

[Intel-gfx] [PATCH v3 61/63] drm/i915: Keep userpointer bindings if seqcount is unchanged, v2.

2020-10-15 Thread Maarten Lankhorst
Instead of force unbinding and rebinding every time, we try to check if our notifier seqcount is still correct when pages are bound. This way we only rebind userptr when we need to, and prevent stalls. Changes since v1: - Missing mutex_unlock, reported by kbuild. Reported-by: kernel test robot R

[Intel-gfx] [PATCH v3 06/63] drm/i915: Add gem object locking to madvise.

2020-10-15 Thread Maarten Lankhorst
Doesn't need the full ww lock, only checking if pages are bound. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/i915_gem.c | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index bb0c12975f38..3

[Intel-gfx] [PATCH v3 49/63] drm/i915/selftests: Prepare igt_gem_utils for obj->mm.lock removal

2020-10-15 Thread Maarten Lankhorst
igt_emit_store_dw needs to use the unlocked version, as it's not holding a lock. This fixes igt_gpu_fill_dw() which is used by some other selftests. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff

[Intel-gfx] [PATCH v3 10/63] drm/i915: make lockdep slightly happier about execbuf.

2020-10-15 Thread Maarten Lankhorst
As soon as we install fences, we should stop allocating memory in order to prevent any potential deadlocks. This is required later on, when we start adding support for dma-fence annotations. Signed-off-by: Maarten Lankhorst --- .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 24 ++--

[Intel-gfx] [PATCH v3 16/63] drm/i915: Flatten obj->mm.lock

2020-10-15 Thread Maarten Lankhorst
With userptr fixed, there is no need for all separate lockdep classes now, and we can remove all lockdep tricks used. A trylock in the shrinker is all we need now to flatten the locking hierarchy. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/i915_gem_object.c | 6 +--- driver

[Intel-gfx] [PATCH v3 63/63] drm/i915: Keep lazy reference to userptr pages

2020-10-15 Thread Maarten Lankhorst
Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 28 +++-- 1 file changed, 20 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c index b0c1cc5fa917..0ae737871f84 1

[Intel-gfx] [PATCH v3 56/63] drm/i915/selftests: Prepare i915_request tests for obj->mm.lock removal

2020-10-15 Thread Maarten Lankhorst
Straightforward conversion by using unlocked versions. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/selftests/i915_request.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/selftests/i915_request.c b/drivers/gpu/drm/i915/selftests

[Intel-gfx] [PATCH v3 41/63] drm/i915/selftests: Prepare client blit for obj->mm.lock removal.

2020-10-15 Thread Maarten Lankhorst
Straightforward conversion, just convert a bunch of calls to unlocked versions. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_cl

[Intel-gfx] [PATCH v3 26/63] drm/i915: Make __engine_unpark() compatible with ww locking.

2020-10-15 Thread Maarten Lankhorst
Take the ww lock around engine_unpark. Because of the many many places where rpm is used, I chose the safest option and used a trylock to opportunistically take this lock for __engine_unpark. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gt/intel_engine_pm.c | 4 +++- 1 file changed,

[Intel-gfx] [PATCH v3 12/63] drm/i915: No longer allow exporting userptr through dma-buf

2020-10-15 Thread Maarten Lankhorst
It doesn't make sense to export a memory address, we will prevent allowing access this way to different address spaces when we rework userptr handling, so best to explicitly disable it. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 5 ++--- 1 file changed, 2

[Intel-gfx] [PATCH v3 62/63] drm/i915: Idea to implement eviction locking

2020-10-15 Thread Maarten Lankhorst
Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/i915_gem_object.h | 39 +++- drivers/gpu/drm/i915/gem/i915_gem_shrinker.c | 10 - drivers/gpu/drm/i915/i915_gem.c | 29 ++- drivers/gpu/drm/i915/i915_gem.h | 5 ++- 4 files c

[Intel-gfx] [PATCH v3 19/63] drm/i915: Handle ww locking in init_status_page

2020-10-15 Thread Maarten Lankhorst
Try to pin to ggtt first, and use a full ww loop to handle eviction correctly. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 37 +++ 1 file changed, 24 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b

[Intel-gfx] [PATCH v3 58/63] drm/i915/selftests: Prepare cs engine tests for obj->mm.lock removal

2020-10-15 Thread Maarten Lankhorst
Same as other tests, use pin_map_unlocked. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gt/selftest_engine_cs.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c index

[Intel-gfx] [PATCH v3 15/63] drm/i915: Fix userptr so we do not have to worry about obj->mm.lock, v3.

2020-10-15 Thread Maarten Lankhorst
Instead of doing what we do currently, which will never work with PROVE_LOCKING, do the same as AMD does, and something similar to relocation slowpath. When all locks are dropped, we acquire the pages for pinning. When the locks are taken, we transfer those pages in .get_pages() to the bo. As a fin

[Intel-gfx] [PATCH v3 45/63] drm/i915/selftests: Prepare execbuf tests for obj->mm.lock removal.

2020-10-15 Thread Maarten Lankhorst
Also quite simple, a single call needs to use the unlocked version. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/selftests/i915_gem_execbuffer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_execbuffer.c b/driver

[Intel-gfx] [PATCH v3 40/63] drm/i915/selftests: Prepare huge_pages testcases for obj->mm.lock removal.

2020-10-15 Thread Maarten Lankhorst
Straightforward conversion, just convert a bunch of calls to unlocked versions. Signed-off-by: Maarten Lankhorst --- .../gpu/drm/i915/gem/selftests/huge_pages.c | 28 ++- 1 file changed, 21 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/selftests/huge_page

[Intel-gfx] [PATCH v3 22/63] drm/i915: Add object locking to vm_fault_cpu

2020-10-15 Thread Maarten Lankhorst
Take a simple lock so we hold ww around (un)pin_pages as needed. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/i915_gem_mman.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c index 5aa037

[Intel-gfx] [PATCH v3 23/63] drm/i915: Move pinning to inside engine_wa_list_verify()

2020-10-15 Thread Maarten Lankhorst
This should be done as part of the ww loop, in order to remove a i915_vma_pin that needs ww held. Now only i915_ggtt_pin() callers remaining. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 24 -- .../gpu/drm/i915/gt/selftest_workarounds.c

[Intel-gfx] [PATCH v3 32/63] drm/i915: Add igt_spinner_pin() to allow for ww locking around spinner.

2020-10-15 Thread Maarten Lankhorst
By default, we assume that it's called inside igt_create_request to keep existing selftests working, but allow for manual pinning when passing a ww context. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/selftests/igt_spinner.c | 136 --- drivers/gpu/drm/i915/selftests

[Intel-gfx] [PATCH v3 08/63] drm/i915: Rework struct phys attachment handling

2020-10-15 Thread Maarten Lankhorst
Instead of creating a separate object type, we make changes to the shmem type, to clear struct page backing. This will allow us to ensure we never run into a race when we exchange obj->ops with other function pointers. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/i915_gem_object

[Intel-gfx] [PATCH v3 44/63] drm/i915/selftests: Prepare dma-buf tests for obj->mm.lock removal.

2020-10-15 Thread Maarten Lankhorst
Use pin_pages_unlocked() where we don't have a lock. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/gem/self

[Intel-gfx] [PATCH v3 29/63] drm/i915: Fix pread/pwrite to work with new locking rules.

2020-10-15 Thread Maarten Lankhorst
We are removing obj->mm.lock, and need to take the reservation lock before we can pin pages. Move the pinning pages into the helper, and merge gtt pwrite/pread preparation and cleanup paths. The fence lock is also removed; it will conflict with fence annotations, because of memory allocations done

[Intel-gfx] [PATCH v3 57/63] drm/i915/selftests: Prepare memory region tests for obj->mm.lock removal

2020-10-15 Thread Maarten Lankhorst
Use the unlocked variants for pin_map and pin_pages, and add lock around unpinning/putting pages. Signed-off-by: Maarten Lankhorst --- .../drm/i915/selftests/intel_memory_region.c | 18 +++--- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/selft

[Intel-gfx] [PATCH v3 53/63] drm/i915/selftests: Prepare mocs tests for obj->mm.lock removal

2020-10-15 Thread Maarten Lankhorst
Use pin_map_unlocked when we're not holding locks. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gt/selftest_mocs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/selftest_mocs.c b/drivers/gpu/drm/i915/gt/selftest_mocs.c index b25eba50c88

[Intel-gfx] [PATCH v3 36/63] drm/i915: Add ww locking to dma-buf ops.

2020-10-15 Thread Maarten Lankhorst
vmap is using pin_pages, but needs to use ww locking, add pin_pages_unlocked to correctly lock the mapping. Also add ww locking to begin/end cpu access. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 60 -- 1 file changed, 33 insertions(+),

[Intel-gfx] [PATCH v3 55/63] drm/i915/selftests: Prepare timeline tests for obj->mm.lock removal

2020-10-15 Thread Maarten Lankhorst
We can no longer call intel_timeline_pin with a null argument, so add a ww loop that locks the backing object. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gt/selftest_timeline.c | 26 ++--- 1 file changed, 23 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/d

[Intel-gfx] [PATCH v3 34/63] drm/i915: Increase ww locking for perf.

2020-10-15 Thread Maarten Lankhorst
We need to lock a few more objects, some temporarily, add ww lock where needed. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/i915_perf.c | 56 1 file changed, 43 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/

[Intel-gfx] [PATCH v3 42/63] drm/i915/selftests: Prepare coherency tests for obj->mm.lock removal.

2020-10-15 Thread Maarten Lankhorst
Straightforward conversion, just convert a bunch of calls to unlocked versions. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_coheren

[Intel-gfx] [PATCH v3 51/63] drm/i915/selftests: Prepare hangcheck for obj->mm.lock removal

2020-10-15 Thread Maarten Lankhorst
Convert a few calls to use the unlocked versions. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c b/drivers/gpu/drm/i915/gt/selftest_hangche

[Intel-gfx] [PATCH v3 39/63] drm/i915: Use a single page table lock for each gtt.

2020-10-15 Thread Maarten Lankhorst
We may create page table objects on the fly, but we may need to wait with the ww lock held. Instead of waiting on a freed obj lock, ensure we have the same lock for each object to keep -EDEADLK working. This ensures that i915_vma_pin_ww can lock the page tables when required. Signed-off-by: Maarte

[Intel-gfx] [PATCH v3 24/63] drm/i915: Take reservation lock around i915_vma_pin.

2020-10-15 Thread Maarten Lankhorst
We previously complained when ww == NULL. This function is now only used in selftests to pin an object, and ww locking is now fixed. Signed-off-by: Maarten Lankhorst --- .../i915/gem/selftests/i915_gem_coherency.c | 14 + drivers/gpu/drm/i915/i915_gem.c | 6 +-

[Intel-gfx] [PATCH v3 09/63] drm/i915: Convert i915_gem_object_attach_phys() to ww locking

2020-10-15 Thread Maarten Lankhorst
Simple adding of i915_gem_object_lock, we may start to pass ww to get_pages() in the future, but that won't be the case here; We override shmem's get_pages() handling by calling i915_gem_object_get_pages_phys(), no ww is needed. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/i915_

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add support for DP-HDMI2.1 PCON (rev3)

2020-10-15 Thread Patchwork
== Series Details == Series: Add support for DP-HDMI2.1 PCON (rev3) URL : https://patchwork.freedesktop.org/series/82098/ State : warning == Summary == $ dim checkpatch origin/drm-tip b6564bd05445 drm/edid: Add additional HFVSDB fields for HDMI2.1 -:57: WARNING:NO_AUTHOR_SIGN_OFF: Missing Sign

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add support for DP-HDMI2.1 PCON (rev3)

2020-10-15 Thread Patchwork
== Series Details == Series: Add support for DP-HDMI2.1 PCON (rev3) URL : https://patchwork.freedesktop.org/series/82098/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. - +./drivers/gpu/drm/amd/am

Re: [Intel-gfx] [PATCH v10 04/11] drm/i915/dp: Allow big joiner modes in intel_dp_mode_valid(), v3.

2020-10-15 Thread Ville Syrjälä
On Wed, Oct 14, 2020 at 12:04:10PM -0700, Navare, Manasi wrote: > On Wed, Oct 14, 2020 at 02:26:34PM +0300, Ville Syrjälä wrote: > > On Thu, Oct 08, 2020 at 02:45:28PM -0700, Manasi Navare wrote: > > > From: Maarten Lankhorst > > > > > > Small changes to intel_dp_mode_valid(), allow listing modes

[Intel-gfx] [PATCH] drm/i915/gem: Support parsing of oversize batches

2020-10-15 Thread Chris Wilson
Matthew Auld noted that on more recent systems (such as the parser for gen9) we may have objects that are larger than expected by the GEM uAPI (i.e. greater than u32). These objects would have incorrect implicit batch lengths, causing the parser to reject them for being incomplete. Based on a patc

[Intel-gfx] [PATCH] drm/i915/gem: Support parsing of oversize batches

2020-10-15 Thread Chris Wilson
Matthew Auld noted that on more recent systems (such as the parser for gen9) we may have objects that are larger than expected by the GEM uAPI (i.e. greater than u32). These objects would have incorrect implicit batch lengths, causing the parser to reject them for being incomplete, or worse. Based

[Intel-gfx] ✓ Fi.CI.BAT: success for Add support for DP-HDMI2.1 PCON (rev3)

2020-10-15 Thread Patchwork
== Series Details == Series: Add support for DP-HDMI2.1 PCON (rev3) URL : https://patchwork.freedesktop.org/series/82098/ State : success == Summary == CI Bug Log - changes from CI_DRM_9140 -> Patchwork_18702 Summary --- **SUCCESS**

[Intel-gfx] [CI 2/4] drm/i915: Fix MOCS PTE setting for gen9+

2020-10-15 Thread Chris Wilson
From: Ville Syrjälä Fix up the MOCS PTE setting to really get the LLC cacheability from the PTE rather than hardocoding it to LLC or LLC+eLLC. Signed-off-by: Ville Syrjälä Reviewed-by: Chris Wilson Signed-off-by: Chris Wilson Link: https://patchwork.freedesktop.org/patch/msgid/20201007120329

[Intel-gfx] [CI 4/4] drm/i915/gt: Fixup tgl mocs for PTE tracking

2020-10-15 Thread Chris Wilson
Forcing mocs:1 [used for our winsys follows-pte mode] to be cached caused display glitches. Though it is documented as deprecated (and so likely behaves as uncached) use the follow-pte bit and force it out of L3 cache. Fixes: 4d8a5cfe3b13 ("drm/i915/gt: Initialize reserved and unspecified MOCS in

[Intel-gfx] [CI 1/4] drm/i915: Mark ininitial fb obj as WT on eLLC machines to avoid rcu lockup during fbdev init

2020-10-15 Thread Chris Wilson
From: Ville Syrjälä Currently we leave the cache_level of the initial fb obj set to NONE. This means on eLLC machines the first pin_to_display() will try to switch it to WT which requires a vma unbind+bind. If that happens during the fbdev initialization rcu does not seem operational which causes

[Intel-gfx] [CI 3/4] drm/i915: Enable eLLC caching of display buffers for SKL+

2020-10-15 Thread Chris Wilson
From: Ville Syrjälä Since SKL the eLLC has been sitting on the far side of the system agent, meaning the display engine can utilize it. Let's enable that. I chose WB for the caching mode, because my numbers are indicating that WT might actually be WB and WC might actually be UC. I'm not 100% sur

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t v3] tests/core_hotunplug: Restore i915 debugfs health check

2020-10-15 Thread Janusz Krzysztofik
On Thu, 2020-10-15 at 09:15 +0200, Marcin Bernatowicz wrote: > On Tue, 2020-10-13 at 13:02 +0200, Janusz Krzysztofik wrote: > > Removal of igt_fork_hang_detector() from local_i915_healthcheck() by > > commit 1fbd127bd4e1 ("core_hotplug: Teach the healthcheck how to > > check > > execution status")

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 01/10] i915/gem_userptr_blits: Tighten has_userptr()

2020-10-15 Thread Tvrtko Ursulin
On 14/10/2020 11:40, Chris Wilson wrote: We use has_userptr() to determine if the different flags are supported, so it helps not to override the flags inside the test. Signed-off-by: Chris Wilson --- tests/i915/gem_userptr_blits.c | 12 ++-- 1 file changed, 6 insertions(+), 6 delet

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Apply WAC6entrylatency to kbl/cfl

2020-10-15 Thread Ville Syrjälä
On Thu, Jul 16, 2020 at 10:04:26PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > WAC6entrylatency is trying to fix excessive rc6 entry latency caused > by the extra delay from FBC_LLC_READ_CTRL, which is there for some > extra sync with uncore for frame buffer caching in LLC. > > Reading

Re: [Intel-gfx] [PATCH v10 06/11] drm/i915: Enable big joiner support in enable and disable sequences.

2020-10-15 Thread Ville Syrjälä
On Thu, Oct 08, 2020 at 02:45:30PM -0700, Manasi Navare wrote: > @@ -4504,6 +4514,29 @@ void intel_ddi_get_config(struct intel_encoder > *encoder, > default: > break; > } > +} > + > +void intel_ddi_get_config(struct intel_encoder *encoder, > + struct

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