On Wed, May 06, 2020 at 02:23:23PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Different platforms have different max vswing/preemph settings.
> Turn that into a pair vfuncs so we can decouple intel_dp.c and
> intel_ddi.c further.
Forgot to mention that it not only depends on the platf
Quoting Chris Wilson (2020-05-06 15:36:16)
> Make sure we ignore the I915_PRIORITY_WAIT hint when looking at
> timeslicing, as we do not treat it as a preemption request but as a soft
> ordering hint. If we apply the hint, then when we recompute the ordering
> after unwinding for the timeslice, we
Hi, Dave, Daniel,
this is the third pull request for drm-misc-next for what will become
v5.8. AFAICT the highlights are the new managed allocation for DRM device
structures; optimizations in drm_mm, and Lima got runtime PM support.
Best regards
Thomas
drm-misc-next-2020-05-07:
drm-misc-next for
On Wed, May 06, 2020 at 02:14:05PM -0700, Matt Roper wrote:
> There are a couple places in our driver that loop over transcoders A..D
> for gen11+; since RKL only has three pipes/transcoders, this can lead to
> unclaimed register reads/writes. We should add checks for transcoder
> existence where
We recorded the dependencies for WAIT_FOR_SUBMIT in order that we could
correctly perform priority inheritance from the parallel branches to the
common trunk. However, for the purpose of timeslicing and reset
handling, the dependency is weak -- as we the pair of requests are
allowed to run in paral
Clients may use a submit-fence as bidirectional bond between two or more
co-operating requests, and so if we bump the priority of one, we wish to
bump the priority of the set.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_scheduler.c | 6 ++
1 file changed, 6
The submit-fence adds a weak dependency to the requests, and for the
purpose of our FQ_CODEL hinting we do not want to treat as a
restriction. This is primarily because clients may treat submit-fences
as a bidirectional bonding between a pair of co-ordinating requests.
Signed-off-by: Chris Wilson
On Thu, May 07, 2020 at 09:56:49AM +0300, Ville Syrjälä wrote:
> On Wed, May 06, 2020 at 06:15:28PM +0300, Imre Deak wrote:
> > On Wed, Mar 11, 2020 at 05:54:20PM +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > Let's get rid of the platform if ladders in
> > > intel_digital_port
Clients may use a submit-fence as bidirectional bond between two or more
co-operating requests, and so if we bump the priority of one, we wish to
bump the priority of the set.
Testcase: igt/gem_exec_fence/submitN
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_sched
== Series Details ==
Series: series starting with [1/3] drm/i915: Mark concurrent submissions with a
weak-dependency (rev2)
URL : https://patchwork.freedesktop.org/series/77007/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8441 -> Patchwork_17597
On Thu, May 07, 2020 at 09:53:13AM +0300, Ville Syrjälä wrote:
> On Wed, May 06, 2020 at 07:03:41PM +0300, Imre Deak wrote:
> > On Wed, Mar 11, 2020 at 05:54:21PM +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > Instead of constnantly having to figure out which hpd status bit
> >
On Sun, 03 May 2020, Chris Wilson wrote:
> If the FBC is still writing into stolen, it will overwrite any future
> users of that stolen region. Check before release.
>
> References: https://gitlab.freedesktop.org/drm/intel/-/issues/1635
> Signed-off-by: Chris Wilson
> ---
> drivers/gpu/drm/i915/
Quoting Jani Nikula (2020-05-07 09:49:15)
> On Sun, 03 May 2020, Chris Wilson wrote:
> > If the FBC is still writing into stolen, it will overwrite any future
> > users of that stolen region. Check before release.
> >
> > References: https://gitlab.freedesktop.org/drm/intel/-/issues/1635
> > Signe
Hello Chris Wilson,
The patch e3793468b466: "drm/i915: Use the async worker to avoid
reclaim tainting the ggtt->mutex" from Jan 30, 2020, leads to the
following static checker warning:
drivers/gpu/drm/i915/i915_vma.c:356 i915_vma_wait_for_bind()
warn: 's64max' cannot fit into 'boo
Quoting Dan Carpenter (2020-05-07 10:17:14)
> Hello Chris Wilson,
>
> The patch e3793468b466: "drm/i915: Use the async worker to avoid
> reclaim tainting the ggtt->mutex" from Jan 30, 2020, leads to the
> following static checker warning:
>
> drivers/gpu/drm/i915/i915_vma.c:356 i915_vma_w
== Series Details ==
Series: series starting with [1/3] drm/i915: Mark concurrent submissions with a
weak-dependency (rev2)
URL : https://patchwork.freedesktop.org/series/77024/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8441 -> Patchwork_17598
tree: git://anongit.freedesktop.org/drm/drm-tip drm-tip
head: 6c0ee41a7c3201ef2a89800234803a95f65989be
commit: e81df648fc5bcd0fa702df401e02b7914c76ff71 [3/9] Merge remote-tracking
branch 'drm/drm-next' into drm-tip
config: i386-allyesconfig (attached as .config)
compiler: gcc-7 (Ubuntu 7.5.0-6
== Series Details ==
Series: series starting with [1/3] drm/i915: Mark concurrent submissions with a
weak-dependency (rev2)
URL : https://patchwork.freedesktop.org/series/77007/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8441_full -> Patchwork_17597_full
==
> -Original Message-
> From: Intel-gfx On Behalf Of Matt
> Roper
> Sent: Tuesday, May 5, 2020 4:22 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: De Marchi, Lucas
> Subject: [Intel-gfx] [PATCH v2 01/22] drm/i915/rkl: Add RKL platform info and
> PCI ids
>
> Introduce the basic platform
> -Original Message-
> From: Roper, Matthew D
> Sent: Wednesday, May 6, 2020 10:20 PM
> To: Srivatsa, Anusha
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH v2 10/22] drm/i915/rkl: RKL only uses PHY_MISC
> for PHY's A and B
>
> On Wed, May 06, 2020 at 06:49:06A
> -Original Message-
> From: Intel-gfx On Behalf Of Matt
> Roper
> Sent: Tuesday, May 5, 2020 4:22 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: De Marchi, Lucas
> Subject: [Intel-gfx] [PATCH v2 12/22] drm/i915/rkl: Check proper SDEISR bits
> for
> TC1 and TC2 outputs
>
> When Rocke
From: Ville Syrjälä
Instead of constnantly having to figure out which hpd status bit
array to use let's store them under dev_priv.
Should perhaps take this further and stash even more stuff to
make the hpd handling more abstract yet.
v2: Remeber cnp (Imre)
Add MISSING_CASE() for unknown PCH
On Mon, May 04, 2020 at 03:52:22PM -0700, Matt Roper wrote:
> From: Aditya Swarup
>
> RKL doesn't have DSI outputs, so we shouldn't try to read out the DSI
> transcoder registers.
>
> Signed-off-by: Aditya Swarup
> Signed-off-by: Matt Roper
> ---
> drivers/gpu/drm/i915/display/intel_display.c
On Mon, May 04, 2020 at 03:52:17PM -0700, Matt Roper wrote:
> When Rocket Lake is paired with a TGP PCH, the last two outputs utilize
> the TC1 and TC2 hpd pins, even though these are combo outputs.
>
> Bspec: 49181
> Cc: Lucas De Marchi
> Signed-off-by: Matt Roper
> ---
> drivers/gpu/drm/i915/
On Mon, May 04, 2020 at 03:52:19PM -0700, Matt Roper wrote:
> From: Lucas De Marchi
>
> RKL uses the DDI A, DDI B, DDI USBC1, DDI USBC2 from the DE point of
> view, so all DDI/pipe/transcoder register use these indexes to refer to
> them. Combo phy and IO functions follow another namespace that w
On Mon, May 04, 2020 at 03:52:12PM -0700, Matt Roper wrote:
> RKL only has five universal planes, plus a cursor. Since the
> bottom-most universal plane is considered the primary plane, set the
> number of sprites available on this platform to 4.
>
> In general, the plane capabilities of the rema
On Mon, May 04, 2020 at 03:52:11PM -0700, Matt Roper wrote:
> The RKL platform has different memory characteristics from past
> platforms. Update the values used by our memory bandwidth calculations
> accordingly.
>
> Bspec: 53998
> Cc: James Ausmus
> Signed-off-by: Matt Roper
> ---
> drivers/
== Series Details ==
Series: drm/i915: Hotplug cleanups (rev7)
URL : https://patchwork.freedesktop.org/series/72348/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8442 -> Patchwork_17599
Summary
---
**SUCCESS**
No
== Series Details ==
Series: series starting with [1/3] drm/i915: Mark concurrent submissions with a
weak-dependency (rev2)
URL : https://patchwork.freedesktop.org/series/77024/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8441_full -> Patchwork_17598_full
==
On Thu, May 07, 2020 at 02:48:08PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Instead of constnantly having to figure out which hpd status bit
> array to use let's store them under dev_priv.
>
> Should perhaps take this further and stash even more stuff to
> make the hpd handling more
Dump out the DP VSC SDP in the normal crtc state dump
v3: Replace a structure name to drm_dp_vsc_sdp from intel_dp_vsc_sdp
Use drm core's DP VSC SDP logging function
Signed-off-by: Gwan-gyeong Mun
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_display.c | 13 +
Added state readout for DP HDR Metadata Infoframe SDP.
v9: Rebased
v10: Rebased
Signed-off-by: Gwan-gyeong Mun
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_ddi.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/g
Compared to implementation of DP and HDMI's encoder->infoframes_enabled,
the lspcon's implementation returns its active state. (we expect enabled
infoframe states of HW.) It leads to pipe state mismatch error
when ddi_get_config is called.
Because the current implementation of lspcon is not ready
In order to use computed config for DP SDPs (DP VSC SDP and DP HDR Metadata
Infoframe SDP), it replaces intel_dp_vsc_enable() function and
intel_dp_hdr_metadata_enable() function to intel_dp_set_infoframes()
function.
And it removes unused functions.
Before:
intel_dp_vsc_enable() and intel_dp_hdr
Dump out the DP HDR Metadata Infoframe SDP in the normal crtc state dump.
HDMI Dynamic Range and Mastering (DRM) infoframe and DP HDR Metadata
Infoframe SDP use the same member variable in infoframes of crtc state.
Signed-off-by: Gwan-gyeong Mun
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/i91
Call intel_dp_set_infoframes(false) function on intel_ddi_post_disable_dp()
to make sure not to send VSC SDP and HDR Metadata Infoframe SDP.
v5: Polish commit message [Uma]
Signed-off-by: Gwan-gyeong Mun
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_ddi.c | 2 ++
1 file chang
In order to use a common VSC SDP Colorimetry calculating code on PSR,
it uses a new psr vsc sdp compute routine.
Because PSR routine has its own scenario and timings of writing a VSC SDP,
the current PSR routine needs to have its own drm_dp_vsc_sdp structure
member variable on struct i915_psr.
In
In order to readout DP SDPs (Secondary Data Packet: DP HDR Metadata
Infoframe SDP, DP VSC SDP), it refactors handling DP SDPs codes.
It adds new compute routines for DP HDR Metadata Infoframe SDP
and DP VSC SDP.
And new writing routines of DP SDPs (Secondary Data Packet) that uses
computed configs
Dump out the HDMI Dynamic Range and Mastering (DRM) infoframe in the
normal crtc state dump.
Signed-off-by: Gwan-gyeong Mun
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_display.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display
It adds code to read the DP SDPs from the video DIP and unpack them into
the crtc state.
It adds routines that read out DP VSC SDP and DP HDR Metadata Infoframe SDP
In order to unpack DP VSC SDP, it adds intel_dp_vsc_sdp_unpack() function.
It follows DP 1.4a spec. [Table 2-116: VSC SDP Header Byte
Added state readout for DP VSC SDP and enabled state validation
for DP VSC SDP.
v2: Minor style fix
v3: Replace a structure name to drm_dp_vsc_sdp from intel_dp_vsc_sdp
v4: Use struct drm_device logging macros
v10: Skip checking of VSC SDP when a crtc config has psr.
Signed-off-by: Gwan-gyeong Mu
In order to use a common VSC SDP Colorimetry calculating code on PSR,
it adds a compute routine for PSR VSC SDP.
As PSR routine can not use infoframes.vsc of crtc state, it also adds new
writing of DP SDPs (Secondary Data Packet) for PSR.
PSR routine has its own scenario and timings of writing a VS
When receiving video it is very useful to be able to log DP VSC SDP.
This greatly simplifies debugging.
v2: Minor style fix
v3: Move logging functions to drm core [Jani N]
v5: Rebased
v10: Rebased
Signed-off-by: Gwan-gyeong Mun
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/drm_dp_helper.c | 174
Call intel_dp_set_infoframes() function on pipe updates to make sure
that we send VSC SDP and HDR Metadata Infoframe SDP (when applicable)
on fastsets.
Signed-off-by: Gwan-gyeong Mun
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_ddi.c | 1 +
1 file changed, 1 insertion(+)
dif
It adds an unpack only function for DRM infoframe for dynamic range and
mastering infoframe readout.
It unpacks the information data block contained in the binary buffer into
a structured frame of the HDMI Dynamic Range and Mastering (DRM)
information frame.
In contrast to hdmi_drm_infoframe_unpac
All engines, exception being blitter as it does not
care about the form, can access compressed surfaces.
So we need to add forced aux table invalidates
for those engines.
v2: virtual instance masking (Chris)
References: d248b371f747 ("drm/i915/gen12: Invalidate aux table entries
forcibly")
Refe
Quoting Mika Kuoppala (2020-05-07 14:41:22)
> All engines, exception being blitter as it does not
> care about the form, can access compressed surfaces.
>
> So we need to add forced aux table invalidates
> for those engines.
>
> v2: virtual instance masking (Chris)
>
> References: d248b371f747 (
>-Original Message-
>From: Intel-gfx On Behalf Of Chris
>Wilson
>Sent: Wednesday, May 6, 2020 4:59 PM
>To: intel-gfx@lists.freedesktop.org
>Cc: Chris Wilson
>Subject: [Intel-gfx] [PATCH 12/15] drm/i915: Replace the hardcoded
>I915_FENCE_TIMEOUT
>
>Expose the hardcoded timeout for unsign
Quoting Ruhl, Michael J (2020-05-07 14:53:00)
>
>
> >-Original Message-
> >From: Intel-gfx On Behalf Of Chris
> >Wilson
> >diff --git a/drivers/gpu/drm/i915/gem/i915_gem_client_blt.c
> >b/drivers/gpu/drm/i915/gem/i915_gem_client_blt.c
> >index 3a146aa2593b..d3a86a4d5c04 100644
> >--- a/d
== Series Details ==
Series: drm/i915: Hotplug cleanups (rev7)
URL : https://patchwork.freedesktop.org/series/72348/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8442_full -> Patchwork_17599_full
Summary
---
**SUCCE
== Series Details ==
Series: In order to readout DP SDPs, refactors the handling of DP SDPs (rev13)
URL : https://patchwork.freedesktop.org/series/72853/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
96f3abd228ee video/hdmi: Add Unpack only function for DRM infoframe
2ad5c40851
All engines, exception being blitter as it does not
care about the form, can access compressed surfaces.
So we need to add forced aux table invalidates
for those engines.
v2: virtual instance masking (Chris)
v3: bug on if not found (Chris)
References: d248b371f747 ("drm/i915/gen12: Invalidate au
From: Ville Syrjälä
The correct sequence according to bspec is to wait for the ACT sent
status before we turn on the pipe. Make it so.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drive
Hi Lionel,
Thank you for the patch! Perhaps something to improve:
url:
https://github.com/0day-ci/linux/commits/Lionel-Landwerlin/drm-i915-perf-Add-support-for-multi-context-perf-queries/20200505-060720
base: git://anongit.freedesktop.org/drm-intel for-linux-next
If you fix the issue, kind
== Series Details ==
Series: drm/i915/gen12: Add aux table invalidate for all engines (rev2)
URL : https://patchwork.freedesktop.org/series/77038/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
e20a34365bd6 drm/i915/gen12: Add aux table invalidate for all engines
-:15: WARNING:C
Introduce platform dependent SAGV checking in
combination with bandwidth state pipe SAGV mask.
This is preparation to adding TGL support, which
requires different way of SAGV checking.
v2, v3, v4, v5, v6: Fix rebase conflict
v7: - Nuke icl specific function, use skl
for icl as well, gen sp
According to BSpec 53998, we should try to
restrict qgv points, which can't provide
enough bandwidth for desired display configuration.
Currently we are just comparing against all of
those and take minimum(worst case).
v2: Fixed wrong PCode reply mask, removed hardcoded
values.
v3: Forbid si
Seems that only skl needs to have SAGV turned off
for multipipe scenarios, so lets do it this way.
If anything blows up - we can always revert this patch.
Signed-off-by: Stanislav Lisovskiy
---
drivers/gpu/drm/i915/intel_pm.c | 15 +--
drivers/gpu/drm/i915/intel_pm.h | 3 ++-
2 fil
Flip the switch and enable SAGV support
for Gen12 also.
Signed-off-by: Stanislav Lisovskiy
---
drivers/gpu/drm/i915/intel_pm.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 66775d4fb1ae..ef2ec390b99b 100644
--- a/dr
For Gen11+ platforms BSpec suggests disabling specific
QGV points separately, depending on bandwidth limitations
and current display configuration. Thus it required adding
a new PCode request for disabling QGV points and some
refactoring of already existing SAGV code.
Also had to refactor intel_can
Starting from TGL we need to have a separate wm0
values for SAGV and non-SAGV which affects
how calculations are done.
v2: Remove long lines
v3: Removed COLOR_PLANE enum references
v4, v5, v6: Fixed rebase conflict
v7: - Removed skl_plane_wm_level accessor from skl_allocate_pipe_ddb(Ville)
- R
For future Gen12 SAGV implementation we need to
seemlessly alter wm levels calculated, depending
on whether we are allowed to enable SAGV or not.
So this accessor will give additional flexibility
to do that.
Currently this accessor is still simply working
as "pass-through" function. This will be
== Series Details ==
Series: In order to readout DP SDPs, refactors the handling of DP SDPs (rev13)
URL : https://patchwork.freedesktop.org/series/72853/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8444 -> Patchwork_17600
On 07/05/2020 09:21, Chris Wilson wrote:
We recorded the dependencies for WAIT_FOR_SUBMIT in order that we could
correctly perform priority inheritance from the parallel branches to the
common trunk. However, for the purpose of timeslicing and reset
handling, the dependency is weak -- as we the
On 07/05/2020 09:21, Chris Wilson wrote:
Clients may use a submit-fence as bidirectional bond between two or more
co-operating requests, and so if we bump the priority of one, we wish to
bump the priority of the set.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i
On 07/05/2020 09:21, Chris Wilson wrote:
The submit-fence adds a weak dependency to the requests, and for the
purpose of our FQ_CODEL hinting we do not want to treat as a
restriction. This is primarily because clients may treat submit-fences
as a bidirectional bonding between a pair of co-ordin
Quoting Tvrtko Ursulin (2020-05-07 15:53:08)
>
> On 07/05/2020 09:21, Chris Wilson wrote:
> > We recorded the dependencies for WAIT_FOR_SUBMIT in order that we could
> > correctly perform priority inheritance from the parallel branches to the
> > common trunk. However, for the purpose of timeslici
Quoting Tvrtko Ursulin (2020-05-07 15:59:56)
>
> On 07/05/2020 09:21, Chris Wilson wrote:
> > The submit-fence adds a weak dependency to the requests, and for the
> > purpose of our FQ_CODEL hinting we do not want to treat as a
> > restriction. This is primarily because clients may treat submit-fe
== Series Details ==
Series: drm/i915/gen12: Add aux table invalidate for all engines (rev2)
URL : https://patchwork.freedesktop.org/series/77038/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8444 -> Patchwork_17601
Summar
On 07/05/2020 16:05, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2020-05-07 15:59:56)
On 07/05/2020 09:21, Chris Wilson wrote:
The submit-fence adds a weak dependency to the requests, and for the
purpose of our FQ_CODEL hinting we do not want to treat as a
restriction. This is primarily beca
Quoting Tvrtko Ursulin (2020-05-07 16:10:37)
>
> On 07/05/2020 16:05, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2020-05-07 15:59:56)
> >>
> >> On 07/05/2020 09:21, Chris Wilson wrote:
> >>> The submit-fence adds a weak dependency to the requests, and for the
> >>> purpose of our FQ_CODEL hin
On 07/05/2020 16:00, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2020-05-07 15:53:08)
On 07/05/2020 09:21, Chris Wilson wrote:
We recorded the dependencies for WAIT_FOR_SUBMIT in order that we could
correctly perform priority inheritance from the parallel branches to the
common trunk. Howeve
Upon waiting a request (when asked), we gave that request a small
priority boost, not enough for it to cause preemption, but enough for it
to be scheduled next before all equals. We also used that bit to give
new clients a small priority boost, similar to FQ_CODEL, such that we
favoured short inter
Clients may use a submit-fence as bidirectional bond between two or more
co-operating requests, and so if we bump the priority of one, we wish to
bump the priority of the set.
Testcase: igt/gem_exec_fence/submitN
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
Reviewed-by: Tvrtko Ursulin
---
dr
We recorded the dependencies for WAIT_FOR_SUBMIT in order that we could
correctly perform priority inheritance from the parallel branches to the
common trunk. However, for the purpose of timeslicing and reset
handling, the dependency is weak -- as we the pair of requests are
allowed to run in paral
Quoting Tvrtko Ursulin (2020-05-07 16:23:59)
>
>
> On 07/05/2020 16:00, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2020-05-07 15:53:08)
> >> On 07/05/2020 09:21, Chris Wilson wrote:
> >>> We recorded the dependencies for WAIT_FOR_SUBMIT in order that we could
> >>> correctly perform priority
== Series Details ==
Series: drm/i915/mst: Wait for ACT sent before enabling the pipe
URL : https://patchwork.freedesktop.org/series/77040/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8444 -> Patchwork_17602
Summary
-
The Vulkan driver in Mesa for Intel hardware never uses relocations if
it's running on a version of i915 that supports at least softpin which
all versions of i915 supporting Gen12 do. On the OpenGL side, Gen12 is
only supported by iris which never uses relocations. The older i965
driver in Mesa d
Quoting Jason Ekstrand (2020-05-07 16:36:00)
> The Vulkan driver in Mesa for Intel hardware never uses relocations if
> it's running on a version of i915 that supports at least softpin which
> all versions of i915 supporting Gen12 do. On the OpenGL side, Gen12 is
> only supported by iris which nev
We recorded the dependencies for WAIT_FOR_SUBMIT in order that we could
correctly perform priority inheritance from the parallel branches to the
common trunk. However, for the purpose of timeslicing and reset
handling, the dependency is weak -- as we the pair of requests are
allowed to run in paral
On Thu, May 7, 2020 at 10:44 AM Chris Wilson wrote:
>
> Quoting Jason Ekstrand (2020-05-07 16:36:00)
> > The Vulkan driver in Mesa for Intel hardware never uses relocations if
> > it's running on a version of i915 that supports at least softpin which
> > all versions of i915 supporting Gen12 do.
Hi!
Here is this week drm-misc-fixes PR
Maxime
drm-misc-fixes-2020-05-07:
A few minor fixes for an ordering issue in virtio, an (old) gcc warning
in sun4i, a probe issue in ingenic-drm and a regression in the HDCP
support.
The following changes since commit 6f49c2515e2258f08f2b905c9772dbf7296104
== Series Details ==
Series: SAGV support for Gen12+ (rev36)
URL : https://patchwork.freedesktop.org/series/75129/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
74acb8869d96 drm/i915: Introduce skl_plane_wm_level accessor.
37b1bc532f92 drm/i915: Extract skl SAGV checking
f4268a
Quoting Mika Kuoppala (2020-05-07 15:20:45)
> All engines, exception being blitter as it does not
> care about the form, can access compressed surfaces.
>
> So we need to add forced aux table invalidates
> for those engines.
>
> v2: virtual instance masking (Chris)
> v3: bug on if not found (Chri
== Series Details ==
Series: RFC: i915: Drop relocation support on Gen12+
URL : https://patchwork.freedesktop.org/series/77048/
State : failure
== Summary ==
Applying: RFC: i915: Drop relocation support on Gen12+
Using index info to reconstruct a base tree...
M drivers/gpu/drm/i915/gem/i
== Series Details ==
Series: SAGV support for Gen12+ (rev36)
URL : https://patchwork.freedesktop.org/series/75129/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8444 -> Patchwork_17603
Summary
---
**SUCCESS**
No r
== Series Details ==
Series: series starting with [v2] drm/i915: Mark concurrent submissions with a
weak-dependency (rev2)
URL : https://patchwork.freedesktop.org/series/77045/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8444 -> Patchwork_17605
=
Quoting Chris Wilson (2020-05-07 16:23:38)
> Upon waiting a request (when asked), we gave that request a small
> priority boost, not enough for it to cause preemption, but enough for it
> to be scheduled next before all equals. We also used that bit to give
> new clients a small priority boost, sim
== Series Details ==
Series: In order to readout DP SDPs, refactors the handling of DP SDPs (rev13)
URL : https://patchwork.freedesktop.org/series/72853/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8444_full -> Patchwork_17600_full
===
== Series Details ==
Series: series starting with [v2] drm/i915: Mark concurrent submissions with a
weak-dependency (rev3)
URL : https://patchwork.freedesktop.org/series/77045/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8444 -> Patchwork_17606
=
On 07/05/2020 16:34, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2020-05-07 16:23:59)
On 07/05/2020 16:00, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2020-05-07 15:53:08)
On 07/05/2020 09:21, Chris Wilson wrote:
We recorded the dependencies for WAIT_FOR_SUBMIT in order that we could
correc
On 07/05/2020 16:23, Chris Wilson wrote:
We recorded the dependencies for WAIT_FOR_SUBMIT in order that we could
correctly perform priority inheritance from the parallel branches to the
common trunk. However, for the purpose of timeslicing and reset
handling, the dependency is weak -- as we the
On 07/05/2020 16:23, Chris Wilson wrote:
Upon waiting a request (when asked), we gave that request a small
priority boost, not enough for it to cause preemption, but enough for it
to be scheduled next before all equals. We also used that bit to give
new clients a small priority boost, similar t
Quoting Tvrtko Ursulin (2020-05-07 18:55:17)
>
> On 07/05/2020 16:34, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2020-05-07 16:23:59)
> >> On 07/05/2020 16:00, Chris Wilson wrote:
> >>> Quoting Tvrtko Ursulin (2020-05-07 15:53:08)
> On 07/05/2020 09:21, Chris Wilson wrote:
> > We rec
On Thu, May 07, 2020 at 03:04:30PM +0300, Ville Syrjälä wrote:
> On Mon, May 04, 2020 at 03:52:19PM -0700, Matt Roper wrote:
> > From: Lucas De Marchi
> >
> > RKL uses the DDI A, DDI B, DDI USBC1, DDI USBC2 from the DE point of
> > view, so all DDI/pipe/transcoder register use these indexes to re
== Series Details ==
Series: drm/i915/gen12: Add aux table invalidate for all engines (rev2)
URL : https://patchwork.freedesktop.org/series/77038/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8444_full -> Patchwork_17601_full
==
On Fri, 8 May 2020 at 01:44, Chris Wilson wrote:
>
> Quoting Jason Ekstrand (2020-05-07 16:36:00)
> > The Vulkan driver in Mesa for Intel hardware never uses relocations if
> > it's running on a version of i915 that supports at least softpin which
> > all versions of i915 supporting Gen12 do. On
== Series Details ==
Series: drm/i915/mst: Wait for ACT sent before enabling the pipe
URL : https://patchwork.freedesktop.org/series/77040/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8444_full -> Patchwork_17602_full
Sum
== Series Details ==
Series: SAGV support for Gen12+ (rev36)
URL : https://patchwork.freedesktop.org/series/75129/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8444_full -> Patchwork_17603_full
Summary
---
**SUCCESS
== Series Details ==
Series: series starting with [v2] drm/i915: Mark concurrent submissions with a
weak-dependency (rev3)
URL : https://patchwork.freedesktop.org/series/77045/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8444_full -> Patchwork_17606_full
===
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