Re: [Intel-gfx] [PATCH 2/2] drm/i915: drop a bunch of superfluous inlines

2020-04-20 Thread Ville Syrjälä
On Mon, Apr 20, 2020 at 05:04:38PM +0300, Jani Nikula wrote: > Remove a number of inlines from .c files, and let the compiler decide > what's best. There's more to do, but need to start somewhere, and need > to start setting the example. > > Signed-off-by: Jani Nikula > --- > drivers/gpu/drm/i91

Re: [Intel-gfx] [PATCH 1/2] drm/i915/hdmi: remove unused intel_hdmi_hdcp2_protocol()

2020-04-20 Thread Ville Syrjälä
On Mon, Apr 20, 2020 at 05:04:37PM +0300, Jani Nikula wrote: > Unused, hiding from the compiler warnings behind the inline keyword. > > Signed-off-by: Jani Nikula Reviewed-by: Ville Syrjälä > --- > drivers/gpu/drm/i915/display/intel_hdmi.c | 6 -- > 1 file changed, 6 deletions(-) > > dif

[Intel-gfx] ✗ Fi.CI.IGT: failure for SAGV support for Gen12+ (rev26)

2020-04-20 Thread Patchwork
== Series Details == Series: SAGV support for Gen12+ (rev26) URL : https://patchwork.freedesktop.org/series/75129/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8328_full -> Patchwork_17381_full Summary --- **FAILURE

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/hdmi: remove unused intel_hdmi_hdcp2_protocol()

2020-04-20 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/hdmi: remove unused intel_hdmi_hdcp2_protocol() URL : https://patchwork.freedesktop.org/series/76200/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8331 -> Patchwork_17385 ===

[Intel-gfx] [PATCH] drm/i915/selftests: Fix i915_address_space refcnt leak

2020-04-20 Thread Xiyu Yang
igt_ppgtt_pin_update() invokes i915_gem_context_get_vm_rcu(), which returns a reference of the i915_address_space object to "vm" with increased refcount. When igt_ppgtt_pin_update() returns, "vm" becomes invalid, so the refcount should be decreased to keep refcount balanced. The reference countin

[Intel-gfx] [CI 2/6] drm/i915/selftests: Skip energy consumption tests if not controlling freq

2020-04-20 Thread Chris Wilson
If we can not manipulate the frequency with RPS, then comparing min/max power consumption is pointless / misleading. We will leave the warning about not being able to control the frequency selection via RPS to other tests so as not to confuse this more specialised check. Signed-off-by: Chris Wilso

[Intel-gfx] [CI 5/6] drm/i915/selftests: Show the pcode frequency table on error

2020-04-20 Thread Chris Wilson
If we encounter an error while scaling, read back the frequency tables from the pcu. Signed-off-by: Chris Wilson Reviewed-by: Mika Kuoppala --- drivers/gpu/drm/i915/gt/selftest_rps.c | 39 ++ 1 file changed, 39 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/selftest

[Intel-gfx] [CI 6/6] drm/i915/selftests: Exercise dynamic reclocking with RPS

2020-04-20 Thread Chris Wilson
After having testing all the RPS controls individually, we need to take a step back and check how our RPS worker integrates them to perform dynamic GPU reclocking. So do that by submitting a spinner and wait and see what happens. Signed-off-by: Chris Wilson Reviewed-by: Mika Kuoppala --- driver

[Intel-gfx] [CI 3/6] drm/i915/selftests: Check RPS controls

2020-04-20 Thread Chris Wilson
Check that the GPU does respond to our RPS frequency requests by setting our desired frequency. Signed-off-by: Chris Wilson Reviewed-by: Mika Kuoppala --- drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 1 + drivers/gpu/drm/i915/gt/selftest_rps.c | 214 --- drivers/gpu/drm/i9

[Intel-gfx] [CI 4/6] drm/i915/selftests: Split RPS frequency measurement

2020-04-20 Thread Chris Wilson
Split the frequency measurement into two modes, so that we can judge the impact of the llc setup on top of the pure CS frequency scaling. Signed-off-by: Chris Wilson Reviewed-by: Mika Kuoppala --- drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 3 +- drivers/gpu/drm/i915/gt/selftest_rps.c | 157

[Intel-gfx] [CI 1/6] drm/i915/selftests: Verify frequency scaling with RPS

2020-04-20 Thread Chris Wilson
One of the core tenents of reclocking the GPU is that its throughput scales with the clock frequency. We can observe this by incrementing a loop counter on the GPU, and compare the different execution rates at the notional RPS frequencies. Signed-off-by: Chris Wilson Reviewed-by: Mika Kuoppala -

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/2] drm/dsc: use rc_model_size from DSC config for PPS

2020-04-20 Thread Patchwork
== Series Details == Series: series starting with [CI,1/2] drm/dsc: use rc_model_size from DSC config for PPS URL : https://patchwork.freedesktop.org/series/76202/ State : success == Summary == CI Bug Log - changes from CI_DRM_8331 -> Patchwork_17386 ==

Re: [Intel-gfx] [PATCH v2 5/6] drm/i915: Add checks specific to async flips

2020-04-20 Thread Paulo Zanoni
Em seg, 2020-04-20 às 15:17 +0530, Karthik B S escreveu: > Support added only for async flips on primary plane. > If flip is requested on any other plane, reject it. > > Make sure there is no change in fbc, offset and framebuffer modifiers > when async flip is requested. > > If any of these are m

Re: [Intel-gfx] [PATCH v2 3/6] drm/i915: Enable async flips in i915

2020-04-20 Thread Paulo Zanoni
Em seg, 2020-04-20 às 15:17 +0530, Karthik B S escreveu: > Enable asynchronous flips in i915 for gen9+ platforms. > > v2: -Async flip enablement should be a stand alone patch (Paulo) ... and at the very end of the series. If someone is bisecting the Kernel for some problem unrelated to async fli

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915/gem: Remove object_is_locked assertion from unpin_from_display_plane

2020-04-20 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/gem: Remove object_is_locked assertion from unpin_from_display_plane URL : https://patchwork.freedesktop.org/series/76194/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8328_full -> Patchwork_17382_full

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/6] drm/i915/selftests: Verify frequency scaling with RPS

2020-04-20 Thread Patchwork
== Series Details == Series: series starting with [CI,1/6] drm/i915/selftests: Verify frequency scaling with RPS URL : https://patchwork.freedesktop.org/series/76207/ State : warning == Summary == $ dim checkpatch origin/drm-tip 18dc228e78a3 drm/i915/selftests: Verify frequency scaling with R

Re: [Intel-gfx] [PATCH 2/4] drm/i915: Move the TRANS_DDI_FUNC_CTL enable to a later point

2020-04-20 Thread Ville Syrjälä
On Mon, Apr 20, 2020 at 05:45:01PM +0300, Jani Nikula wrote: > On Fri, 17 Apr 2020, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > No reason that I can see why we should enable TRANS_DDI_FUNC_CTL > > before we set up the watermarks of confogiure the mbus stuff. > > In fact reordering these

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Flatten intel_dp_check_mst_status() a bit

2020-04-20 Thread Ville Syrjälä
On Fri, Apr 17, 2020 at 02:51:39PM -0400, Lyude Paul wrote: > Reviewed-by: Lyude Paul > Thanks. Series pushed to dinq. > On Fri, 2020-04-17 at 18:27 +0300, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > Make intel_dp_check_mst_status() somewhat legible by humans. > > > > Note that the

Re: [Intel-gfx] [PATCH 3/4] drm/i915: Push TRANS_DDI_FUNC_CTL into the encoder->enable() hook

2020-04-20 Thread Ville Syrjälä
On Fri, Apr 17, 2020 at 08:51:35PM +0100, Chris Wilson wrote: > Quoting Ville Syrjala (2020-04-17 14:47:19) > > From: Ville Syrjälä > > > > Push the TRANS_DDI_FUNC_CTL into the encoder enable hook. The disable > > is already there, and as a followup will enable us to pass the encoder > > all the

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [CI,1/6] drm/i915/selftests: Verify frequency scaling with RPS

2020-04-20 Thread Patchwork
== Series Details == Series: series starting with [CI,1/6] drm/i915/selftests: Verify frequency scaling with RPS URL : https://patchwork.freedesktop.org/series/76207/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8332 -> Patchwork_17387 ===

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Fix i915_address_space refcnt leak

2020-04-20 Thread Chris Wilson
Quoting Xiyu Yang (2020-04-20 06:41:54) > igt_ppgtt_pin_update() invokes i915_gem_context_get_vm_rcu(), which > returns a reference of the i915_address_space object to "vm" with > increased refcount. > > When igt_ppgtt_pin_update() returns, "vm" becomes invalid, so the > refcount should be decreas

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Fix i915_address_space refcnt leak

2020-04-20 Thread Patchwork
== Series Details == Series: drm/i915/selftests: Fix i915_address_space refcnt leak URL : https://patchwork.freedesktop.org/series/76209/ State : success == Summary == CI Bug Log - changes from CI_DRM_8333 -> Patchwork_17388 Summary ---

[Intel-gfx] [PATCH 1/4] drm/i915: Introduce .set_link_train() vfunc

2020-04-20 Thread Ville Syrjala
From: Ville Syrjälä Sort out some of the mess between intel_ddi.c intel_dp.c by introducing a .set_link_train() vfunc. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_ddi.c | 42 + .../drm/i915/display/intel_display_types.h| 1 + drivers/gpu/drm/i915/display

[Intel-gfx] [PATCH 2/4] drm/i915: Introduce .set_signal_levels() vfunc

2020-04-20 Thread Ville Syrjala
From: Ville Syrjälä Sort out some of the mess between intel_ddi.c intel_dp.c by introducing a .set_signal_levels() vfunc. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_ddi.c | 81 +++--- .../drm/i915/display/intel_display_types.h| 1 + drivers/gpu/drm/i915

[Intel-gfx] [PATCH 3/4] drm/i915: Introduce .set_idle_link_train() vfunc

2020-04-20 Thread Ville Syrjala
From: Ville Syrjälä Relocate a binch of DDI specific code from intel_dp.c to intel_ddi.c by introducing a .set_idle_link_train() vfunc. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_ddi.c | 29 +++ .../drm/i915/display/intel_display_types.h| 1 +

[Intel-gfx] [PATCH 4/4] drm/i915: Split some long lines

2020-04-20 Thread Ville Syrjala
From: Ville Syrjälä Split some overly long lines. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_ddi.c | 10 -- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Use single set of AUX powerwell ops for gen11+

2020-04-20 Thread Souza, Jose
On Wed, 2020-04-15 at 16:34 -0700, Matt Roper wrote: > AUX power wells sometimes need additional handling besides just > programming the specific power well registers: > * Type-C PHY's also require additional Type-C register programming > * ICL combo PHY's require additional workarounds > * TGL

[Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [CI,1/6] drm/i915/selftests: Verify frequency scaling with RPS

2020-04-20 Thread Patchwork
== Series Details == Series: series starting with [CI,1/6] drm/i915/selftests: Verify frequency scaling with RPS URL : https://patchwork.freedesktop.org/series/76210/ State : failure == Summary == Applying: drm/i915/selftests: Verify frequency scaling with RPS Using index info to reconstruct

[Intel-gfx] [PATCH] drm/i915/selftests: Show the pstate limits on any failure to reset min

2020-04-20 Thread Chris Wilson
We want to see the pstate limits whenever we fail to set the minimum frequency as that may help for debugging. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/selftest_rps.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/selftest_rps.c b/drivers/gpu/drm/i9

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/hdmi: remove unused intel_hdmi_hdcp2_protocol() (rev2)

2020-04-20 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/hdmi: remove unused intel_hdmi_hdcp2_protocol() (rev2) URL : https://patchwork.freedesktop.org/series/76200/ State : success == Summary == CI Bug Log - changes from CI_DRM_8334 -> Patchwork_17390

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/display: Fixed kernel taint in audio codec init

2020-04-20 Thread Patchwork
== Series Details == Series: drm/i915/display: Fixed kernel taint in audio codec init URL : https://patchwork.freedesktop.org/series/76195/ State : success == Summary == CI Bug Log - changes from CI_DRM_8329_full -> Patchwork_17383_full Sum

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for SAGV support for Gen12+ (rev26)

2020-04-20 Thread Lisovskiy, Stanislav
Seems to be unrelated to SAGV, as it can't break module_reload only.. Best Regards, Lisovskiy Stanislav Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo From: Patchwork Sent: Monday, April 20, 2020 8:16:39 PM To: Lisovskiy,

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/4] drm/i915: Introduce .set_link_train() vfunc

2020-04-20 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/i915: Introduce .set_link_train() vfunc URL : https://patchwork.freedesktop.org/series/76213/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8334 -> Patchwork_17391

[Intel-gfx] ✓ Fi.CI.IGT: success for SAGV support for Gen12+ (rev26)

2020-04-20 Thread Patchwork
== Series Details == Series: SAGV support for Gen12+ (rev26) URL : https://patchwork.freedesktop.org/series/75129/ State : success == Summary == CI Bug Log - changes from CI_DRM_8328_full -> Patchwork_17381_full Summary --- **SUCCESS

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for SAGV support for Gen12+ (rev26)

2020-04-20 Thread Vudum, Lakshminarayana
Stan, I have re-reported the results. -Original Message- From: Lisovskiy, Stanislav Sent: Tuesday, April 21, 2020 12:05 AM To: intel-gfx@lists.freedesktop.org; Vudum, Lakshminarayana Subject: Re: ✗ Fi.CI.IGT: failure for SAGV support for Gen12+ (rev26) Seems to be unrelated to SAGV, a

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/audio: fix compressed_bpp check

2020-04-20 Thread Patchwork
== Series Details == Series: drm/i915/audio: fix compressed_bpp check URL : https://patchwork.freedesktop.org/series/76196/ State : success == Summary == CI Bug Log - changes from CI_DRM_8329_full -> Patchwork_17384_full Summary ---

Re: [Intel-gfx] [PATCH 1/4] drm/i915: Introduce .set_link_train() vfunc

2020-04-20 Thread Souza, Jose
On Mon, 2020-04-20 at 23:06 +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > Sort out some of the mess between intel_ddi.c intel_dp.c by > introducing a .set_link_train() vfunc. > Reviewed-by: José Roberto de Souza > Signed-off-by: Ville Syrjälä > --- > drivers/gpu/drm/i915/display/int

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/selftests: Show the pstate limits on any failure to reset min

2020-04-20 Thread Patchwork
== Series Details == Series: drm/i915/selftests: Show the pstate limits on any failure to reset min URL : https://patchwork.freedesktop.org/series/76214/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8335 -> Patchwork_17392

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tgl: Wa_14011059788 (rev4)

2020-04-20 Thread Patchwork
== Series Details == Series: drm/i915/tgl: Wa_14011059788 (rev4) URL : https://patchwork.freedesktop.org/series/75990/ State : success == Summary == CI Bug Log - changes from CI_DRM_8335 -> Patchwork_17393 Summary --- **SUCCESS**

[Intel-gfx] [PATCH] drm/i915/gt: Prefer soft-rc6 over RPS DOWN_TIMEOUT

2020-04-20 Thread Chris Wilson
The RPS DOWN_TIMEOUT interrupt is signaled after a period of rc6, and upon receipt of that interrupt we reprogram the GPU clocks down to the next idle notch [to help convserve power during rc6]. However, on execlists, we benefit from soft-rc6 immediately parking the GPU and setting idle frequencies

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/gt: Prefer soft-rc6 over RPS DOWN_TIMEOUT

2020-04-20 Thread Patchwork
== Series Details == Series: drm/i915/gt: Prefer soft-rc6 over RPS DOWN_TIMEOUT URL : https://patchwork.freedesktop.org/series/76216/ State : failure == Summary == CALLscripts/checksyscalls.sh CALLscripts/atomic/check-atomics.sh DESCEND objtool CHK include/generated/compile.

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/2] drm/dsc: use rc_model_size from DSC config for PPS

2020-04-20 Thread Patchwork
== Series Details == Series: series starting with [CI,1/2] drm/dsc: use rc_model_size from DSC config for PPS URL : https://patchwork.freedesktop.org/series/76202/ State : success == Summary == CI Bug Log - changes from CI_DRM_8331_full -> Patchwork_17386_full

[Intel-gfx] linux-next: manual merge of the drm-misc tree with the drm-misc-fixes tree

2020-04-20 Thread Stephen Rothwell
Hi all, Today's linux-next merge of the drm-misc tree got a conflict in:he drm-misc tree with the drm-misc-fixes tree drivers/gpu/drm/tidss/tidss_encoder.c between commit: 9da67433f64e ("drm/tidss: fix crash related to accessing freed memory") from the drm-misc-fixes tree and commit: b

Re: [Intel-gfx] [PATCH xf86-video-intel v3] Sync i915_pciids upto 8717c6b7414f

2020-04-20 Thread Liwei Song
On 4/21/20 00:21, Ville Syrjälä wrote: > On Mon, Apr 20, 2020 at 04:22:07PM +0800, Liwei Song wrote: >> Import the kernel's i915_pciids.h, up to: >> >> commit 8717c6b7414ffb890672276dccc284c23078ac0e >> Author: Lee Shawn C >> Date: Tue Dec 10 23:04:15 2019 +0800 >> >> drm/i915/cml: Separat

Re: [Intel-gfx] [PATCH v2 5/5] uaccess: Rename user_access_begin/end() to user_full_access_begin/end()

2020-04-20 Thread Al Viro
[rmk Cc'd] On Fri, Apr 03, 2020 at 09:52:05PM +0100, Al Viro wrote: > I can do a 5.7-rc1-based branch with that; depending upon what we end > up doing for arm and s390 we can always change the calling conventions > come next cycle ;-/ > > My impressions after digging through arm side of things: >

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/selftests: Fix i915_address_space refcnt leak

2020-04-20 Thread Patchwork
== Series Details == Series: drm/i915/selftests: Fix i915_address_space refcnt leak URL : https://patchwork.freedesktop.org/series/76209/ State : success == Summary == CI Bug Log - changes from CI_DRM_8333_full -> Patchwork_17388_full Summa

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Use single set of AUX powerwell ops for gen11+

2020-04-20 Thread Matt Roper
On Mon, Apr 20, 2020 at 01:09:05PM -0700, Souza, Jose wrote: > On Wed, 2020-04-15 at 16:34 -0700, Matt Roper wrote: > > AUX power wells sometimes need additional handling besides just > > programming the specific power well registers: > > * Type-C PHY's also require additional Type-C register prog

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915/hdmi: remove unused intel_hdmi_hdcp2_protocol() (rev2)

2020-04-20 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/hdmi: remove unused intel_hdmi_hdcp2_protocol() (rev2) URL : https://patchwork.freedesktop.org/series/76200/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8334_full -> Patchwork_17390_full ==

Re: [Intel-gfx] [PATCH 1/2] drm/i915/hdmi: remove unused intel_hdmi_hdcp2_protocol()

2020-04-20 Thread Jani Nikula
On Mon, 20 Apr 2020, Ville Syrjälä wrote: > On Mon, Apr 20, 2020 at 05:04:37PM +0300, Jani Nikula wrote: >> Unused, hiding from the compiler warnings behind the inline keyword. >> >> Signed-off-by: Jani Nikula > > Reviewed-by: Ville Syrjälä Thanks, pushed both. BR, Jani. > >> --- >> driver

Re: [Intel-gfx] linux-next: manual merge of the drm-misc tree with the drm-misc-fixes tree

2020-04-20 Thread Tomi Valkeinen
Hi, On 21/04/2020 04:52, Stephen Rothwell wrote: Hi all, Today's linux-next merge of the drm-misc tree got a conflict in:he drm-misc tree with the drm-misc-fixes tree drivers/gpu/drm/tidss/tidss_encoder.c between commit: 9da67433f64e ("drm/tidss: fix crash related to accessing freed m

Re: [Intel-gfx] [PATCH] drm/i915/audio: fix compressed_bpp check

2020-04-20 Thread Jani Nikula
On Mon, 20 Apr 2020, "Shankar, Uma" wrote: >> -Original Message- >> From: Jani Nikula >> Sent: Monday, April 20, 2020 6:47 PM >> To: intel-gfx@lists.freedesktop.org >> Cc: Nikula, Jani ; Gupta, Anshuman >> ; Shankar, Uma >> Subject: [PATCH] drm/i915/audio: fix compressed_bpp check >> >>

Re: [Intel-gfx] [PATCH v4] drm/i915: Synchronize active and retire callbacks

2020-04-20 Thread Joonas Lahtinen
Quoting Sultan Alsawaf (2020-04-20 19:15:14) > On Mon, Apr 20, 2020 at 11:21:42AM +0300, Joonas Lahtinen wrote: > > So it seems that the patch got pulled into v5.6 and has been backported > > to v5.5 but not v5.4. > > You're right, that's my mistake. Did applying the patch to v5.4 fix the issue a

Re: [Intel-gfx] [PATCH 11/18] drm/i915/display/sdvo: Prefer drm_WARN* over WARN*

2020-04-20 Thread Jani Nikula
On Mon, 06 Apr 2020, Pankaj Bharadiya wrote: > struct drm_device specific drm_WARN* macros include device information > in the backtrace, so we know what device the warnings originate from. > > Prefer drm_WARN* over WARN* calls. > > Signed-off-by: Pankaj Bharadiya > --- > drivers/gpu/drm/i915/d

Re: [Intel-gfx] [PATCH 06/18] drm/i915/display/dp: Prefer drm_WARN* over WARN*

2020-04-20 Thread Jani Nikula
On Mon, 06 Apr 2020, Pankaj Bharadiya wrote: > struct drm_device specific drm_WARN* macros include device information > in the backtrace, so we know what device the warnings originate from. The patch no longer applies. > > Prefer drm_WARN* over WARN* at places where struct intel_dp struct > poi

Re: [Intel-gfx] [PATCH 12/18] drm/i915/display/tc: Prefer drm_WARN_ON over WARN_ON

2020-04-20 Thread Jani Nikula
On Mon, 06 Apr 2020, Pankaj Bharadiya wrote: > struct drm_device specific drm_WARN* macros include device information > in the backtrace, so we know what device the warnings originate from. > > Prefer drm_WARN_ON over WARN_ON. > > Conversion is done with below sementic patch: > > @@ > identifier

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