Re: [Intel-gfx] [PATCH] drm/i915/gt: Only delay the barrier pm

2020-03-24 Thread Tvrtko Ursulin
On 23/03/2020 19:20, Chris Wilson wrote: It is strictly sufficient to only delay the intel_engine_pm_put from the context barrier (and not from the context exit) in order to prevent the gem_exec_nop contention. Adding the delay to the context exit incurs noticably extra penalty for soft-rc6. F

[Intel-gfx] ✓ Fi.CI.IGT: success for DP Phy compliance auto test (rev9)

2020-03-24 Thread Patchwork
== Series Details == Series: DP Phy compliance auto test (rev9) URL : https://patchwork.freedesktop.org/series/71121/ State : success == Summary == CI Bug Log - changes from CI_DRM_8182_full -> Patchwork_17062_full Summary --- **SUCC

[Intel-gfx] [PATCH] drm/i915: remove always-defined CONFIG_AS_MOVNTDQA

2020-03-24 Thread Masahiro Yamada
CONFIG_AS_MOVNTDQA was introduced by commit 0b1de5d58e19 ("drm/i915: Use SSE4.1 movntdqa to accelerate reads from WC memory"). We raise the minimal supported binutils version from time to time. The last bump was commit 1fb12b35e5ff ("kbuild: Raise the minimum required binutils version to 2.21").

Re: [Intel-gfx] [PATCH 22/51] drm: manage drm_minor cleanup with drmm_

2020-03-24 Thread Thomas Zimmermann
Hi Am 23.03.20 um 15:49 schrieb Daniel Vetter: > The cleanup here is somewhat tricky, since we can't tell apart the > allocated minor index from 0. So register a cleanup action first, and > if the index allocation fails, unregister that cleanup action again to > avoid bad mistakes. > > The kdev f

Re: [Intel-gfx] [PATCH 49/51] drm/udl: Drop explicit drm_mode_config_cleanup call

2020-03-24 Thread Thomas Zimmermann
Am 23.03.20 um 15:49 schrieb Daniel Vetter: > It's right above the drm_dev_put(). > > This allows us to delete a bit of onion unwinding in > udl_modeset_init(). > > This is made possible by a preceeding patch which added a drmm_ > cleanup action to drm_mode_config_init(), hence all we need to d

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: remove always-defined CONFIG_AS_MOVNTDQA

2020-03-24 Thread Patchwork
== Series Details == Series: drm/i915: remove always-defined CONFIG_AS_MOVNTDQA URL : https://patchwork.freedesktop.org/series/75000/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.6.0 Commit: drm/i915: remove always-defined CONFIG_AS_MOVNTDQA - +drivers/gpu/drm/i

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: remove always-defined CONFIG_AS_MOVNTDQA

2020-03-24 Thread Patchwork
== Series Details == Series: drm/i915: remove always-defined CONFIG_AS_MOVNTDQA URL : https://patchwork.freedesktop.org/series/75000/ State : success == Summary == CI Bug Log - changes from CI_DRM_8182 -> Patchwork_17064 Summary ---

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: remove always-defined CONFIG_AS_MOVNTDQA

2020-03-24 Thread Patchwork
== Series Details == Series: drm/i915: remove always-defined CONFIG_AS_MOVNTDQA URL : https://patchwork.freedesktop.org/series/75000/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8182_full -> Patchwork_17064_full Summary -

[Intel-gfx] [PATCH 2/2] drm/i915: Immediately execute the fenced work

2020-03-24 Thread Chris Wilson
If the caller allows and we do not have to wait for any signals, immediately execute the work within the caller's process. By doing so we avoid the overhead of scheduling a new task, and the latency in executing it, at the cost of pulling that work back into the immediate context. (Sometimes we sti

[Intel-gfx] [PATCH 1/2] drm/i915/execlists: Pull tasklet interrupt-bh local to direct submission

2020-03-24 Thread Chris Wilson
We dropped calling process_csb prior to handling direct submission in order to avoid the nesting of spinlocks and lift process_csb() and the majority of the tasklet out of irq-off. However, we do want to avoid ksoftirqd latency in the fast path, so try and pull the interrupt-bh local to direct subm

[Intel-gfx] [PATCH] drm/i915/gt: Select the deepest available parking mode for rc6

2020-03-24 Thread Chris Wilson
On Ivybridge, we can go lower than rc6 to rc6p. And this is required for Ivybridge to hit the same minimum power consumption as rc6 on other platforms, so make it so. Fixes: 730eaeb52426 ("drm/i915/gt: Manual rc6 entry upon parking") Testcase: igt/i915_pm_rc6_residency/rc6-idle Signed-off-by: Chri

[Intel-gfx] [PATCH] drm: add managed resources tied to drm_device

2020-03-24 Thread Daniel Vetter
We have lots of these. And the cleanup code tends to be of dubious quality. The biggest wrong pattern is that developers use devm_, which ties the release action to the underlying struct device, whereas all the userspace visible stuff attached to a drm_device can long outlive that one (e.g. after a

[Intel-gfx] [PATCH i-g-t] i915/i915_pm_rc6_residency: Make ringbuffer rc6 fast

2020-03-24 Thread Chris Wilson
The legacy ringbuffer submission lacks a fast soft-rc6 mechanism as we have no interrupt for an idle ring. As such we are at the mercy of HW RC6... which is not quite as precise as we need to pass this test. Oh well. Since HW is not fast enough to minimise power draw, tell the driver to park as so

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/execlists: Pull tasklet interrupt-bh local to direct submission

2020-03-24 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/execlists: Pull tasklet interrupt-bh local to direct submission URL : https://patchwork.freedesktop.org/series/75008/ State : success == Summary == CI Bug Log - changes from CI_DRM_8182 -> Patchwork_17065 ===

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gt: Select the deepest available parking mode for rc6

2020-03-24 Thread Patchwork
== Series Details == Series: drm/i915/gt: Select the deepest available parking mode for rc6 URL : https://patchwork.freedesktop.org/series/75009/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8182 -> Patchwork_17066 Summary

[Intel-gfx] [PATCH v2 3/3] drm/i915: Add connector dbgfs for all connectors

2020-03-24 Thread Anshuman Gupta
Add connector debugfs attributes for each intel connector which is getting register. v2: - adding connector debugfs for each connector in intel_connector_register() to fix CI failure for legacy connectors. Signed-off-by: Anshuman Gupta --- drivers/gpu/drm/i915/display/intel_connector.c | 3 ++

[Intel-gfx] [PATCH v2 1/3] drm/i915: Power well id for ICL PG3

2020-03-24 Thread Anshuman Gupta
Gen11 onwards PG3 is contains functions for pipe B, external displays, and VGA. It make sense to add a power well id with name ICL_DISP_PW_3 rather then TGL_DISP_PW_3, Also PG3 power well id requires to know if lpsp is enabled. Signed-off-by: Anshuman Gupta --- drivers/gpu/drm/i915/display/intel

[Intel-gfx] [PATCH v2 0/3 RESEND] i915 lpsp support for lpsp igt

2020-03-24 Thread Anshuman Gupta
This series adds i915_lpsp_info connector debugfs. Resend to test with below msgid of igt. Test-with: 20200324130630.9388-2-anshuman.gu...@intel.com Anshuman Gupta (3): drm/i915: Power well id for ICL PG3 drm/i915: Add i915_lpsp_info debugfs drm/i915: Add connector dbgfs for all connectors

[Intel-gfx] [PATCH v2 2/3] drm/i915: Add i915_lpsp_info debugfs

2020-03-24 Thread Anshuman Gupta
New i915_pm_lpsp igt solution approach relies on connector specific debugfs attribute i915_lpsp_info, it exposes whether an output is capable of driving lpsp and exposes lpsp enablement info. v2: - CI fixup. Signed-off-by: Anshuman Gupta --- .../drm/i915/display/intel_display_debugfs.c | 104 +

[Intel-gfx] [PATCH] drm/i915/gt: Select the deepest available parking mode for rc6

2020-03-24 Thread Chris Wilson
On Ivybridge, we can go lower than rc6 to rc6p. And this is required for Ivybridge to hit the same minimum power consumption as rc6 on other platforms, so make it so. v2: Update selftest to include all rc6 residency counters Fixes: 730eaeb52426 ("drm/i915/gt: Manual rc6 entry upon parking") Testc

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm_device managed resources (rev6)

2020-03-24 Thread Patchwork
== Series Details == Series: drm_device managed resources (rev6) URL : https://patchwork.freedesktop.org/series/73633/ State : warning == Summary == $ dim checkpatch origin/drm-tip ac41bc6ebdf2 mm/sl[uo]b: export __kmalloc_track(_node)_caller -:58: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-of

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/execlists: Pull tasklet interrupt-bh local to direct submission

2020-03-24 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/execlists: Pull tasklet interrupt-bh local to direct submission URL : https://patchwork.freedesktop.org/series/75008/ State : success == Summary == CI Bug Log - changes from CI_DRM_8182_full -> Patchwork_17065_full =

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm_device managed resources (rev6)

2020-03-24 Thread Patchwork
== Series Details == Series: drm_device managed resources (rev6) URL : https://patchwork.freedesktop.org/series/73633/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.6.0 Commit: mm/sl[uo]b: export __kmalloc_track(_node)_caller Okay! __

Re: [Intel-gfx] [PATCH v2 1/5] drm: Introduce plane and CRTC scaling filter properties

2020-03-24 Thread Laxminarayan Bharadiya, Pankaj
> -Original Message- > From: Ville Syrjälä > Sent: 23 March 2020 19:52 > To: Laxminarayan Bharadiya, Pankaj > > Cc: Lattannavar, Sameer ; > jani.nik...@linux.intel.com; dan...@ffwll.ch; intel-gfx@lists.freedesktop.org; > dri-de...@lists.freedesktop.org; dani...@collabora.com; Maarten La

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm_device managed resources (rev6)

2020-03-24 Thread Patchwork
== Series Details == Series: drm_device managed resources (rev6) URL : https://patchwork.freedesktop.org/series/73633/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8182 -> Patchwork_17067 Summary --- **FAILURE**

Re: [Intel-gfx] [PATCH v2 3/5] drm/i915: Introduce scaling filter related registers and bit fields.

2020-03-24 Thread Laxminarayan Bharadiya, Pankaj
> -Original Message- > From: Ville Syrjälä > Sent: 23 March 2020 20:09 > To: Laxminarayan Bharadiya, Pankaj > > Cc: Lattannavar, Sameer ; > jani.nik...@linux.intel.com; dan...@ffwll.ch; intel-gfx@lists.freedesktop.org; > dri-de...@lists.freedesktop.org; dani...@collabora.com; Joonas La

Re: [Intel-gfx] [PATCH] drm/i915/gt: Select the deepest available parking mode for rc6

2020-03-24 Thread Andi Shyti
Hi Chris, > struct intel_uncore *uncore = rc6_to_uncore(rc6); > + unsigned int target; > > if (!rc6->enabled) > return; > @@ -622,7 +623,14 @@ void intel_rc6_park(struct intel_rc6 *rc6) > > /* Turn off the HW timers and go directly to rc6 */ > set(unco

[Intel-gfx] ✗ Fi.CI.BUILD: failure for i915 lpsp support for lpsp igt (rev4)

2020-03-24 Thread Patchwork
== Series Details == Series: i915 lpsp support for lpsp igt (rev4) URL : https://patchwork.freedesktop.org/series/74648/ State : failure == Summary == Patch is empty. When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To

Re: [Intel-gfx] [PATCH] drm/i915/gt: Select the deepest available parking mode for rc6

2020-03-24 Thread Andi Shyti
Hi again, Chris, > > @@ -622,7 +623,14 @@ void intel_rc6_park(struct intel_rc6 *rc6) > > > > /* Turn off the HW timers and go directly to rc6 */ > > set(uncore, GEN6_RC_CONTROL, GEN6_RC_CTL_RC6_ENABLE); > > - set(uncore, GEN6_RC_STATE, 0x4 << RC_SW_TARGET_STATE_SHIFT); > > + > > + if

Re: [Intel-gfx] [V8 5/9] drm/i915/dsi: Use private flags to indicate TE in cmd mode

2020-03-24 Thread Jani Nikula
On Thu, 12 Mar 2020, Vandita Kulkarni wrote: > On dsi cmd mode we do not receive vblanks instead > we would get TE and these flags indicate TE is expected on > which port. > > Signed-off-by: Vandita Kulkarni > Reviewed-by: Jani Nikula Pushed up to and including this patch. BR, Jani. > --- >

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Select the deepest available parking mode for rc6 (rev2)

2020-03-24 Thread Patchwork
== Series Details == Series: drm/i915/gt: Select the deepest available parking mode for rc6 (rev2) URL : https://patchwork.freedesktop.org/series/75009/ State : success == Summary == CI Bug Log - changes from CI_DRM_8182 -> Patchwork_17069

Re: [Intel-gfx] [V8 7/9] drm/i915/dsi: Add TE handler for dsi cmd mode.

2020-03-24 Thread Jani Nikula
On Thu, 12 Mar 2020, Vandita Kulkarni wrote: > In case of dual link, we get the TE on slave. > So clear the TE on slave DSI IIR. > > v2: Pass only relevant masked bits to the handler (Jani) > > v3: Fix the check for cmd mode in TE handler function. > > Signed-off-by: Vandita Kulkarni > --- > dri

[Intel-gfx] [PATCH] drm/i915: use forced codec wake on all gen9+ platforms

2020-03-24 Thread Kai Vehmanen
Commit 632f3ab95fe2 ("drm/i915/audio: add codec wakeup override enabled/disable callback"), added logic to toggle Codec Wake on gen9. This is used by audio driver when it resets the HDA controller. It seems explicit toggling of the wakeline can help to fix problems with probe failing on some gen12

Re: [Intel-gfx] [PATCH v2 5/5] drm/i915: Enable scaling filter for plane and CRTC

2020-03-24 Thread Laxminarayan Bharadiya, Pankaj
> -Original Message- > From: Ville Syrjälä > Sent: 23 March 2020 20:18 > To: Laxminarayan Bharadiya, Pankaj > > Cc: Lattannavar, Sameer ; > jani.nik...@linux.intel.com; dan...@ffwll.ch; intel-gfx@lists.freedesktop.org; > dri-de...@lists.freedesktop.org; dani...@collabora.com; Joonas La

Re: [Intel-gfx] [PATCH v2 2/3] drm/i915: Add i915_lpsp_info debugfs

2020-03-24 Thread Jani Nikula
On Tue, 24 Mar 2020, Anshuman Gupta wrote: > New i915_pm_lpsp igt solution approach relies on connector specific > debugfs attribute i915_lpsp_info, it exposes whether an output is > capable of driving lpsp and exposes lpsp enablement info. > > v2: > - CI fixup. > > Signed-off-by: Anshuman Gupta

Re: [Intel-gfx] [PATCH 2/2] drm/i915: move audio CDCLK constraint setup to bind/unbind

2020-03-24 Thread Kai Vehmanen
Hi Ville and others, On Fri, 13 Mar 2020, Kai Vehmanen wrote: > I do know that on more recent hardware (gen12), I will get failures if I > don't strictly follow the requirement. GLK is a special case as it has the > 79Mhz low cdclk. I've not been able to trigger the problem on other old > hard

Re: [Intel-gfx] [PATCH i-g-t] i915/i915_pm_rc6_residency: Make ringbuffer rc6 fast

2020-03-24 Thread Andi Shyti
Hi Chris, On Tue, Mar 24, 2020 at 12:52:33PM +, Chris Wilson wrote: > The legacy ringbuffer submission lacks a fast soft-rc6 > mechanism as we have no interrupt for an idle ring. As such > we are at the mercy of HW RC6... which is not quite as > precise as we need to pass this test. Oh well. >

Re: [Intel-gfx] [PATCH v2 3/3] drm/i915: Add connector dbgfs for all connectors

2020-03-24 Thread Jani Nikula
On Tue, 24 Mar 2020, Anshuman Gupta wrote: > Add connector debugfs attributes for each intel > connector which is getting register. Okay, so this is a good idea, and for that, Reviewed-by: Jani Nikula > v2: > - adding connector debugfs for each connector in > intel_connector_register() to fi

Re: [Intel-gfx] [PATCH 1/2] drm/i915/execlists: Pull tasklet interrupt-bh local to direct submission

2020-03-24 Thread Tvrtko Ursulin
On 24/03/2020 12:07, Chris Wilson wrote: We dropped calling process_csb prior to handling direct submission in order to avoid the nesting of spinlocks and lift process_csb() and the majority of the tasklet out of irq-off. However, we do want to avoid ksoftirqd latency in the fast path, so try a

Re: [Intel-gfx] [PATCH 1/2] drm/i915/execlists: Pull tasklet interrupt-bh local to direct submission

2020-03-24 Thread Tvrtko Ursulin
On 24/03/2020 12:07, Chris Wilson wrote: We dropped calling process_csb prior to handling direct submission in order to avoid the nesting of spinlocks and lift process_csb() and the majority of the tasklet out of irq-off. However, we do want to avoid ksoftirqd latency in the fast path, so try a

Re: [Intel-gfx] [PATCH 7/8] drm/i915: Immediately execute the fenced work

2020-03-24 Thread Tvrtko Ursulin
On 23/03/2020 10:46, Chris Wilson wrote: Quoting Tvrtko Ursulin (2020-03-23 10:37:22) On 23/03/2020 09:28, Chris Wilson wrote: If the caller allows and we do not have to wait for any signals, immediately execute the work within the caller's process. By doing so we avoid the overhead of sched

Re: [Intel-gfx] [PATCH 7/8] drm/i915: Immediately execute the fenced work

2020-03-24 Thread Chris Wilson
Quoting Tvrtko Ursulin (2020-03-24 16:13:04) > > On 23/03/2020 10:46, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2020-03-23 10:37:22) > >> > >> On 23/03/2020 09:28, Chris Wilson wrote: > >>> If the caller allows and we do not have to wait for any signals, > >>> immediately execute the work wi

Re: [Intel-gfx] [PATCH 1/2] drm/i915/execlists: Pull tasklet interrupt-bh local to direct submission

2020-03-24 Thread Chris Wilson
Quoting Tvrtko Ursulin (2020-03-24 16:04:47) > > On 24/03/2020 12:07, Chris Wilson wrote: > > We dropped calling process_csb prior to handling direct submission in > > order to avoid the nesting of spinlocks and lift process_csb() and the > > majority of the tasklet out of irq-off. However, we do

Re: [Intel-gfx] [PATCH 1/2] drm/i915/execlists: Pull tasklet interrupt-bh local to direct submission

2020-03-24 Thread Chris Wilson
Quoting Tvrtko Ursulin (2020-03-24 16:11:10) > > On 24/03/2020 12:07, Chris Wilson wrote: > > We dropped calling process_csb prior to handling direct submission in > > order to avoid the nesting of spinlocks and lift process_csb() and the > > majority of the tasklet out of irq-off. However, we do

Re: [Intel-gfx] [PATCH v2 3/5] drm/i915: Introduce scaling filter related registers and bit fields.

2020-03-24 Thread Ville Syrjälä
On Tue, Mar 24, 2020 at 02:36:10PM +, Laxminarayan Bharadiya, Pankaj wrote: > > > > -Original Message- > > From: Ville Syrjälä > > Sent: 23 March 2020 20:09 > > To: Laxminarayan Bharadiya, Pankaj > > > > Cc: Lattannavar, Sameer ; > > jani.nik...@linux.intel.com; dan...@ffwll.ch; >

Re: [Intel-gfx] [PATCH v2 5/5] drm/i915: Enable scaling filter for plane and CRTC

2020-03-24 Thread Ville Syrjälä
On Tue, Mar 24, 2020 at 03:32:09PM +, Laxminarayan Bharadiya, Pankaj wrote: > > > > -Original Message- > > From: Ville Syrjälä > > Sent: 23 March 2020 20:18 > > To: Laxminarayan Bharadiya, Pankaj > > > > Cc: Lattannavar, Sameer ; > > jani.nik...@linux.intel.com; dan...@ffwll.ch; >

[Intel-gfx] [PATCH 04/21] drm/i915: Parse command buffer earlier in eb_relocate(slow)

2020-03-24 Thread Maarten Lankhorst
We want to introduce backoff logic, but we need to lock the pool object as well for command parsing. Because of this, we will need backoff logic for the engine pool obj, move the batch validation up slightly to eb_lookup_vmas, and the actual command parsing in a separate function which can get call

[Intel-gfx] [PATCH 05/21] drm/i915: Use per object locking in execbuf, v6.

2020-03-24 Thread Maarten Lankhorst
Now that we changed execbuf submission slightly to allow us to do all pinning in one place, we can now simply add ww versions on top of struct_mutex. All we have to do is a separate path for -EDEADLK handling, which needs to unpin all gem bo's before dropping the lock, then starting over. This fin

[Intel-gfx] [PATCH 07/21] drm/i915: Add ww context handling to context_barrier_task

2020-03-24 Thread Maarten Lankhorst
This is required if we want to pass a ww context in intel_context_pin and gen6_ppgtt_pin(). Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/i915_gem_context.c | 55 ++- .../drm/i915/gem/selftests/i915_gem_context.c | 22 +++- 2 files changed, 48 insertions(+),

[Intel-gfx] [PATCH 08/21] drm/i915: Nuke arguments to eb_pin_engine

2020-03-24 Thread Maarten Lankhorst
Those arguments are already set as eb.file and eb.args, so kill off the extra arguments. This will allow us to move eb_pin_engine() to after we reserved all BO's. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 17 +++-- 1 file changed, 7 inserti

[Intel-gfx] [PATCH 13/21] drm/i915: Kill last user of intel_context_create_request outside of selftests

2020-03-24 Thread Maarten Lankhorst
Instead of using intel_context_create_request(), use intel_context_pin() and i915_create_request directly. Now all those calls are gone outside of selftests. :) Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 43 ++--- 1 file changed, 29 insert

[Intel-gfx] [PATCH 18/21] drm/i915: Move i915_vma_lock in the selftests to avoid lock inversion

2020-03-24 Thread Maarten Lankhorst
Signed-off-by: Maarten Lankhorst --- .../i915/gem/selftests/i915_gem_coherency.c | 26 ++- drivers/gpu/drm/i915/selftests/i915_request.c | 18 - 2 files changed, 26 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c

[Intel-gfx] [PATCH 03/21] drm/i915: Remove locking from i915_gem_object_prepare_read/write

2020-03-24 Thread Maarten Lankhorst
Execbuffer submission will perform its own WW locking, and we cannot rely on the implicit lock there. This also makes it clear that the GVT code will get a lockdep splat when multiple batchbuffer shadows need to be performed in the same instance, fix that up. Signed-off-by: Maarten Lankhorst ---

[Intel-gfx] [PATCH 19/21] drm/i915: Add ww locking to vm_fault_gtt

2020-03-24 Thread Maarten Lankhorst
Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/i915_gem_mman.c | 51 +++- 1 file changed, 33 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c index b39c24dae64e..e35e8d0b6938 100644

[Intel-gfx] [PATCH 17/21] drm/i915: Use ww pinning for intel_context_create_request()

2020-03-24 Thread Maarten Lankhorst
We want to get rid of intel_context_pin(), convert intel_context_create_request() first. :) Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gt/intel_context.c | 20 +++- 1 file changed, 15 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_context

[Intel-gfx] [PATCH 12/21] drm/i915: Convert i915_gem_object/client_blt.c to use ww locking as well, v2.

2020-03-24 Thread Maarten Lankhorst
This is the last part outside of selftests that still don't use the correct lock ordering of timeline->mutex vs resv_lock. With gem fixed, there are a few places that still get locking wrong: - gvt/scheduler.c - i915_perf.c - Most if not all selftests. Changes since v1: - Add intel_engine_pm_get/

[Intel-gfx] [PATCH 06/21] drm/i915: Use ww locking in intel_renderstate.

2020-03-24 Thread Maarten Lankhorst
We want to start using ww locking in intel_context_pin, for this we need to lock multiple objects, and the single i915_gem_object_lock is not enough. Convert to using ww-waiting, and make sure we always pin intel_context_state, even if we don't have a renderstate object. Signed-off-by: Maarten La

[Intel-gfx] [PATCH 10/21] drm/i915: Rework intel_context pinning to do everything outside of pin_mutex

2020-03-24 Thread Maarten Lankhorst
Instead of doing everything inside of pin_mutex, we move all pinning outside. Because i915_active has its own reference counting and pinning is also having the same issues vs mutexes, we make sure everything is pinned first, so the pinning in i915_active only needs to bump refcounts. This allows us

[Intel-gfx] [PATCH 14/21] drm/i915: Convert i915_perf to ww locking as well

2020-03-24 Thread Maarten Lankhorst
We have the ordering of timeline->mutex vs resv_lock wrong, convert the i915_pin_vma and intel_context_pin as well to future-proof this. We may need to do future changes to do this more transaction-like, and only get down to a single i915_gem_ww_ctx, but for now this should work. Signed-off-by: M

[Intel-gfx] [PATCH 16/21] drm/i915/selftests: Fix locking inversion in lrc selftest.

2020-03-24 Thread Maarten Lankhorst
This function does not use intel_context_create_request, so it has to use the same locking order as normal code. This is required to shut up lockdep in selftests. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gt/selftest_lrc.c | 15 --- 1 file changed, 12 insertions(+), 3

[Intel-gfx] [PATCH 02/21] drm/i915: Add an implementation for i915_gem_ww_ctx locking, v2.

2020-03-24 Thread Maarten Lankhorst
i915_gem_ww_ctx is used to lock all gem bo's for pinning and memory eviction. We don't use it yet, but lets start adding the definition first. To use it, we have to pass a non-NULL ww to gem_object_lock, and don't unlock directly. It is done in i915_gem_ww_ctx_fini. Changes since v1: - Change ww_

[Intel-gfx] [PATCH 20/21] drm/i915: Add ww locking to pin_to_display_plane

2020-03-24 Thread Maarten Lankhorst
Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/i915_gem_domain.c | 57 -- 1 file changed, 41 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.c b/drivers/gpu/drm/i915/gem/i915_gem_domain.c index e9d3b587f562..1833f58fa615 10

[Intel-gfx] [PATCH 01/21] Revert "drm/i915/gem: Drop relocation slowpath"

2020-03-24 Thread Maarten Lankhorst
This reverts commit 7dc8f1143778 ("drm/i915/gem: Drop relocation slowpath"). We need the slowpath relocation for taking ww-mutex inside the page fault handler, and we will take this mutex when pinning all objects. Cc: Chris Wilson Cc: Matthew Auld Signed-off-by: Maarten Lankhorst --- .../gpu/d

[Intel-gfx] [PATCH 21/21] drm/i915: Ensure we hold the pin mutex

2020-03-24 Thread Maarten Lankhorst
Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gt/intel_renderstate.c | 2 +- drivers/gpu/drm/i915/i915_vma.c | 9 - drivers/gpu/drm/i915/i915_vma.h | 1 + 3 files changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_rend

[Intel-gfx] [PATCH 15/21] drm/i915: Dirty hack to fix selftests locking inversion

2020-03-24 Thread Maarten Lankhorst
Some i915 selftests still use i915_vma_lock() as inner lock, and intel_context_create_request() intel_timeline->mutex as outer lock. Fortunately for selftests this is not an issue, they should be fixed but we can move ahead and cleanify lockdep now. Signed-off-by: Maarten Lankhorst --- drivers/g

[Intel-gfx] [PATCH 09/21] drm/i915: Pin engine before pinning all objects, v3.

2020-03-24 Thread Maarten Lankhorst
We want to lock all gem objects, including the engine context objects, rework the throttling to ensure that we can do this. Now we only throttle once, but can take eb_pin_engine while acquiring objects. This means we will have to drop the lock to wait. If we don't have to throttle we can still take

[Intel-gfx] [PATCH 11/21] drm/i915: Make sure execbuffer always passes ww state to i915_vma_pin.

2020-03-24 Thread Maarten Lankhorst
As a preparation step for full object locking and wait/wound handling during pin and object mapping, ensure that we always pass the ww context in i915_gem_execbuffer.c to i915_vma_pin, use lockdep to ensure this happens. This also requires changing the order of eb_parse slightly, to ensure we pass

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: use forced codec wake on all gen9+ platforms

2020-03-24 Thread Patchwork
== Series Details == Series: drm/i915: use forced codec wake on all gen9+ platforms URL : https://patchwork.freedesktop.org/series/75024/ State : success == Summary == CI Bug Log - changes from CI_DRM_8183 -> Patchwork_17070 Summary ---

Re: [Intel-gfx] [PATCH 00/16] x86, crypto: remove always-defined CONFIG_AS_* and cosolidate Kconfig/Makefiles

2020-03-24 Thread Linus Torvalds
On Tue, Mar 24, 2020 at 1:49 AM Masahiro Yamada wrote: > > If it is OK to queue this up to Kbuild tree, > I will send a pull request to Linus. Looks fine to me, assuming we didn't now get some confusion due to duplicate patches (I think Jason got his tree added to -next already). And yeah, that

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/21] Revert "drm/i915/gem: Drop relocation slowpath"

2020-03-24 Thread Patchwork
== Series Details == Series: series starting with [01/21] Revert "drm/i915/gem: Drop relocation slowpath" URL : https://patchwork.freedesktop.org/series/75026/ State : warning == Summary == $ dim checkpatch origin/drm-tip f298bf3f0b01 Revert "drm/i915/gem: Drop relocation slowpath" -:78: WARN

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/gt: Select the deepest available parking mode for rc6 (rev2)

2020-03-24 Thread Patchwork
== Series Details == Series: drm/i915/gt: Select the deepest available parking mode for rc6 (rev2) URL : https://patchwork.freedesktop.org/series/75009/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8182_full -> Patchwork_17069_full

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [01/21] Revert "drm/i915/gem: Drop relocation slowpath"

2020-03-24 Thread Patchwork
== Series Details == Series: series starting with [01/21] Revert "drm/i915/gem: Drop relocation slowpath" URL : https://patchwork.freedesktop.org/series/75026/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8183 -> Patchwork_17071 ==

Re: [Intel-gfx] [PATCH] drm/i915/display: Trigger Modeset at boot for audio codec init

2020-03-24 Thread Kai Vehmanen
Hey folks, On Fri, 20 Mar 2020, Shankar, Uma wrote: > Souza, Jose wrote: > > On Wed, 2020-03-18 at 17:00 +0530, Uma Shankar wrote: > > > This patch fixes the same by triggering a modeset at boot. > > > > We had the same issue for PSR, take a look to the fix: > > commit 33e059a2e4df454359f642f223

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: use forced codec wake on all gen9+ platforms

2020-03-24 Thread Patchwork
== Series Details == Series: drm/i915: use forced codec wake on all gen9+ platforms URL : https://patchwork.freedesktop.org/series/75024/ State : success == Summary == CI Bug Log - changes from CI_DRM_8183_full -> Patchwork_17070_full Summa

[Intel-gfx] [PATCH 2/3] drm/i915/perf: move pollin setup to non hw specific code

2020-03-24 Thread Umesh Nerlige Ramappa
From: Lionel Landwerlin This isn't really gen specific stuff, so just move it to the common code. v2: Rebase (Umesh) v3: Remove comment, pollin is a per stream state already (Ashutosh) Signed-off-by: Lionel Landwerlin Signed-off-by: Umesh Nerlige Ramappa Reviewed-by: Ashutosh Dixit --- driv

[Intel-gfx] [PATCH 3/3] drm/i915/perf: add new open param to configure polling of OA buffer

2020-03-24 Thread Umesh Nerlige Ramappa
From: Lionel Landwerlin This new parameter let's the application choose how often the OA buffer should be checked on the CPU side for data availability. Longer polling period tend to reduce CPU overhead if the application does not care about somewhat real time data collection. v2: Allow disablin

[Intel-gfx] [PATCH 1/3] drm/i915/perf: rework aging tail workaround

2020-03-24 Thread Umesh Nerlige Ramappa
From: Lionel Landwerlin We're about to introduce an options to open the perf stream, giving the user ability to configure how often it wants the kernel to poll the OA registers for available data. Right now the workaround against the OA tail pointer race condition requires at least twice the int

[Intel-gfx] [PATCH 0/3] drm/i915/perf: add OA interrupt support

2020-03-24 Thread Umesh Nerlige Ramappa
Hi all, This is a revival of an earlier patch series submitted by Lionel Landwerlin - https://patchwork.freedesktop.org/series/54280/ The patches enable interrupt support for the perf OA unit in i915, further details can be found in the orignal series linked above. v2: (Umesh) - This series will

Re: [Intel-gfx] [RFC] GPU-bound energy efficiency improvements for the intel_pstate driver (v2).

2020-03-24 Thread Francisco Jerez
Francisco Jerez writes: > "Pandruvada, Srinivas" writes: > >> Hi Francisco, >> >> On Tue, 2020-03-10 at 14:41 -0700, Francisco Jerez wrote: >>> This is my second take on improving the energy efficiency of the >>> intel_pstate driver under IO-bound conditions. The problem and >>> approach to sol

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/perf: add OA interrupt support (rev8)

2020-03-24 Thread Patchwork
== Series Details == Series: drm/i915/perf: add OA interrupt support (rev8) URL : https://patchwork.freedesktop.org/series/54280/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.6.0 Commit: drm/i915/perf: rework aging tail workaround Okay! Commit: drm/i915/perf: m

Re: [Intel-gfx] [PATCH 07/12] dma-buf: Proxy fence, an unsignaled fence placeholder

2020-03-24 Thread kbuild test robot
Hi Chris, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on drm-tip/drm-tip] [cannot apply to drm-intel/for-linux-next linus/master v5.6-rc7 next-20200324] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/perf: add OA interrupt support (rev8)

2020-03-24 Thread Patchwork
== Series Details == Series: drm/i915/perf: add OA interrupt support (rev8) URL : https://patchwork.freedesktop.org/series/54280/ State : success == Summary == CI Bug Log - changes from CI_DRM_8183 -> Patchwork_17072 Summary --- **SU

Re: [Intel-gfx] [RFC] GPU-bound energy efficiency improvements for the intel_pstate driver (v2).

2020-03-24 Thread Pandruvada, Srinivas
On Tue, 2020-03-24 at 12:16 -0700, Francisco Jerez wrote: > Francisco Jerez writes: > > > "Pandruvada, Srinivas" writes: > > > > > Hi Francisco, > > > > > > On Tue, 2020-03-10 at 14:41 -0700, Francisco Jerez wrote: > > > > This is my second take on improving the energy efficiency of > > > > th

[Intel-gfx] [PATCH v3 3/6] drm/i915/display: Implement intel_display_power_wait_enable_ack()

2020-03-24 Thread José Roberto de Souza
This function is meant to be used after intel_display_power_get_without_ack() this way we can be sure that the HW tied to the powerdomain will be powered and ready. Cc: Imre Deak Cc: Cooper Chiou Cc: Kai-Heng Feng Signed-off-by: José Roberto de Souza --- .../drm/i915/display/intel_display_pow

[Intel-gfx] [PATCH v3 1/6] drm/i915/tc/tgl: Implement TCCOLD sequences

2020-03-24 Thread José Roberto de Souza
TC ports can enter in TCCOLD to save power and is required to request to PCODE to exit this state before use or read to TC registers. For TGL there is a new MBOX command to do that with a parameter to ask PCODE to exit and block TCCOLD entry or unblock TCCOLD entry. For GEN11 the sequence is more

[Intel-gfx] [PATCH v3 6/6] drm/i915/dp: Get TC link reference during DP detection

2020-03-24 Thread José Roberto de Souza
As now the cost to lock and use a TC port is higher due the implementation of the TCCOLD sequences it is worty to hold a reference of the TC port to avoid all this locking at every aux transaction part of the DisplayPort detection. Cc: Imre Deak Cc: Cooper Chiou Cc: Kai-Heng Feng Signed-off-by:

[Intel-gfx] [PATCH v3 5/6] drm/i915/tc/icl: Implement the TC cold exit sequence

2020-03-24 Thread José Roberto de Souza
This is required for legacy/static TC ports as IOM is not aware of the connection and will not trigger the TC cold exit. Just request PCODE to exit TCCOLD is not enough as it could enter again be driver makes use of the port, to prevent it BSpec states that aux powerwell should be held. So before

[Intel-gfx] [PATCH v3 2/6] drm/i915/display: Add intel_display_power_get_without_ack()

2020-03-24 Thread José Roberto de Souza
To implement ICL TC static sequences is required to get the port aux powerwell without wait for hardware ack. Cc: Imre Deak Cc: Cooper Chiou Cc: Kai-Heng Feng Signed-off-by: José Roberto de Souza --- .../drm/i915/display/intel_display_power.c| 71 +++ .../drm/i915/display/

[Intel-gfx] [PATCH v3 4/6] drm/i915/display: Add intel_aux_ch_to_power_domain()

2020-03-24 Thread José Roberto de Souza
This is a similar function to intel_aux_power_domain() but it do not care about TBT ports, this will be needed by GEN11 TC sequences. Cc: Imre Deak Cc: Cooper Chiou Cc: Kai-Heng Feng Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/intel_display.c | 14 -- dri

[Intel-gfx] [PATCH] drm/i915/selftests: Measure the energy consumed while in RC6

2020-03-24 Thread Chris Wilson
Measure and compare the energy consumed, as reported by the rapl MSR, by the GPU while in RC0 and RC6 states. Throw an error if RC6 does not at least halve the energy consumption of RC0, as this more than likely means we failed to enter RC0 correctly. If we can't measure the energy draw with the M

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/6] drm/i915/tc/tgl: Implement TCCOLD sequences

2020-03-24 Thread Patchwork
== Series Details == Series: series starting with [v3,1/6] drm/i915/tc/tgl: Implement TCCOLD sequences URL : https://patchwork.freedesktop.org/series/75034/ State : warning == Summary == $ dim checkpatch origin/drm-tip 125d3dc52b2a drm/i915/tc/tgl: Implement TCCOLD sequences ca5b103fb97c drm/

[Intel-gfx] [PATCH] drm: manage drm_minor cleanup with drmm_

2020-03-24 Thread Daniel Vetter
The cleanup here is somewhat tricky, since we can't tell apart the allocated minor index from 0. So register a cleanup action first, and if the index allocation fails, unregister that cleanup action again to avoid bad mistakes. The kdev for the minor already handles NULL, so no problem there. Hen

Re: [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/6] drm/i915/tc/tgl: Implement TCCOLD sequences

2020-03-24 Thread Souza, Jose
On Tue, 2020-03-24 at 20:28 +, Patchwork wrote: > == Series Details == > > Series: series starting with [v3,1/6] drm/i915/tc/tgl: Implement > TCCOLD sequences > URL : https://patchwork.freedesktop.org/series/75034/ > State : warning > > == Summary == > > $ dim checkpatch origin/drm-tip > 1

[Intel-gfx] [PATCH] drm/i915/selftests: Measure the energy consumed while in RC6

2020-03-24 Thread Chris Wilson
Measure and compare the energy consumed, as reported by the rapl MSR, by the GPU while in RC0 and RC6 states. Throw an error if RC6 does not at least halve the energy consumption of RC0, as this more than likely means we failed to enter RC0 correctly. If we can't measure the energy draw with the M

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,1/6] drm/i915/tc/tgl: Implement TCCOLD sequences

2020-03-24 Thread Patchwork
== Series Details == Series: series starting with [v3,1/6] drm/i915/tc/tgl: Implement TCCOLD sequences URL : https://patchwork.freedesktop.org/series/75034/ State : success == Summary == CI Bug Log - changes from CI_DRM_8183 -> Patchwork_17073 =

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Measure the energy consumed while in RC6

2020-03-24 Thread Chris Wilson
Quoting Chris Wilson (2020-03-24 20:44:55) > + dt = ktime_get(); > + rc0_power = energy_uJ(rc6); > res[0] = rc6_residency(rc6); > msleep(250); > res[1] = rc6_residency(rc6); > + rc0_power = div64_u64(energy_uJ(rc6) - rc0_power, > +

[Intel-gfx] [PATCH] drm/i915/selftests: Measure the energy consumed while in RC6

2020-03-24 Thread Chris Wilson
Measure and compare the energy consumed, as reported by the rapl MSR, by the GPU while in RC0 and RC6 states. Throw an error if RC6 does not at least halve the energy consumption of RC0, as this more than likely means we failed to enter RC0 correctly. If we can't measure the energy draw with the M

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/perf: add OA interrupt support (rev8)

2020-03-24 Thread Patchwork
== Series Details == Series: drm/i915/perf: add OA interrupt support (rev8) URL : https://patchwork.freedesktop.org/series/54280/ State : success == Summary == CI Bug Log - changes from CI_DRM_8183_full -> Patchwork_17072_full Summary -

Re: [Intel-gfx] [PATCH 21/51] drm: Use drmm_ for drm_dev_init cleanup

2020-03-24 Thread Sam Ravnborg
Hi Daniel. On Mon, Mar 23, 2020 at 03:49:20PM +0100, Daniel Vetter wrote: > Well for the simple stuff at least, vblank, gem and minor cleanup I > want to further split up as a demonstration. > > v2: We need to clear drm_device->dev otherwise the debug drm printing > after our cleanup hook (e.g. i

Re: [Intel-gfx] [PATCH 1/3] drm/i915/perf: rework aging tail workaround

2020-03-24 Thread Dixit, Ashutosh
On Tue, 24 Mar 2020 11:54:55 -0700, Umesh Nerlige Ramappa wrote: > > From: Lionel Landwerlin > > We're about to introduce an options to open the perf stream, giving > the user ability to configure how often it wants the kernel to poll > the OA registers for available data. > > Right now the workar

  1   2   >