Gen12 hardware supports HDMI audio pixel clocks of 296.7/297Mhz
and 593.4/594Mhz. Add the missing rates and add logic to ignore
them if running on older hardware.
Bspec: 49333
Signed-off-by: Kai Vehmanen
---
drivers/gpu/drm/i915/display/intel_audio.c | 14 +++---
drivers/gpu/drm/i915/i91
On Mon, Mar 09, 2020 at 11:54:52AM +0100, Takashi Iwai wrote:
> On Fri, 06 Mar 2020 17:45:44 +0100,
> Kai Vehmanen wrote:
> >
> > Hi folks,
> >
> > [+Takashi from ALSA]
> >
> > On Mon, 6 Jan 2020, Matt Roper wrote:
> > >>> On Tue, Dec 31, 2019 at 04:00:07PM +0200, Kai Vehmanen wrote:
> > Re
== Series Details ==
Series: drm/i915/gt: Defend against concurrent updates to execlists->active
(rev2)
URL : https://patchwork.freedesktop.org/series/74447/
State : failure
== Summary ==
Applying: drm/i915/gt: Defend against concurrent updates to execlists->active
Using index info to reconst
On Tue, Mar 10, 2020 at 03:39:20PM +0200, Kai Vehmanen wrote:
> Gen12 hardware supports HDMI audio pixel clocks of 296.7/297Mhz
> and 593.4/594Mhz. Add the missing rates and add logic to ignore
> them if running on older hardware.
>
> Bspec: 49333
> Signed-off-by: Kai Vehmanen
> ---
> drivers/gp
== Series Details ==
Series: Refactor Gen11+ SAGV support
URL : https://patchwork.freedesktop.org/series/74461/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8106 -> Patchwork_16893
Summary
---
**FAILURE**
Serious
As a virtual engine may change the rq->engine to point to the active
request in flight, we need to warn the compiler that an active request's
engine is volatile.
[ 95.017686] write (marked) to 0x8881e8386b10 of 8 bytes by interrupt on
cpu 2:
[ 95.018123] execlists_dequeue+0x762/0x2150 [i
The virtual engine passes tokens back and forth to its backing physical
engines.
[ 57.372993] BUG: KCSAN: data-race in execlists_dequeue [i915] /
virtual_submission_tasklet [i915]
[ 57.373012]
[ 57.373023] write to 0x8881f47324c0 of 4 bytes by interrupt on cpu 2:
[ 57.373241] execlis
When being used across multiple real engines inside a virtual engine,
the intel_context.inflight is updated atomically, and so we must
annotate the racy read from outside the owning context.
[11142.482846] BUG: KCSAN: data-race in __execlists_submission_tasklet [i915] /
__execlists_submission_tas
As a virtual engine may change the rq->engine to point to the active
request in flight, we need to warn the compiler that an active request's
engine is volatile.
[ 95.017686] write (marked) to 0x8881e8386b10 of 8 bytes by interrupt on
cpu 2:
[ 95.018123] execlists_dequeue+0x762/0x2150 [i
From: Tvrtko Ursulin
Use new common helper intel_gt_show_forcewake from both old and new
debugfs code.
Signed-off-by: Tvrtko Ursulin
Cc: Andi Shyti
---
drivers/gpu/drm/i915/gt/debugfs_gt_pm.c | 7 +--
drivers/gpu/drm/i915/gt/intel_gt.h | 2 ++
drivers/gpu/drm/i915/i915_debugfs.c
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/display: Deactive FBC in
fastsets when disabled by parameter (rev2)
URL : https://patchwork.freedesktop.org/series/74401/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8106 -> Patchwork_16894
On Mon, Mar 09, 2020 at 06:11:57PM +0200, Stanislav Lisovskiy wrote:
> We need to start passing memory latency as a
> parameter when calculating plane wm levels,
> as latency can get changed in different
> circumstances(for example with or without SAGV).
> So we need to be more flexible on that mat
Quoting Tvrtko Ursulin (2020-03-10 14:29:58)
> From: Tvrtko Ursulin
>
> Use new common helper intel_gt_show_forcewake from both old and new
> debugfs code.
>
> Signed-off-by: Tvrtko Ursulin
> Cc: Andi Shyti
Fair enough,
Reviewed-by: Chris Wilson
Though the question is why didn't we kill off
On Tue, 2020-03-10 at 16:32 +0200, Ville Syrjälä wrote:
> On Mon, Mar 09, 2020 at 06:11:57PM +0200, Stanislav Lisovskiy wrote:
> > We need to start passing memory latency as a
> > parameter when calculating plane wm levels,
> > as latency can get changed in different
> > circumstances(for example w
On 10/03/2020 14:34, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2020-03-10 14:29:58)
From: Tvrtko Ursulin
Use new common helper intel_gt_show_forcewake from both old and new
debugfs code.
Signed-off-by: Tvrtko Ursulin
Cc: Andi Shyti
Fair enough,
Reviewed-by: Chris Wilson
Though the
Hey,
On Tue, 10 Mar 2020, Ville Syrjälä wrote:
> On Tue, Mar 10, 2020 at 03:39:20PM +0200, Kai Vehmanen wrote:
>> Gen12 hardware supports HDMI audio pixel clocks of 296.7/297Mhz
>> and 593.4/594Mhz. Add the missing rates and add logic to ignore
>> them if running on older hardware.
[...]
> No rea
Avoid angering kcsan by serialising the read of the pm_events with the
write in rps_diable_interrupts.
[ 6268.713419] BUG: KCSAN: data-race in intel_rps_park [i915] / rps_work [i915]
[ 6268.713437]
[ 6268.713449] write to 0x8881eda8efac of 4 bytes by task 1127 on cpu 3:
[ 6268.713680] intel_r
From: Marco Elver
> Sent: 10 March 2020 14:10
...
> FWIW, for writes we're already being quite generous, in that plain
> aligned writes up to word-size are assumed to be "atomic" with the
> default (conservative) config, i.e. marking such writes is optional.
> Although, that's a generous assumption
== Series Details ==
Series: Per client engine busyness (rev5)
URL : https://patchwork.freedesktop.org/series/70977/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8106 -> Patchwork_16896
Summary
---
**FAILURE**
Se
== Series Details ==
Series: Per client engine busyness (rev5)
URL : https://patchwork.freedesktop.org/series/70977/
State : warning
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
CHK include/generated/compile.h
Kernel: arch/x86/boot/bzImage is r
Chris Wilson writes:
> When being used across multiple real engines inside a virtual engine,
> the intel_context.inflight is updated atomically, and so we must
> annotate the racy read from outside the owning context.
>
> [11142.482846] BUG: KCSAN: data-race in __execlists_submission_tasklet [i91
== Series Details ==
Series: Per client engine busyness (rev5)
URL : https://patchwork.freedesktop.org/series/70977/
State : warning
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
CHK include/generated/compile.h
Kernel: arch/x86/boot/bzImage is r
== Series Details ==
Series: Per client engine busyness (rev5)
URL : https://patchwork.freedesktop.org/series/70977/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8106 -> Patchwork_16896
Summary
---
**FAILURE**
Se
Chris Wilson writes:
> As a virtual engine may change the rq->engine to point to the active
> request in flight, we need to warn the compiler that an active request's
> engine is volatile.
>
> [ 95.017686] write (marked) to 0x8881e8386b10 of 8 bytes by interrupt
> on cpu 2:
> [ 95.018123
Quoting Tvrtko Ursulin (2020-03-09 18:31:21)
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> index 0893ce781a84..0302757396d5 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_e
Chris Wilson writes:
> The virtual engine passes tokens back and forth to its backing physical
> engines.
>
> [ 57.372993] BUG: KCSAN: data-race in execlists_dequeue [i915] /
> virtual_submission_tasklet [i915]
> [ 57.373012]
> [ 57.373023] write to 0x8881f47324c0 of 4 bytes by interru
Record the initial active element we use when building the next ELSP
submission, so that we can compare against it latter to see if there's
no change.
Fixes: 44d0a9c05bc0 ("drm/i915/execlists: Skip redundant resubmission")
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 36
== Series Details ==
Series: drm/i915/perf: Invalidate OA TLB on when closing perf stream
URL : https://patchwork.freedesktop.org/series/74469/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8106 -> Patchwork_16897
Summary
-
These debugfs entry will help testapp to understand the test request
during dp phy compliance mode.
Acked-by: Manasi Navare
Signed-off-by: Animesh Manna
---
drivers/gpu/drm/i915/display/intel_display_debugfs.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/driv
This patch process phy compliance request by programming requested
vswing, pre-emphasis and test pattern.
v1: Initial patch.
v2: Fixes added during testing with test-scope. (Khaled/Clint/Manasi)
- pipe used as argument during registers programming instead of port.
- TRANS_CONF must be disable/enab
During phy compliance auto test mode source need to read
requested test pattern from sink through DPCD. After processing
the request source need to set the pattern. So set/get method
added in drm layer as it is DP protocol.
v2: As per review feedback from Manasi on RFC version,
- added dp revision
During DP phy compliance auto test mode, sink will request
combination of different test pattern with differnt level of
vswing, pre-emphasis. Function added to prepare for it.
Reviewed-by: Manasi Navare
Signed-off-by: Animesh Manna
---
.../drm/i915/display/intel_display_types.h| 1 +
drive
DP_COMP_CTL and DP_COMP_PAT register used to program DP
compliance pattern.
Reviewed-by: Manasi Navare
Signed-off-by: Animesh Manna
---
drivers/gpu/drm/i915/i915_reg.h | 20
1 file changed, 20 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i91
Driver changes mainly to process the request coming from Test equipment
as short pulse hpd interrupt to change link-pattern/v-swing/pre-emphasis
Complete auto test suite takes much lesser time than manual run.
Overall design:
--
Automate test request will come to source device as HDP s
[Why]:
Aligh with DP spec wanted to follow same naming convention.
[How]:
Changed the macro name of the dpcd address used for getting requested
test-pattern.
Cc: Harry Wentland
Cc: Alex Deucher
Reviewed-by: Harry Wentland
Signed-off-by: Animesh Manna
---
drivers/gpu/drm/amd/display/dc/core/d
vswing/pre-emphasis adjustment calculation is needed in processing
of auto phy compliance request other than link training, so have
made non-static function.
No functional change.
v1: initial patch.
v2:
- used "intel_dp" prefix in function name. (Jani)
- used array notation instead pointer for li
On Tue, Mar 10, 2020 at 03:05:57PM +, David Laight wrote:
> From: Marco Elver
> > Sent: 10 March 2020 14:10
> ...
> > FWIW, for writes we're already being quite generous, in that plain
> > aligned writes up to word-size are assumed to be "atomic" with the
> > default (conservative) config, i.e.
On Tue, Mar 10, 2020 at 05:50:31AM -0700, Paul E. McKenney wrote:
> On Tue, Mar 10, 2020 at 12:23:34PM +, David Laight wrote:
> > From: Chris Wilson
> > > Sent: 10 March 2020 11:50
> > >
> > > Quoting David Laight (2020-03-10 11:36:41)
> > > > From: Chris Wilson
> > > > > Sent: 10 March 2020 0
On Tue, Mar 10, 2020 at 12:23:34PM +, David Laight wrote:
> From: Chris Wilson
> > Sent: 10 March 2020 11:50
> >
> > Quoting David Laight (2020-03-10 11:36:41)
> > > From: Chris Wilson
> > > > Sent: 10 March 2020 09:21
> > > > Instruct the compiler to read the next element in the list iteratio
On Tue, Feb 25, 2020 at 12:35:41PM +0530, Pankaj Bharadiya wrote:
> Introduce new scaling filter property to allow userspace to select
> the driver's default scaling filter or Nearest-neighbor(NN) filter
> for upscaling operations on crtc/plane.
>
> Drivers can set up this property for a plane by
From: Tvrtko Ursulin
Allow super long OpenCL workloads which cannot be preempted within
the default timeout to run out of the box.
Signed-off-by: Tvrtko Ursulin
Cc: Chris Wilson
Cc: Joonas Lahtinen
Cc: Michal Mrozek
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 11 ++-
1 file chan
Record the initial active element we use when building the next ELSP
submission, so that we can compare against it latter to see if there's
no change.
Fixes: 44d0a9c05bc0 ("drm/i915/execlists: Skip redundant resubmission")
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 32
On Tue, Feb 25, 2020 at 12:35:43PM +0530, Pankaj Bharadiya wrote:
> Attach scaling filter property for crtc and plane and program the
> scaler control register for the selected filter type.
>
> This is preparatory patch to enable Nearest-neighbor integer scaling.
>
> Signed-off-by: Pankaj Bharadi
Quoting Tvrtko Ursulin (2020-03-10 16:00:47)
> @@ -316,7 +317,7 @@ static int intel_engine_setup(struct intel_gt *gt, enum
> intel_engine_id id)
> engine->props.max_busywait_duration_ns =
> CONFIG_DRM_I915_MAX_REQUEST_BUSYWAIT;
> engine->props.preempt_timeout_ms =
>
On Tue, Feb 25, 2020 at 12:35:44PM +0530, Pankaj Bharadiya wrote:
> Introduce scaler registers and bit fields needed to configure the
> scaling filter in prgrammed mode and configure scaling filter
> coefficients.
>
> Signed-off-by: Pankaj Bharadiya
> Signed-off-by: Ankit Nautiyal
> ---
> drive
== Series Details ==
Series: series starting with [v5,1/2] drm/edid: Name the detailed monitor range
flags
URL : https://patchwork.freedesktop.org/series/74471/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8106 -> Patchwork_16898
=
On Tue, Feb 25, 2020 at 12:35:45PM +0530, Pankaj Bharadiya wrote:
> Integer scaling (IS) is a nearest-neighbor upscaling technique that
> simply scales up the existing pixels by an integer
> (i.e., whole number) multiplier.Nearest-neighbor (NN) interpolation
> works by filling in the missing color
On Mon, Mar 09, 2020 at 02:39:39PM -0700, Manasi Navare wrote:
> This patch adds defines for the detailed monitor
> range flags as per the EDID specification.
>
> v2:
> * Rename the flags with DRM_EDID_ (Jani N)
>
> Suggested-by: Ville Syrjälä
> Cc: Ville Syrjälä
> Cc: Harry Wentland
> Cc: Cli
Gen12 hardware supports HDMI audio pixel clocks of 296.7/297Mhz
and 593.4/594Mhz. Add the missing rates and add logic to ignore
them if running on older hardware.
Bspec: 49333
Signed-off-by: Kai Vehmanen
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_audio.c | 8
dri
Matt Roper writes:
> On gen11 the XY_FAST_COPY_BLT command has some size restrictions on its
> usage. Although this instruction is mainly used by userspace, i915 also
> uses it to copy object contents during some selftests, so let's ensure
> the restrictions are followed.
>
> Bspec: 6544
> Signe
On Mon, Mar 09, 2020 at 02:39:40PM -0700, Manasi Navare wrote:
> Adaptive Sync is a VESA feature so add a DRM core helper to parse
> the EDID's detailed descritors to obtain the adaptive sync monitor range.
> Store this info as part fo drm_display_info so it can be used
> across all drivers.
> This
From: Tvrtko Ursulin
Allow super long OpenCL workloads which cannot be preempted within
the default timeout to run out of the box.
v2:
* Make it stick out more and apply only to RCS. (Chris)
Signed-off-by: Tvrtko Ursulin
Cc: Chris Wilson
Cc: Joonas Lahtinen
Cc: Michal Mrozek
---
drivers/g
Quoting Tvrtko Ursulin (2020-03-10 16:24:28)
> From: Tvrtko Ursulin
>
> Allow super long OpenCL workloads which cannot be preempted within
> the default timeout to run out of the box.
>
> v2:
> * Make it stick out more and apply only to RCS. (Chris)
>
> Signed-off-by: Tvrtko Ursulin
> Cc: Chr
== Series Details ==
Series: drm: Add support for integrated privacy screen
URL : https://patchwork.freedesktop.org/series/74473/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8106 -> Patchwork_16899
Summary
---
**SU
Quoting Matt Roper (2020-03-10 00:49:07)
> The bspec description for this workaround tells us to program
> 0x_ into both FBC_RT_BASE_ADDR_REGISTER_* registers, but we've
> previously found that this leads to failures in CI. Our suspicion is
> that the failures are caused by this valid turn
From: Tvrtko Ursulin
The two files have been duplicated under the gt/ subdir and since there
are not apparent users looking for them at the old location lets simply
remove them and duplicated code.
Signed-off-by: Tvrtko Ursulin
Cc: Andi Shyti
Cc: Chris Wilson
---
drivers/gpu/drm/i915/i915_de
On Tue, Mar 10, 2020 at 04:37:52PM +, Chris Wilson wrote:
> Quoting Matt Roper (2020-03-10 00:49:07)
> > The bspec description for this workaround tells us to program
> > 0x_ into both FBC_RT_BASE_ADDR_REGISTER_* registers, but we've
> > previously found that this leads to failures in C
Quoting Tvrtko Ursulin (2020-03-10 16:47:33)
> From: Tvrtko Ursulin
>
> The two files have been duplicated under the gt/ subdir and since there
> are not apparent users looking for them at the old location lets simply
> remove them and duplicated code.
>
> Signed-off-by: Tvrtko Ursulin
> Cc: An
[11057.642683] BUG: KCSAN: data-race in i915_gem_mmap [i915] /
singleton_release [i915]
[11057.642717]
[11057.642740] write (marked) to 0x8881f24471a0 of 8 bytes by task 44668 on
cpu 2:
[11057.643162] singleton_release+0x38/0x60 [i915]
[11057.643192] __fput+0x160/0x3c0
[11057.643217] f
Hi,
On Tue, 10 Mar 2020, Ville Syrjälä wrote:
>> On Fri, 06 Mar 2020 17:45:44 +0100, Kai Vehmanen wrote:
>>> Similarly on i915 side, it would seem pretty unlikely that we are going
>>> to get smooth changes of CDCLK. It might work better on some platforms,
>
> There is new hw in the pipeline th
== Series Details ==
Series: Gen11 workarounds
URL : https://patchwork.freedesktop.org/series/74475/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8106 -> Patchwork_16900
Summary
---
**FAILURE**
Serious unknown ch
== Series Details ==
Series: drm/i915/display: conversion to drm_device based logging macros (rev6)
URL : https://patchwork.freedesktop.org/series/72760/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
9af612966bd6 drm/i915/dsb: convert to drm_device based logging macros.
ffc752e
== Series Details ==
Series: drm/i915/display: conversion to drm_device based logging macros (rev6)
URL : https://patchwork.freedesktop.org/series/72760/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8106 -> Patchwork_16901
Quoting Tvrtko Ursulin (2020-03-09 18:31:18)
> +struct i915_drm_clients {
> + struct mutex lock;
> + struct xarray xarray;
> + u32 next_id;
> +
> + struct kobject *root;
> +};
> +
> +struct i915_drm_client {
> + struct kref kref;
> +
> + struct rcu_head rcu;
> +
Quoting Tvrtko Ursulin (2020-03-09 18:31:19)
> @@ -92,8 +107,8 @@ __i915_drm_client_register(struct i915_drm_client *client,
> static void
> __i915_drm_client_unregister(struct i915_drm_client *client)
> {
> - put_pid(fetch_and_zero(&client->pid));
> - kfree(fetch_and_zero(&client->n
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/display: Deactive FBC in
fastsets when disabled by parameter (rev2)
URL : https://patchwork.freedesktop.org/series/74401/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8106_full -> Patchwork_16894_full
==
Quoting Tvrtko Ursulin (2020-03-09 18:31:20)
> From: Tvrtko Ursulin
>
> If we make GEM contexts keep a reference to i915_drm_client for the whole
> of their lifetime, we can consolidate the current task pid and name usage
> by getting it from the client.
>
> Signed-off-by: Tvrtko Ursulin
> ---
On Tue, Mar 10, 2020 at 07:18:58PM +0200, Kai Vehmanen wrote:
> Hi,
>
> On Tue, 10 Mar 2020, Ville Syrjälä wrote:
>
> >> On Fri, 06 Mar 2020 17:45:44 +0100, Kai Vehmanen wrote:
> >>> Similarly on i915 side, it would seem pretty unlikely that we are going
> >>> to get smooth changes of CDCLK. It m
Quoting Tvrtko Ursulin (2020-03-09 18:31:22)
> From: Tvrtko Ursulin
>
> As contexts are abandoned we want to remember how much GPU time they used
> (per class) so later we can used it for smarter purposes.
>
> Signed-off-by: Tvrtko Ursulin
> ---
> drivers/gpu/drm/i915/gem/i915_gem_context.c
Quoting Tvrtko Ursulin (2020-03-09 18:31:23)
> diff --git a/drivers/gpu/drm/i915/i915_drm_client.h
> b/drivers/gpu/drm/i915/i915_drm_client.h
> index 7825df32798d..10752107e8c7 100644
> --- a/drivers/gpu/drm/i915/i915_drm_client.h
> +++ b/drivers/gpu/drm/i915/i915_drm_client.h
> @@ -16,6 +16,8 @@
i915 can enable aux device nodes for DP MST by calling
drm_dp_mst_connector_late_register()/drm_dp_mst_connector_early_unregister(),
so let's hook that up.
Cc: Ville Syrjälä
Cc: Manasi Navare
Cc: "Lee, Shawn C"
Signed-off-by: Lyude Paul
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 22 +++
Quoting Tvrtko Ursulin (2020-03-09 18:31:25)
> +static ssize_t
> +show_client_busy(struct device *kdev, struct device_attribute *attr, char
> *buf)
> +{
> + struct i915_engine_busy_attribute *i915_attr =
> + container_of(attr, typeof(*i915_attr), attr);
> + unsigned int c
Quoting Tvrtko Ursulin (2020-03-09 18:31:26)
> From: Tvrtko Ursulin
>
> Some customers want to know how much of the GPU time are their clients
> using in order to make dynamic load balancing decisions.
>
> With the hooks already in place which track the overall engine busyness,
> we can extend t
On Tue, Mar 10, 2020 at 02:28:54PM -0400, Lyude Paul wrote:
> i915 can enable aux device nodes for DP MST by calling
> drm_dp_mst_connector_late_register()/drm_dp_mst_connector_early_unregister(),
> so let's hook that up.
Oh, we didn't have that yet? I thought it got hooked up for everyone
but I g
== Series Details ==
Series: series starting with [01/17] drm/i915: Add an implementation for
i915_gem_ww_ctx locking, v2. (rev2)
URL : https://patchwork.freedesktop.org/series/74387/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8097_full -> Patchwork_16884_full
On Tue, 2020-03-10 at 20:42 +0200, Ville Syrjälä wrote:
> On Tue, Mar 10, 2020 at 02:28:54PM -0400, Lyude Paul wrote:
> > i915 can enable aux device nodes for DP MST by calling
> > drm_dp_mst_connector_late_register()/drm_dp_mst_connector_early_unregister
> > (),
> > so let's hook that up.
>
> Oh,
i915 can enable aux device nodes for DP MST by calling
drm_dp_mst_connector_late_register()/drm_dp_mst_connector_early_unregister(),
so let's hook that up.
Changes since v1:
* Call intel_connector_register/unregister() from
intel_dp_mst_connector_late_register/unregister() so we don't lose
err
On Tue, Mar 10, 2020 at 02:54:16PM -0400, Lyude Paul wrote:
> i915 can enable aux device nodes for DP MST by calling
> drm_dp_mst_connector_late_register()/drm_dp_mst_connector_early_unregister(),
> so let's hook that up.
>
> Changes since v1:
> * Call intel_connector_register/unregister() from
>
Hi Ville,
Please find answers to your concerns below:
On Mon, Mar 09, 2020 at 02:39:40PM -0700, Manasi Navare wrote:
> Adaptive Sync is a VESA feature so add a DRM core helper to parse
> the EDID's detailed descritors to obtain the adaptive sync monitor range.
> Store this info as part fo drm_dis
On Tue, Mar 10, 2020 at 06:20:27PM +0200, Ville Syrjälä wrote:
> On Mon, Mar 09, 2020 at 02:39:39PM -0700, Manasi Navare wrote:
> > This patch adds defines for the detailed monitor
> > range flags as per the EDID specification.
> >
> > v2:
> > * Rename the flags with DRM_EDID_ (Jani N)
> >
> > Su
On Tue, 10 Mar 2020 19:25:22 +0100,
Ville Syrjälä wrote:
>
> On Tue, Mar 10, 2020 at 07:18:58PM +0200, Kai Vehmanen wrote:
> > One problematic scenario that this doesn't cover:
> > - a single display is used (at low cdclk), and
> > - audio block goes to runtime suspend while display stays up.
On Tue, Mar 10, 2020 at 12:08:33PM -0700, Manasi Navare wrote:
> Hi Ville,
>
> Please find answers to your concerns below:
>
> On Mon, Mar 09, 2020 at 02:39:40PM -0700, Manasi Navare wrote:
> > Adaptive Sync is a VESA feature so add a DRM core helper to parse
> > the EDID's detailed descritors to
On Tue, Mar 10, 2020 at 09:13:30PM +0200, Ville Syrjälä wrote:
> On Tue, Mar 10, 2020 at 12:08:33PM -0700, Manasi Navare wrote:
> > Hi Ville,
> >
> > Please find answers to your concerns below:
> >
> > On Mon, Mar 09, 2020 at 02:39:40PM -0700, Manasi Navare wrote:
> > > Adaptive Sync is a VESA fe
On Tue, 2020-03-10 at 21:06 +0200, Ville Syrjälä wrote:
> On Tue, Mar 10, 2020 at 02:54:16PM -0400, Lyude Paul wrote:
> > i915 can enable aux device nodes for DP MST by calling
> > drm_dp_mst_connector_late_register()/drm_dp_mst_connector_early_unregister
> > (),
> > so let's hook that up.
> >
> >
101 - 184 of 184 matches
Mail list logo
