[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add support for mipi dsi cmd mode (rev5)

2020-01-09 Thread Patchwork
== Series Details == Series: Add support for mipi dsi cmd mode (rev5) URL : https://patchwork.freedesktop.org/series/69290/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.6.0 Commit: drm/i915/dsi: Configure transcoder operation for command mode. Okay! Commit: drm

Re: [Intel-gfx] [PATCH] drm/i915/dp: Add current maximum eDP link rate to sink_rate array.

2020-01-09 Thread Ville Syrjälä
On Thu, Jan 09, 2020 at 06:57:14PM +0100, Mario Kleiner wrote: > On Thu, Jan 9, 2020 at 5:47 PM Ville Syrjälä > wrote: > > > On Thu, Jan 09, 2020 at 05:30:05PM +0100, Mario Kleiner wrote: > > > On Thu, Jan 9, 2020 at 4:38 PM Ville Syrjälä < > > ville.syrj...@linux.intel.com> > > > wrote: > > > >

Re: [Intel-gfx] [PATCH] drm/i915/gt: Validation rotated vma bounds are within the object

2020-01-09 Thread Ville Syrjälä
On Thu, Jan 09, 2020 at 04:52:41PM +0200, Ville Syrjälä wrote: > On Thu, Jan 09, 2020 at 02:11:52PM +, Chris Wilson wrote: > > Quite understandably, we bug out when asked to find a page that doesn't > > belong to the object. However, we should report the error back to the > > user long before w

Re: [Intel-gfx] [PATCH] drm/i915/gt: Validation rotated vma bounds are within the object

2020-01-09 Thread Ville Syrjälä
On Thu, Jan 09, 2020 at 08:37:09PM +0200, Ville Syrjälä wrote: > On Thu, Jan 09, 2020 at 04:52:41PM +0200, Ville Syrjälä wrote: > > On Thu, Jan 09, 2020 at 02:11:52PM +, Chris Wilson wrote: > > > Quite understandably, we bug out when asked to find a page that doesn't > > > belong to the object.

[Intel-gfx] ✓ Fi.CI.BAT: success for Add support for mipi dsi cmd mode (rev5)

2020-01-09 Thread Patchwork
== Series Details == Series: Add support for mipi dsi cmd mode (rev5) URL : https://patchwork.freedesktop.org/series/69290/ State : success == Summary == CI Bug Log - changes from CI_DRM_7712 -> Patchwork_16037 Summary --- **SUCCESS*

Re: [Intel-gfx] [PATCH] drm/i915/dp: Add current maximum eDP link rate to sink_rate array.

2020-01-09 Thread Alex Deucher
On Thu, Jan 9, 2020 at 11:47 AM Mario Kleiner wrote: > > On Thu, Jan 9, 2020 at 4:40 PM Alex Deucher wrote: >> >> On Thu, Jan 9, 2020 at 10:08 AM Mario Kleiner >> wrote: >> > >> > If the current eDP link rate, as read from hw, provides a >> > higher bandwidth than the standard link rates, then a

Re: [Intel-gfx] [PATCH] drm/i915/dp: Add current maximum eDP link rate to sink_rate array.

2020-01-09 Thread Mario Kleiner
On Thu, Jan 9, 2020 at 7:24 PM Ville Syrjälä wrote: > On Thu, Jan 09, 2020 at 06:57:14PM +0100, Mario Kleiner wrote: > > On Thu, Jan 9, 2020 at 5:47 PM Ville Syrjälä < > ville.syrj...@linux.intel.com> > > wrote: > > > > > On Thu, Jan 09, 2020 at 05:30:05PM +0100, Mario Kleiner wrote: > > > > On T

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/3] drm/i915: Flush idle barriers when waiting

2020-01-09 Thread Patchwork
== Series Details == Series: series starting with [CI,1/3] drm/i915: Flush idle barriers when waiting URL : https://patchwork.freedesktop.org/series/71819/ State : warning == Summary == $ dim checkpatch origin/drm-tip 421ad93f393d drm/i915: Flush idle barriers when waiting 275b6f677174 drm/i91

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/3] drm/i915: Flush idle barriers when waiting

2020-01-09 Thread Patchwork
== Series Details == Series: series starting with [CI,1/3] drm/i915: Flush idle barriers when waiting URL : https://patchwork.freedesktop.org/series/71819/ State : success == Summary == CI Bug Log - changes from CI_DRM_7714 -> Patchwork_16038 ===

Re: [Intel-gfx] [PATCH] drm/i915/dp: Add current maximum eDP link rate to sink_rate array.

2020-01-09 Thread Mario Kleiner
On Thu, Jan 9, 2020 at 8:49 PM Alex Deucher wrote: > On Thu, Jan 9, 2020 at 11:47 AM Mario Kleiner > wrote: > > > > On Thu, Jan 9, 2020 at 4:40 PM Alex Deucher > wrote: > >> > >> On Thu, Jan 9, 2020 at 10:08 AM Mario Kleiner > >> wrote: > >> > > As Harry mentioned in the other thread, won't th

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/hdcp: restore hdcp state same as previous

2020-01-09 Thread Patchwork
== Series Details == Series: drm/i915/hdcp: restore hdcp state same as previous URL : https://patchwork.freedesktop.org/series/71820/ State : success == Summary == CI Bug Log - changes from CI_DRM_7714 -> Patchwork_16039 Summary ---

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Revert "drm/i915/tgl: Wa_1607138340"

2020-01-09 Thread Patchwork
== Series Details == Series: drm/i915: Revert "drm/i915/tgl: Wa_1607138340" URL : https://patchwork.freedesktop.org/series/71774/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7705_full -> Patchwork_16031_full Summary -

[Intel-gfx] [PATCH] drm/i915/tgl: Add Wa_1409825376 to tgl

2020-01-09 Thread Radhakrishna Sripada
Workaround database indicates we should disable VRH clockgating in pre-production hardware. Cc: Matt Roper Signed-off-by: Radhakrishna Sripada --- drivers/gpu/drm/i915/i915_reg.h | 3 +++ drivers/gpu/drm/i915/intel_pm.c | 5 + 2 files changed, 8 insertions(+) diff --git a/drivers/gpu/drm/i

[Intel-gfx] [PATCH v3] drm/i915: Bump up CDCLK to eliminate underruns on TGL

2020-01-09 Thread Stanislav Lisovskiy
There seems to be some undocumented bandwidth bottleneck/dependency which scales with CDCLK, causing FIFO underruns when CDCLK is too low, even when it's correct from BSpec point of view. Currently for TGL platforms we calculate min_cdclk initially based on pixel_rate divided by 2, accounting for

Re: [Intel-gfx] [PATCH] drm/i915/tgl: Add Wa_1409825376 to tgl

2020-01-09 Thread Matt Roper
On Thu, Jan 09, 2020 at 02:02:26PM -0800, Radhakrishna Sripada wrote: > Workaround database indicates we should disable VRH clockgating > in pre-production hardware. Maybe also add a Bspec: 52890 Bspec: 49424 for reference? > > Cc: Matt Roper > Signed-off-by: Radhakrishna Sripada > -

[Intel-gfx] ✓ Fi.CI.BAT: success for Use new logging macros in drm/i915

2020-01-09 Thread Patchwork
== Series Details == Series: Use new logging macros in drm/i915 URL : https://patchwork.freedesktop.org/series/71824/ State : success == Summary == CI Bug Log - changes from CI_DRM_7714 -> Patchwork_16040 Summary --- **SUCCESS** N

[Intel-gfx] [PATCH i-g-t] test/i915_pm_rc6_residency: Check we enter RC6 when mostly idle

2020-01-09 Thread Chris Wilson
Long ago, we would only approach runtime-suspend if the GPU had been idle (no userspace submissions) for a second or two. However, since disabling automatic HW RC6 such a relaxed approach to runtime-suspend caused us to never enter RC6 on the desktop and consume vast quantities of power. Surmise th

Re: [Intel-gfx] [PATCH] drm/i915/tgl: Add Wa_1409825376 to tgl

2020-01-09 Thread Sripada, Radhakrishna
> -Original Message- > From: Roper, Matthew D > Sent: Thursday, January 9, 2020 2:12 PM > To: Sripada, Radhakrishna > Cc: intel-gfx@lists.freedesktop.org > Subject: Re: [PATCH] drm/i915/tgl: Add Wa_1409825376 to tgl > > On Thu, Jan 09, 2020 at 02:02:26PM -0800, Radhakrishna Sripada wr

Re: [Intel-gfx] [PATCH v3] drm/i915: Bump up CDCLK to eliminate underruns on TGL

2020-01-09 Thread Matt Roper
On Fri, Jan 10, 2020 at 12:05:47AM +0200, Stanislav Lisovskiy wrote: > There seems to be some undocumented bandwidth > bottleneck/dependency which scales with CDCLK, > causing FIFO underruns when CDCLK is too low, > even when it's correct from BSpec point of view. > > Currently for TGL platforms w

[Intel-gfx] [PATCH v2] drm/i915/tgl: Add Wa_1409825376 to tgl

2020-01-09 Thread Radhakrishna Sripada
Workaround database indicates we should disable VRH clockgating in pre-production hardware. V2: - Use REG_BIT macro - Update reference in commit message(Matt) Bspec: 52890 Bspec: 49424 Reviewed-by: Matt Roper Signed-off-by: Radhakrishna Sripada --- drivers/gpu/drm/i915/i915_reg.h | 3 +++ dr

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gtt: add missing include file asm/smp.h (rev2)

2020-01-09 Thread Patchwork
== Series Details == Series: drm/i915/gtt: add missing include file asm/smp.h (rev2) URL : https://patchwork.freedesktop.org/series/71825/ State : warning == Summary == $ dim checkpatch origin/drm-tip 40572cdbb11d drm/i915/gtt: add missing include file asm/smp.h -:23: WARNING:INCLUDE_LINUX: Us

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/dp: Reset intel_dp->link_trained in init_connector

2020-01-09 Thread Patchwork
== Series Details == Series: drm/i915/dp: Reset intel_dp->link_trained in init_connector URL : https://patchwork.freedesktop.org/series/71801/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7705_full -> Patchwork_16033_full

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gtt: add missing include file asm/smp.h (rev2)

2020-01-09 Thread Patchwork
== Series Details == Series: drm/i915/gtt: add missing include file asm/smp.h (rev2) URL : https://patchwork.freedesktop.org/series/71825/ State : success == Summary == CI Bug Log - changes from CI_DRM_7714 -> Patchwork_16041 Summary --

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gt: Validation rotated vma bounds are within the object

2020-01-09 Thread Patchwork
== Series Details == Series: drm/i915/gt: Validation rotated vma bounds are within the object URL : https://patchwork.freedesktop.org/series/71827/ State : warning == Summary == $ dim checkpatch origin/drm-tip cd35fb1ef5a1 drm/i915/gt: Validation rotated vma bounds are within the object -:23:

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/dp: Add current maximum eDP link rate to sink_rate array. (rev2)

2020-01-09 Thread Patchwork
== Series Details == Series: drm/i915/dp: Add current maximum eDP link rate to sink_rate array. (rev2) URL : https://patchwork.freedesktop.org/series/71828/ State : failure == Summary == Applying: drm/i915/dp: Add current maximum eDP link rate to sink_rate array. error: corrupt patch at line

[Intel-gfx] [PATCH] drm/i915: add Wa_14010594013: icl,ehl

2020-01-09 Thread Matt Atwood
The bspec tells us we need to set this bit to avoid potential underruns. Bspec: 33450 Bspec: 33451 Bspec: 33452 Signed-off-by: Matt Atwood --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_pm.c | 4 2 files changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/i91

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gt: Validation rotated vma bounds are within the object

2020-01-09 Thread Patchwork
== Series Details == Series: drm/i915/gt: Validation rotated vma bounds are within the object URL : https://patchwork.freedesktop.org/series/71827/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7714 -> Patchwork_16042 Summa

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/2] drm/i915: Start chopping up the GPU error capture

2020-01-09 Thread Patchwork
== Series Details == Series: series starting with [CI,1/2] drm/i915: Start chopping up the GPU error capture URL : https://patchwork.freedesktop.org/series/71838/ State : warning == Summary == $ dim checkpatch origin/drm-tip 903f29fbd15c drm/i915: Start chopping up the GPU error capture -:90:

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/2] drm/i915: Start chopping up the GPU error capture

2020-01-09 Thread Patchwork
== Series Details == Series: series starting with [CI,1/2] drm/i915: Start chopping up the GPU error capture URL : https://patchwork.freedesktop.org/series/71838/ State : success == Summary == CI Bug Log - changes from CI_DRM_7714 -> Patchwork_16044 ===

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Bump up CDCLK to eliminate underruns on TGL (rev3)

2020-01-09 Thread Patchwork
== Series Details == Series: drm/i915: Bump up CDCLK to eliminate underruns on TGL (rev3) URL : https://patchwork.freedesktop.org/series/71760/ State : success == Summary == CI Bug Log - changes from CI_DRM_7714 -> Patchwork_16045 Summary -

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tgl: Add Wa_1409825376 to tgl (rev2)

2020-01-09 Thread Patchwork
== Series Details == Series: drm/i915/tgl: Add Wa_1409825376 to tgl (rev2) URL : https://patchwork.freedesktop.org/series/71853/ State : success == Summary == CI Bug Log - changes from CI_DRM_7714 -> Patchwork_16046 Summary --- **SUC

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Pin the context as we work on it (rev2)

2020-01-09 Thread Patchwork
== Series Details == Series: drm/i915: Pin the context as we work on it (rev2) URL : https://patchwork.freedesktop.org/series/71700/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7706_full -> Patchwork_16034_full Summary --

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: add Wa_14010594013: icl,ehl

2020-01-09 Thread Patchwork
== Series Details == Series: drm/i915: add Wa_14010594013: icl,ehl URL : https://patchwork.freedesktop.org/series/71858/ State : success == Summary == CI Bug Log - changes from CI_DRM_7714 -> Patchwork_16047 Summary --- **SUCCESS**

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [CI,1/3] drm/i915/gt: Push context state allocation earlier

2020-01-09 Thread Patchwork
== Series Details == Series: series starting with [CI,1/3] drm/i915/gt: Push context state allocation earlier URL : https://patchwork.freedesktop.org/series/71808/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7706_full -> Patchwork_16035_full

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