On Fri, 25 Oct 2019 21:03:12 +0200
Daniel Vetter wrote:
> On Fri, Oct 25, 2019 at 1:36 PM Thierry Reding
> wrote:
> >
> > On Thu, Oct 24, 2019 at 01:45:16PM -0700, Rajat Jain wrote:
> > > Hi,
> > >
> > > Thanks for your review and comments. Please see inline below.
> > >
> > > On Thu, Oct 24,
commit 'a7b4deeb02b9 ("drm/i915/cml: Add CML PCI IDS)'
introduced new PCI ID that CML support. But some PCI
IDs were removed from CML IDs in BSpec.
v2: remove some inaccurate descriptions.
v3: fix typo.
v4: add missing version number.
v5: no update.
v6: update patch comment.
Cc: Rodrigo Vivi
Cc:
U series device need different DDI buffer setup for eDP
and DP. If driver did not recognize ULT id proerply.
The setting for H and S series would be used.
v2: add missing comma in subplatform_ult_ids[].
v3: no update.
v4: no update.
v5: no update.
v6: no update.
Cc: Rodrigo Vivi
Cc: Jani Nikula
== Series Details ==
Series: drm/i915/execlists: Simply walk back along request timeline on reset
(rev3)
URL : https://patchwork.freedesktop.org/series/68601/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7193_full -> Patchwork_15004_full
=
Op 25-10-2019 om 12:13 schreef Ville Syrjälä:
> On Fri, Oct 25, 2019 at 11:00:06AM +0200, Maarten Lankhorst wrote:
>> Op 24-10-2019 om 17:21 schreef Ville Syrjälä:
>>> On Thu, Oct 24, 2019 at 02:47:59PM +0200, Maarten Lankhorst wrote:
Now that we separated everything into uapi and hw, it's
>>>
On Fri, 25 Oct 2019, Changbin Du wrote:
> On Fri, Oct 25, 2019 at 09:57:48AM +0300, Jani Nikula wrote:
>> On Thu, 24 Oct 2019, Jonathan Corbet wrote:
>> > On Sun, 20 Oct 2019 21:17:17 +0800
>> > Changbin Du wrote:
>> >
>> >> The 'functions' directive is not only for functions, but also works for
== Series Details ==
Series: series starting with [v6,2/2] drm/i915/cml: Separate U series pci id
from origianl list. (rev7)
URL : https://patchwork.freedesktop.org/series/68547/
State : failure
== Summary ==
Applying: drm/i915/cml: Separate U series pci id from origianl list.
error: sha1 inf
== Series Details ==
Series: drm/i915/rps: Flip interpretation of ips fmin/fmax to max rps
URL : https://patchwork.freedesktop.org/series/68604/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7193_full -> Patchwork_15005_full
Fixes: d9d54a530a70 ("drm/i915: Put future HW and their uAPIs under STAGING &
BROKEN")
Signed-off-by: kbuild test robot
---
rtl8712_xmit.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/staging/rtl8712/rtl8712_xmit.c
b/drivers/staging/rtl8712/rtl8712_x
Resend of [1]; I may have rebased but I'm not sure anymore...
For starters some fairly benign cleanup, and a proposal for new struct
drm_device based drm logging macros analoguous to core kernel struct
device based macros.
Please let's at least get the first 7 reviewed/acked/merged, shall we?
B
Allow better abstraction of the drm_debug global variable in the
future. No functional changes.
Reviewed-by: Eric Engestrom
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
drivers/gpu/drm/i915/i915_drv.c
Allow better abstraction of the drm_debug global variable in the
future. No functional changes.
v2: move unlikely() to drm_debug_enabled()
Cc: Ben Skeggs
Cc: nouv...@lists.freedesktop.org
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/nouveau/dispnv50/disp.h | 4 ++--
drivers/gpu/drm/nouveau/n
We don't want people calling the functions directly. No functional
changes.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_print.c | 8
include/drm/drm_print.h | 22 +++---
2 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/drm_prin
Add new struct drm_device based logging macros modeled after the core
kernel device based logging macros. These would be preferred over the
drm printk and struct device based macros in drm code, where possible.
We have existing drm specific struct device based logging functions, but
they are too v
In preparation for adding struct drm_device based logging, group the
existing functions by prink or struct device based logging. No
functional changes.
Signed-off-by: Jani Nikula
---
include/drm/drm_print.h | 135 ++--
1 file changed, 74 insertions(+), 61 dele
drm_debug_enabled() is the way to check. __drm_debug is now reserved for
drm print code only. No functional changes.
v2: Rebase on move unlikely() to drm_debug_enabled()
Acked-by: Alex Deucher
Reviewed-by: Eric Engestrom
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_print.c | 8
Allow better abstraction of the drm_debug global variable in the
future. No functional changes.
Cc: Alex Deucher
Cc: Christian König
Cc: David (ChunMing) Zhou
Cc: amd-...@lists.freedesktop.org
Acked-by: Alex Deucher
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c |
Mostly for improved documentation, convert the debug category macros
into an enum. Drop unused DRM_UT_NONE. Document previously undocumented
categories.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_print.c | 4 +-
include/drm/drm_print.h | 101 ++--
2
On Thu, Oct 24, 2019 at 04:34:16PM +0100, Chris Wilson wrote:
> igt_allow_hang() checks that the GPU can be reset before allowing the
> test to cause a GPU hang (which would need the reset to recover).
> However, our checking for allowing a hang depends on i915.reset which we
> later restore. Do th
For the HPD interrupt functionality the HW depends on power wells in the
display core domain to be on. Accordingly when enabling these power
wells the HPD polling logic will force an HPD detection cycle to account
for hotplug events that may have happened when such a power well was
off.
Thus a det
== Series Details ==
Series: drm/i915: Split memory_region initialisation into its own file (rev2)
URL : https://patchwork.freedesktop.org/series/68200/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7193_full -> Patchwork_15006_full
On Sun, 27 Oct 2019 at 14:36, Chris Wilson wrote:
>
> We need to verify that our blitter routines perform as expected, so
> measure it.
>
> Signed-off-by: Chris Wilson
> Cc: Matthew Auld
Reviewed-by: Matthew Auld
___
Intel-gfx mailing list
Intel-gfx@l
On Sun, 27 Oct 2019 at 22:58, Chris Wilson wrote:
>
> As we are inside the gt, we have a local gt->engine[] lookup we should
> be using in preference over the i915->engine[] copy.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Matthew Auld
___
Intel-gfx
On Sun, 27 Oct 2019 at 22:58, Chris Wilson wrote:
>
> Check all user accessible engines that can blit work with our blitter
> client.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Matthew Auld
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
h
We need to verify that our blitter routines perform as expected, so
measure it.
Signed-off-by: Chris Wilson
Cc: Matthew Auld
Reviewed-by: Matthew Auld
---
.../i915/gem/selftests/i915_gem_object_blt.c | 172 ++
1 file changed, 172 insertions(+)
diff --git a/drivers/gpu/drm/i91
From: Ville Syrjälä
Apparently the 128x128 and 256x256 ARGB cursor modes were
only added on LPT/CST.
While the display section of bspec isn't super clear on the
subject, it does highlight these two modes in a different
color, has a few changlog entries indicating the 256x256 mode
was added for a
From: Ville Syrjälä
Put the customary () around the macro argument in the overlay
colorkey macros. And while at switch to using a consistent
case for the hex constants.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_overlay.c | 8
1 file changed, 4 insertions(+),
From: Ville Syrjälä
As with the video sprites the colorkey is always specified
as 8bpc. For 10bpc primary plane formats we just ignore the
two lsbs of each component. For C8 we'll replicate the same
key to each chanel, which is what the hardware wants.
Signed-off-by: Ville Syrjälä
---
drivers/
From: Ville Syrjälä
Put the overlay color conversion unit into 10bit mode if the
pipe isn't using the 8bit legacy gamma. Not 100% sure this is
what the intention of the bit was but makes at least some sense to
me.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_overlay.c |
From: Ville Syrjälä
We pass the plane data through the pipe gamma for all the other
planes. Can't see why we should treat the overlay differently,
so let's enable pipe gamma for it as well.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_overlay.c | 2 ++
1 file changed, 2
From: Ville Syrjälä
The change from the uapi coordinates to the internal coordinates
broke the cursor on i845/i865 due to src and dst getting swapped.
Fix it.
Cc: Maarten Lankhorst
Fixes: 3a612765f423 ("drm/i915: Remove cursor use of properties for
coordinates")
Signed-off-by: Ville Syrjälä
-
On Sun, 27 Oct 2019 at 22:58, Chris Wilson wrote:
>
> Select a random user accessible engine for checking coherency results.
> While we should check all engines, we use a random selection so that
> over repeated runs we cover all.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Matthew Auld
___
On Fri, 25 Oct 2019, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/bios: add compression parameter block definition (rev2)
> URL : https://patchwork.freedesktop.org/series/68396/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_7169_full -> Patchwork_14961_
On Sun, 27 Oct 2019 at 22:58, Chris Wilson wrote:
>
> Use any blitter engine at random for prefilling the memory region.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Matthew Auld
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.
Hi Chris,
On Sun, Oct 27, 2019 at 05:55:05PM +, Chris Wilson wrote:
> Since the rps is tied to its intel_gt, use that backpointer to find the
> right engine rather than delving into i915.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Andi Shyti
Andi
On Sun, 27 Oct 2019 at 22:58, Chris Wilson wrote:
>
> Iterate over all user-accessible render engines when checking whether
> they can be adjusted for sseu.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Matthew Auld
___
Intel-gfx mailing list
Intel-gfx@
Quoting Chris Wilson (2019-10-26 11:22:20)
> The location of RING_MI_MODE (used to stop the ring across resets) moved
> for Tigerlake. Fixup the new location and include a selftest to verify
> the location in the default context image.
>
> Signed-off-by: Chris Wilson
> Cc: Mika Kuoppala
Reviewe
Quoting Chris Wilson (2019-10-27 17:03:13)
> As we use hard coded offsets for a few locations within the context
> image, include those in the selftests to assert that they are valid.
>
> Signed-off-by: Chris Wilson
> Cc: Mika Kuoppala
> +++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> @@ -3194
Quoting Joonas Lahtinen (2019-10-28 12:13:05)
> Quoting Chris Wilson (2019-10-27 17:03:13)
> > As we use hard coded offsets for a few locations within the context
> > image, include those in the selftests to assert that they are valid.
> >
> > Signed-off-by: Chris Wilson
> > Cc: Mika Kuoppala
>
As we use hard coded offsets for a few locations within the context
image, include those in the selftests to assert that they are valid.
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
Reviewed-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/gt/selftest_lrc.c | 27 +-
1 file
Quoting Chris Wilson (2019-10-27 13:13:09)
> The request's timeline will only contain requests from this context, in
> order of execution. Therefore, we can simply look back along this
> timeline to find the currently executing request.
>
> If we do find that the current context has completed its
The request's timeline will only contain requests from this context, in
order of execution. Therefore, we can simply look back along this
timeline to find the currently executing request.
If we do find that the current context has completed its last request,
that does not imply that all requests a
While processing CSB there is no need to look at GuC submission
settings, just check if engine is configured for execlists mode.
While today GuC submission is disabled it's settings are still
based on modparam values that might not correctly reflect actual
submission status in case of any fallback
Quoting paul...@kernel.org (2019-10-22 22:12:08)
> From: "Paul E. McKenney"
>
> This commit replaces the use of rcu_swap_protected() with the more
> intuitively appealing rcu_replace() as a step towards removing
> rcu_swap_protected().
>
> Link:
> https://lore.kernel.org/lkml/CAHk-=wiAsJLw1egFE
From: Ville Syrjälä
Add 8 and 30 to the list of supported screen depths. The colorkey
massaging will be handled by the kernel so we don't have to worry
about it unlike with the sprite colorkey uapi.
Signed-off-by: Ville Syrjälä
---
src/sna/sna_video_overlay.c | 2 ++
1 file changed, 2 insertio
Quoting Michal Wajdeczko (2019-10-28 12:57:03)
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.h
> b/drivers/gpu/drm/i915/gt/intel_lrc.h
> index 99dc576a4e25..23dde9083349 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.h
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.h
> @@ -145,4 +145,6 @@ struct i
Hi Michał,
On Monday, October 28, 2019 1:57:03 PM CET Michal Wajdeczko wrote:
> While processing CSB there is no need to look at GuC submission
> settings, just check if engine is configured for execlists mode.
>
> While today GuC submission is disabled it's settings are still
> based on modparam
== Series Details ==
Series: drm/i915/execlists: Simply walk back along request timeline on reset
(rev5)
URL : https://patchwork.freedesktop.org/series/68601/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7194_full -> Patchwork_15008_full
=
== Series Details ==
Series: drm/print: cleanup and new drm_device based logging (rev2)
URL : https://patchwork.freedesktop.org/series/67795/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
f2d563f17142 drm/i915: use drm_debug_enabled() to check for debug categories
528222fb93b9
== Series Details ==
Series: drm/print: cleanup and new drm_device based logging (rev2)
URL : https://patchwork.freedesktop.org/series/67795/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7201 -> Patchwork_15018
Summary
---
== Series Details ==
Series: drm/i915: Avoid HPD poll detect triggering a new detect cycle
URL : https://patchwork.freedesktop.org/series/68644/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
4e80a212b380 drm/i915: Avoid HPD poll detect triggering a new detect cycle
-:29: ERROR:
== Series Details ==
Series: drm/i915: Avoid HPD poll detect triggering a new detect cycle
URL : https://patchwork.freedesktop.org/series/68644/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7201 -> Patchwork_15019
Summary
Op 28-10-2019 om 12:30 schreef Ville Syrjala:
> From: Ville Syrjälä
>
> The change from the uapi coordinates to the internal coordinates
> broke the cursor on i845/i865 due to src and dst getting swapped.
> Fix it.
>
> Cc: Maarten Lankhorst
> Fixes: 3a612765f423 ("drm/i915: Remove cursor use of p
On Mon, 28 Oct 2019 14:09:05 +0100, Chris Wilson
wrote:
Quoting Michal Wajdeczko (2019-10-28 12:57:03)
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.h
b/drivers/gpu/drm/i915/gt/intel_lrc.h
index 99dc576a4e25..23dde9083349 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.h
+++ b/drivers/gpu/
Keep smatch quiet,
drivers/gpu/drm/i915//gem/selftests/i915_gem_context.c:1268 __igt_ctx_sseu()
error: uninitialized symbol 'ret'.
drivers/gpu/drm/i915//gem/selftests/i915_gem_context.c:1280 __igt_ctx_sseu()
error: uninitialized symbol 'ret'.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i9
smatch complains about
drivers/gpu/drm/i915//display/intel_display.c:14403
intel_set_dp_tp_ctl_normal() error: uninitialized symbol 'conn'.
because it has no way to determine that the loop must have an entry.
Tell the static analysers to ignore the local, it will always be set.
Signed-off-by: Chr
== Series Details ==
Series: drm/i915/selftests: Measure basic throughput of blit routines (rev2)
URL : https://patchwork.freedesktop.org/series/68610/
State : failure
== Summary ==
Applying: drm/i915/selftests: Measure basic throughput of blit routines
Using index info to reconstruct a base t
== Series Details ==
Series: series starting with [1/6] drm/i915: Fix i845/i865 cursor width
URL : https://patchwork.freedesktop.org/series/68646/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
4da018f49855 drm/i915: Fix i845/i865 cursor width
19cde21752fa drm/i915: Fix max curs
Chris Wilson writes:
> Keep smatch quiet,
>
> drivers/gpu/drm/i915//gem/selftests/i915_gem_context.c:1268 __igt_ctx_sseu()
> error: uninitialized symbol 'ret'.
> drivers/gpu/drm/i915//gem/selftests/i915_gem_context.c:1280 __igt_ctx_sseu()
> error: uninitialized symbol 'ret'.
>
> Signed-off-by:
On Fri, Oct 25, 2019 at 04:13:40PM -0700, Lucas De Marchi wrote:
> On Fri, Oct 25, 2019 at 04:06:21PM -0700, Matt Roper wrote:
> > TGL's extra ports also bring extra AUX channels.
> >
> > Signed-off-by: Matt Roper
> > ---
> > drivers/gpu/drm/i915/display/intel_bios.c | 6
> > drivers/gpu
Chris Wilson writes:
> smatch complains about
> drivers/gpu/drm/i915//display/intel_display.c:14403
> intel_set_dp_tp_ctl_normal() error: uninitialized symbol 'conn'.
> because it has no way to determine that the loop must have an entry.
> Tell the static analysers to ignore the local, it will a
Add execute queue and compressed pixel stream packet data types for
completeness.
Cc: Vandita Kulkarni
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_mipi_dsi.c | 2 ++
include/video/mipi_display.h | 2 ++
2 files changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/dri
The DCS command has been named SET_PARTIAL_ROWS in the DCS spec since
v1.02, for more than a decade. Rename the enumeration to match the spec.
v2: add comment about the rename (David Lechner)
Cc: David Lechner
Cc: Vandita Kulkarni
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/tiny/st7586.c |
Rename picture parameter set (it's a long packet, not a long write) and
compression mode (it's not a DCS command) enumerations according to the
DSI specification. Order the types according to the spec. Use tabs
instead of spaces for indentation. Use all lower case for hex.
Cc: Vandita Kulkarni
Re
Update from the DCS specification.
Cc: Vandita Kulkarni
Signed-off-by: Jani Nikula
---
include/video/mipi_display.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/include/video/mipi_display.h b/include/video/mipi_display.h
index 6b6390dfa203..928f8c4b6658 100644
--- a/include/v
Add helper functions for sending the DSI compression mode and picture
parameter set data type packets. For the time being, limit the support
to using VESA DSC 1.1 and the default PPS. This may need updating if the
need arises for proprietary compression or non-default PPS, however keep
it simple fo
== Series Details ==
Series: series starting with [1/6] drm/i915: Fix i845/i865 cursor width
URL : https://patchwork.freedesktop.org/series/68646/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7201 -> Patchwork_15021
Summar
On Mon, Oct 28, 2019 at 03:20:34PM +0100, Maarten Lankhorst wrote:
> Op 28-10-2019 om 12:30 schreef Ville Syrjala:
> > From: Ville Syrjälä
> >
> > The change from the uapi coordinates to the internal coordinates
> > broke the cursor on i845/i865 due to src and dst getting swapped.
> > Fix it.
> >
== Series Details ==
Series: drm/i915: Collect user engines at driver_register phase
URL : https://patchwork.freedesktop.org/series/68609/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7194_full -> Patchwork_15009_full
Summ
== Series Details ==
Series: drm/i915/selftests: Check a few more fixed locations within the context
image (rev2)
URL : https://patchwork.freedesktop.org/series/68611/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7201 -> Patchwork_15022
==
On Sat, Oct 26, 2019 at 08:01:35AM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/tgl: Handle AUX interrupts for TC ports (rev2)
> URL : https://patchwork.freedesktop.org/series/68528/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_7176_full -> Pa
On Mon, Oct 28, 2019 at 02:57:26PM +0200, Joonas Lahtinen wrote:
> Quoting paul...@kernel.org (2019-10-22 22:12:08)
> > From: "Paul E. McKenney"
> >
> > This commit replaces the use of rcu_swap_protected() with the more
> > intuitively appealing rcu_replace() as a step towards removing
> > rcu_sw
On Fri, Oct 25, 2019 at 4:36 AM Thierry Reding wrote:
>
> On Thu, Oct 24, 2019 at 01:45:16PM -0700, Rajat Jain wrote:
> > Hi,
> >
> > Thanks for your review and comments. Please see inline below.
> >
> > On Thu, Oct 24, 2019 at 4:20 AM Thierry Reding
> > wrote:
> > >
> > > On Tue, Oct 22, 2019 a
Quoting Michal Wajdeczko (2019-10-28 14:22:29)
> On Mon, 28 Oct 2019 14:09:05 +0100, Chris Wilson
> wrote:
>
> > Quoting Michal Wajdeczko (2019-10-28 12:57:03)
> >> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.h
> >> b/drivers/gpu/drm/i915/gt/intel_lrc.h
> >> index 99dc576a4e25..23dde908334
Some tests assume 4kB page size while using softpin. That assumption
may be wrong on future GEM backends with possibly larger minimum page
sizes. As a result, those tests may either fail on softpin at offsets
which are incorrectly aligned, may silently skip such incorrectly
aligned addresses assu
Some tests assume 4kB page size while using softpin. That assumption
may be wrong on future GEM backends with possibly larger minimum page
sizes. As a result, those tests may either fail on softpin at offsets
which are incorrectly aligned, may silently skip such incorrectly
aligned addresses assu
From: Janusz Krzysztofik
The basic-range subtest assumes 4kB page size while calculating softpin
offsets. On future backends with possibly larger minimum page sizes
a half of calculated offsets to be tested may be incorrectly detected
as occupied by other users and skiped, significantly distorin
Two tests - gem_exec_reloc and gem_softpin - define local helpers for
calculation of softpin offset canonical addresses. As more users are
expected, replace those local instances with a single shared one under
lib/.
Signed-off-by: Janusz Krzysztofik
Cc: Chris Wilson
---
lib/igt_x86.c
exec-shared-gtt-* subtests use hardcoded values for object size and
softpin offset, based on 4kB page size assumption. That may result in
those subtests failing when run on future backing stores with possibly
larger minimum page sizes.
Replace hardcoded constants with values derived from minimum
Op 28-10-2019 om 16:05 schreef Ville Syrjälä:
> On Mon, Oct 28, 2019 at 03:20:34PM +0100, Maarten Lankhorst wrote:
>> Op 28-10-2019 om 12:30 schreef Ville Syrjala:
>>> From: Ville Syrjälä
>>>
>>> The change from the uapi coordinates to the internal coordinates
>>> broke the cursor on i845/i865 due
== Series Details ==
Series: drm/i915/selftests: Check a few more fixed locations within the context
image
URL : https://patchwork.freedesktop.org/series/68611/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7194_full -> Patchwork_15011_full
===
There is nothing to say that the obj->base.size is actually a multiple
of the block_size.
Reported-by: Chris Wilson
Signed-off-by: Matthew Auld
Cc: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_object_blt.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gp
On Fri, 25 Oct 2019 at 22:06, Chris Wilson wrote:
>
> Currently we insert a arbitration point every 128MiB during a blitter
> copy. At 8GiB/s, this is around 30ms. This is a little on the large side
> if we need to inject a high priority work, so reduced it down to 8MiB or
> roughly 1ms.
>
> Signe
On Fri, Oct 25, 2019 at 04:06:22PM -0700, Matt Roper wrote:
> We're seeing some failures where an aux transaction still shows as
> 'busy' well after the timeout limit that the hardware is supposed to
> enforce. Improve the error message so that we can see exactly which aux
> channel this error hap
On 10/24/19 9:29 AM, don.hi...@intel.com wrote:
From: Don Hiatt
Check to see if GuC submission is enabled before requesting the
EXIT_S_STATE action.
You're only skipping the resume, but does it make any sense to do the
suspend action if we're not going to call the resume one? Does guc do
While processing CSB there is no need to look at GuC submission
settings, just check if engine is configured for execlists mode.
While today GuC submission is disabled it's settings are still
based on modparam values that might not correctly reflect actual
submission status in case of any fallback
On Mon, Oct 28, 2019 at 04:39:50PM +, Matthew Auld wrote:
> There is nothing to say that the obj->base.size is actually a multiple
> of the block_size.
>
> Reported-by: Chris Wilson
> Signed-off-by: Matthew Auld
> Cc: Chris Wilson
> ---
> drivers/gpu/drm/i915/gem/i915_gem_object_blt.c | 4
This is the minimum change to support 1 (and only 1) DP-MST monitor
connected on Tiger Lake. This change was isolated from previous patch
from José. In order to support more streams we will need to create a
master-slave relation on the transcoders and that is currently not
working yet.
Cc: José Ro
On Mon, Oct 28, 2019 at 12:38:22PM +0200, Jani Nikula wrote:
> Add new struct drm_device based logging macros modeled after the core
> kernel device based logging macros. These would be preferred over the
> drm printk and struct device based macros in drm code, where possible.
>
> We have existing
== Series Details ==
Series: drm/i915: Put future HW and their uAPIs under STAGING & BROKEN
URL : https://patchwork.freedesktop.org/series/68612/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7194_full -> Patchwork_15012_full
===
On Mon, 2019-10-28 at 10:04 -0700, Lucas De Marchi wrote:
> This is the minimum change to support 1 (and only 1) DP-MST monitor
> connected on Tiger Lake. This change was isolated from previous patch
> from José. In order to support more streams we will need to create a
> master-slave relation on t
On Mon, 28 Oct 2019 at 07:02, Imre Deak wrote:
>
> For the HPD interrupt functionality the HW depends on power wells in the
> display core domain to be on. Accordingly when enabling these power
> wells the HPD polling logic will force an HPD detection cycle to account
> for hotplug events that may
Quoting Ville Syrjälä (2019-10-28 16:46:46)
> On Mon, Oct 28, 2019 at 04:39:50PM +, Matthew Auld wrote:
> > There is nothing to say that the obj->base.size is actually a multiple
> > of the block_size.
> >
> > Reported-by: Chris Wilson
> > Signed-off-by: Matthew Auld
> > Cc: Chris Wilson
>
On Mon, Oct 28, 2019 at 01:00:31PM +0200, Imre Deak wrote:
> For the HPD interrupt functionality the HW depends on power wells in the
> display core domain to be on. Accordingly when enabling these power
> wells the HPD polling logic will force an HPD detection cycle to account
> for hotplug events
== Series Details ==
Series: sna/video/overlay: Declare support for depth 8 and 30
URL : https://patchwork.freedesktop.org/series/68655/
State : failure
== Summary ==
Applying: sna/video/overlay: Declare support for depth 8 and 30
error: sha1 information is lacking or useless (src/sna/sna_vide
== Series Details ==
Series: drm/i915/execlists: Simply walk back along request timeline on reset
(rev6)
URL : https://patchwork.freedesktop.org/series/68601/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7203 -> Patchwork_15023
===
== Series Details ==
Series: series starting with [1/2] drm/i915/selftests: Initialise ret
URL : https://patchwork.freedesktop.org/series/68662/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a204f00d5275 drm/i915/selftests: Initialise ret
-:8: WARNING:COMMIT_LOG_LONG_LINE: Poss
On Mon, Oct 28, 2019 at 10:04:57AM -0700, Lucas De Marchi wrote:
> This is the minimum change to support 1 (and only 1) DP-MST monitor
> connected on Tiger Lake. This change was isolated from previous patch
> from José. In order to support more streams we will need to create a
> master-slave relati
On Mon, Oct 28, 2019 at 07:45:09PM +0200, Ville Syrjälä wrote:
> On Mon, Oct 28, 2019 at 01:00:31PM +0200, Imre Deak wrote:
> > For the HPD interrupt functionality the HW depends on power wells in the
> > display core domain to be on. Accordingly when enabling these power
> > wells the HPD polling
For the HPD interrupt functionality the HW depends on power wells in the
display core domain to be on. Accordingly when enabling these power
wells the HPD polling logic will force an HPD detection cycle to account
for hotplug events that may have happened when such a power well was
off.
Thus a det
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