[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tgl: Adjust the location of RING_MI_MODE in the context image (rev2)

== Series Details == Series: drm/i915/tgl: Adjust the location of RING_MI_MODE in the context image (rev2) URL : https://patchwork.freedesktop.org/series/68591/ State : success == Summary == CI Bug Log - changes from CI_DRM_7191 -> Patchwork_14999 =

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/tgl: Handle AUX interrupts for TC ports (rev2)

== Series Details == Series: drm/i915/tgl: Handle AUX interrupts for TC ports (rev2) URL : https://patchwork.freedesktop.org/series/68528/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7176_full -> Patchwork_14972_full Summ

[Intel-gfx] [PATCH] drm/i915/tgl: Adjust the location of RING_MI_MODE in the context image

The location of RING_MI_MODE (used to stop the ring across resets) moved for Tigerlake. Fixup the new location and include a selftest to verify the location in the default context image. Signed-off-by: Chris Wilson Cc: Mika Kuoppala --- drivers/gpu/drm/i915/gt/intel_lrc.c| 20 +-- drive

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tgl: Adjust the location of RING_MI_MODE in the context image (rev3)

== Series Details == Series: drm/i915/tgl: Adjust the location of RING_MI_MODE in the context image (rev3) URL : https://patchwork.freedesktop.org/series/68591/ State : success == Summary == CI Bug Log - changes from CI_DRM_7191 -> Patchwork_15000 =

Re: [Intel-gfx] [PATCH 5/5] drm/i915/tgl: Add AUX B & C to DC_OFF_POWER_DOMAINS

On Fri, Oct 25, 2019 at 04:06:23PM -0700, Matt Roper wrote: > Our TGL CI platforms are running into cases where aux transactions have > failed to complete or declare a timeout well after the timeout limit > that the hardware is supposed to enforce. From the logs it appears that > these failures ar

[Intel-gfx] [CI] drm/i915/gem: Make context persistence optional

Our existing behaviour is to allow contexts and their GPU requests to persist past the point of closure until the requests are complete. This allows clients to operate in a 'fire-and-forget' manner where they can setup a rendering pipeline and hand it over to the display server and immediately exit

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/4] drm/i915: Add is_dgfx to device info

== Series Details == Series: series starting with [1/4] drm/i915: Add is_dgfx to device info URL : https://patchwork.freedesktop.org/series/68535/ State : success == Summary == CI Bug Log - changes from CI_DRM_7176_full -> Patchwork_14974_full ==

[Intel-gfx] [PATCH] drm/i915/execlists: Verify context register state before execution

Check that the context's ring register state still matches our expectations prior to execution. Signed-off-by: Chris Wilson Cc: Mika Kuoppala --- drivers/gpu/drm/i915/gt/intel_lrc.c | 70 - 1 file changed, 58 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/d

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gem: Make context persistence optional (rev2)

== Series Details == Series: drm/i915/gem: Make context persistence optional (rev2) URL : https://patchwork.freedesktop.org/series/68515/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7192 -> Patchwork_15001 Summary ---

[Intel-gfx] [PATCH] drm/i915/execlists: Skip over foreign requests on the context timeline

When searching for the last active request on our timeline, we only care about the requests matching the current context. (The context's timeline may have barrier entries from the kernel_context for example.) Just skip these foreign requests so we replay our own ring. Signed-off-by: Chris Wilson

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/execlists: Verify context register state before execution

== Series Details == Series: drm/i915/execlists: Verify context register state before execution URL : https://patchwork.freedesktop.org/series/68599/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7192 -> Patchwork_15002 Sum

Re: [Intel-gfx] [PATCH 1/2] drm/i915/uc: define GuC and HuC binaries for TGL

On Sat, 26 Oct 2019 02:35:06 +0200, Daniele Ceraolo Spurio wrote: GuC 35.2.0 and HuC 7.0.3 are the first production releases for TGL. GuC 35.2 for gen12 is interface-compatible with 33.0 on older gens, because the differences are related to additional blocks/commands in the interface to suppo

Re: [Intel-gfx] [PATCH] drm: Add support for integrated privacy screens

Hi Thierry, On Fri, 25 Oct 2019 at 12:36, Thierry Reding wrote: > On Thu, Oct 24, 2019 at 01:45:16PM -0700, Rajat Jain wrote: > > I did think about having a state variable in software to get and set > > this. However, I think it is not very far fetched that some platforms > > may have "hardware k

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Skip over foreign requests on the context timeline

== Series Details == Series: drm/i915/execlists: Skip over foreign requests on the context timeline URL : https://patchwork.freedesktop.org/series/68600/ State : success == Summary == CI Bug Log - changes from CI_DRM_7192 -> Patchwork_15003

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [CI,1/2] drm/i915: Extract GT render power state management

== Series Details == Series: series starting with [CI,1/2] drm/i915: Extract GT render power state management URL : https://patchwork.freedesktop.org/series/68541/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7178_full -> Patchwork_14975_full

Re: [Intel-gfx] [PATCH] drm/i915/tgl: Adjust the location of RING_MI_MODE in the context image

On Sat, Oct 26, 2019 at 07:17:36AM +0100, Chris Wilson wrote: > The location of RING_MI_MODE (used to stop the ring across resets) moved > for Tigerlake. Fixup the new location and include a selftest to verify > the location in the default context image. > > Signed-off-by: Chris Wilson > Cc: Mika

Re: [Intel-gfx] [PATCH] drm: Add support for integrated privacy screens

On Sat, Oct 26, 2019 at 1:07 PM Daniel Stone wrote: > > Hi Thierry, > > On Fri, 25 Oct 2019 at 12:36, Thierry Reding wrote: > > On Thu, Oct 24, 2019 at 01:45:16PM -0700, Rajat Jain wrote: > > > I did think about having a state variable in software to get and set > > > this. However, I think it is

Re: [Intel-gfx] [PATCH i-g-t] lib/i915: Use explicit iterator names in for_each_engine()

Hi Chris, I thought we wanted to keep the warnings as a reminder until we removed the legacy foreach :) [...] > diff --git a/lib/igt_gt.h b/lib/igt_gt.h > index 73b5002a0..66088d391 100644 > --- a/lib/igt_gt.h > +++ b/lib/igt_gt.h > @@ -72,19 +72,21 @@ extern const struct intel_execution_engine

Re: [Intel-gfx] [PATCH i-g-t] i915/pm_rps: Wait for the actual frequency to settle

Hi Chris, On Fri, Oct 25, 2019 at 10:49:19PM +0100, Chris Wilson wrote: > Check the actual frequency, and not just the current requested, before > delaying the system stable. > > Signed-off-by: Chris Wilson > Cc: Andi Shyti Reviewed-by: Andi Shyti Thanks, Andi ___

Re: [Intel-gfx] [PATCH i-g-t] lib/i915: Use explicit iterator names in for_each_engine()

Quoting Andi Shyti (2019-10-26 18:39:23) > Hi Chris, > > I thought we wanted to keep the warnings as a reminder until we > removed the legacy foreach :) > > [...] > > > diff --git a/lib/igt_gt.h b/lib/igt_gt.h > > index 73b5002a0..66088d391 100644 > > --- a/lib/igt_gt.h > > +++ b/lib/igt_gt.h >

[Intel-gfx] [PATCH] drm/i915/execlists: Simply walk back along request timeline on reset

The request's timeline will only contain requests from this context, in order of execution. Therefore, we can simply look back along this timeline to find the currently executing request. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_lrc.c | 12 +--- 1 file changed, 5 ins

[Intel-gfx] [PATCH] drm/i915/execlists: Simply walk back along request timeline on reset

The request's timeline will only contain requests from this context, in order of execution. Therefore, we can simply look back along this timeline to find the currently executing request. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_lrc.c | 11 +++ 1 file changed, 3 inse

[Intel-gfx] [PATCH] drm/i915/execlists: Simply walk back along request timeline on reset

The request's timeline will only contain requests from this context, in order of execution. Therefore, we can simply look back along this timeline to find the currently executing request. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_lrc.c | 10 ++ 1 file changed, 2 inser

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Move intel_engine_context_in/out into intel_lrc.c

== Series Details == Series: drm/i915: Move intel_engine_context_in/out into intel_lrc.c URL : https://patchwork.freedesktop.org/series/68553/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7181_full -> Patchwork_14977_full

[Intel-gfx] [PATCH i-g-t 2/2] i915/gem_ctx_exec: Enable resets for basic-nohangcheck

Wrap the test inside igt_allow_hang as we depend upon a fast reset to cancel the hostile context. Signed-off-by: Chris Wilson --- tests/i915/gem_ctx_exec.c | 4 1 file changed, 4 insertions(+) diff --git a/tests/i915/gem_ctx_exec.c b/tests/i915/gem_ctx_exec.c index b552edfbd..6b0092250 100

[Intel-gfx] [PATCH i-g-t 1/2] lib: Restore i915.reset before testing it in igt_allow_hang()

igt_allow_hang() checks that the GPU can be reset before allowing the test to cause a GPU hang (which would need the reset to recover). However, our checking for allowing a hang depends on i915.reset which we later restore. Do that restoration before the check so that this test is not affected by e

[Intel-gfx] [PATCH] drm/i915/rps: Flip interpretation of ips fmin/fmax to max rps

ips uses clock delays as opposed to rps frequency bins. To fit the delays into the same rps calculations, we need to invert the ips delays. Fixes: 3e7abf814193 ("drm/i915: Extract GT render power state management") Signed-off-by: Chris Wilson Cc: Andi Shyti --- drivers/gpu/drm/i915/gt/intel_rps

[Intel-gfx] [CI] drm/i915: Split memory_region initialisation into its own file

Pull the memory region bookkeeping into its file. Let's start clean and see how long it lasts! Signed-off-by: Chris Wilson Cc: Matthew Auld Reviewed-by: Matthew Auld --- drivers/gpu/drm/i915/i915_drv.c | 15 - drivers/gpu/drm/i915/i915_drv.h | 3 - drivers/gpu/

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Simply walk back along request timeline on reset (rev3)

== Series Details == Series: drm/i915/execlists: Simply walk back along request timeline on reset (rev3) URL : https://patchwork.freedesktop.org/series/68601/ State : success == Summary == CI Bug Log - changes from CI_DRM_7193 -> Patchwork_15004 ===

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/rps: Flip interpretation of ips fmin/fmax to max rps

== Series Details == Series: drm/i915/rps: Flip interpretation of ips fmin/fmax to max rps URL : https://patchwork.freedesktop.org/series/68604/ State : success == Summary == CI Bug Log - changes from CI_DRM_7193 -> Patchwork_15005 Summary

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/selftests: Tweak the default subtest runtime

== Series Details == Series: drm/i915/selftests: Tweak the default subtest runtime URL : https://patchwork.freedesktop.org/series/68554/ State : success == Summary == CI Bug Log - changes from CI_DRM_7182_full -> Patchwork_14978_full Summar

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Split memory_region initialisation into its own file (rev2)

== Series Details == Series: drm/i915: Split memory_region initialisation into its own file (rev2) URL : https://patchwork.freedesktop.org/series/68200/ State : success == Summary == CI Bug Log - changes from CI_DRM_7193 -> Patchwork_15006

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/7] drm/i915: support creating LMEM objects (rev2)

== Series Details == Series: series starting with [CI,1/7] drm/i915: support creating LMEM objects (rev2) URL : https://patchwork.freedesktop.org/series/68502/ State : success == Summary == CI Bug Log - changes from CI_DRM_7186_full -> Patchwork_14980_full