== Series Details ==
Series: series starting with [1/2] drm/i915: Encapsulate kconfig constant
values inside boolean predicates
URL : https://patchwork.freedesktop.org/series/68569/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7187 -> Patchwork_14986
Hi,
On 21-10-2019 16:39, Ville Syrjälä wrote:
On Sun, Oct 20, 2019 at 08:19:33PM +0200, Hans de Goede wrote:
Since commit 051a6d8d3ca0 ("drm/i915: Move LUT programming to happen after
vblank waits"), I am seeing an ugly colored flash of the first few display
lines on 2 Cherry Trail devices when
== Series Details ==
Series: Per client engine busyness (all aboard the sysfs train!)
URL : https://patchwork.freedesktop.org/series/68570/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
c5f5abc9d897 drm/i915: Track per-context engine busyness
2c3edc69e7b6 drm/i915: Expose list
== Series Details ==
Series: Per client engine busyness (all aboard the sysfs train!)
URL : https://patchwork.freedesktop.org/series/68570/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7187 -> Patchwork_14987
Summary
-
== Series Details ==
Series: series starting with [CI,1/7] drm/i915: support creating LMEM objects
URL : https://patchwork.freedesktop.org/series/68575/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
f5c5fa5a5f44 drm/i915: support creating LMEM objects
-:36: WARNING:FILE_PATH_CH
Currently we insert a arbitration point every 128MiB during a blitter
copy. At 8GiB/s, this is around 30ms. This is a little on the large side
if we need to inject a high priority work, so reduced it down to 8MiB or
roughly 1ms.
Signed-off-by: Chris Wilson
Cc: Matthew Auld
---
Ok, I need to do a
Check the actual frequency, and not just the current requested, before
delaying the system stable.
Signed-off-by: Chris Wilson
Cc: Andi Shyti
---
tests/i915/i915_pm_rps.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/tests/i915/i915_pm_rps.c b/tests/i915/i915_pm_rps.
== Series Details ==
Series: drm/i915/pmu: Initialise the spinlock before registering
URL : https://patchwork.freedesktop.org/series/68576/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7188 -> Patchwork_14989
Summary
-
Add helper macros for range and equality comparisons and use them to
check with whitelisted registers in oa configurations.
Signed-off-by: Umesh Nerlige Ramappa
Reviewed-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_perf.c | 54 +---
1 file changed, 28 insertio
^ 2 typos on the subject...
On Sat, Oct 26, 2019 at 04:25:54AM +0800, Lee Shawn C wrote:
> U series device need different DDI buffer setup for eDP
> and DP. If driver did not recognize ULT id proerply.
> The setting for H and S series would be used.
>
> v2 : add missing comma in subplatform_ult_
== Series Details ==
Series: series starting with [CI,1/7] drm/i915: support creating LMEM objects
URL : https://patchwork.freedesktop.org/series/68575/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: drm/i915: support creating LMEM objects
Okay!
Commi
Quoting Jason Ekstrand (2019-10-25 19:22:04)
> On Thu, Oct 24, 2019 at 6:40 AM Chris Wilson wrote:
>
> Our existing behaviour is to allow contexts and their GPU requests to
> persist past the point of closure until the requests are complete. This
> allows clients to operate in a 'fire
== Series Details ==
Series: series starting with [CI,1/7] drm/i915: support creating LMEM objects
URL : https://patchwork.freedesktop.org/series/68575/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7187 -> Patchwork_14988
On Fri, Oct 25, 2019 at 09:23:47PM +0200, Hans de Goede wrote:
> Hi,
>
> On 21-10-2019 16:39, Ville Syrjälä wrote:
> > On Sun, Oct 20, 2019 at 08:19:33PM +0200, Hans de Goede wrote:
> >> Since commit 051a6d8d3ca0 ("drm/i915: Move LUT programming to happen after
> >> vblank waits"), I am seeing an
From: Lionel Landwerlin
The design of the OA unit has been split into several units. We now
have a global unit (OAG) and a render specific unit (OAR). This leads
to some changes on how we program things. Some details :
OAR:
- has its own set of counter registers, they are per-context
saved
On Thu, Oct 24, 2019 at 03:06:37PM +, Harry Wentland wrote:
> On 2019-10-23 8:00 p.m., Manasi Navare wrote:
> > Adaptive Sync is a VESA feature so add a DRM core helper to parse
> > the EDID's detailed descritors to obtain the adaptive sync monitor range.
> > Store this info as part fo drm_disp
== Series Details ==
Series: drm/i915: Allow gen11 to use over 32k long strides (rev2)
URL : https://patchwork.freedesktop.org/series/67077/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7173_full -> Patchwork_14964_full
Su
On Mon, Oct 21, 2019 at 03:34:08PM -0700, Jose Souza wrote:
This sequence was recently added to fix internal HW sequences to
reset TC ports.
HSDES: 1507287614
HSDES: 14010071447
BSpec: 49292
Cc: Lucas De Marchi
Signed-off-by: José Roberto de Souza
Reviewed-by: Lucas De Marchi
Lucas De Marc
On Tue, 2019-10-22 at 08:46 +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/tc: Clear DKL_TX_PMD_LANE_SUS before program voltage
> swing
> URL : https://patchwork.freedesktop.org/series/68349/
> State : success
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_7144_ful
We're currently only processing AUX interrupts on the combo ports; make
sure we handle the TC ports as well.
v2: Drop stale comment
Fixes: f663769a5eef ("drm/i915/tgl: initialize TC and TBT ports")
Cc: José Roberto de Souza
Cc: Lucas De Marchi
Signed-off-by: Matt Roper
Reviewed-by: José Robert
The first patch here has already been submitted and reviewed, but is
still waiting on CI results to be merged. The hope is that the final
patch in this series will solve the TGL forever-busy AUX transactions
described in https://bugs.freedesktop.org/show_bug.cgi?id=105128.
Cc: José Roberto de Sou
Our TGL CI platforms are running into cases where aux transactions have
failed to complete or declare a timeout well after the timeout limit
that the hardware is supposed to enforce. From the logs it appears that
these failures arise when aux transactions happen after we've entered
DC6. On TGL AU
TGL's extra ports also bring extra AUX channels.
Signed-off-by: Matt Roper
---
drivers/gpu/drm/i915/display/intel_bios.c | 6
drivers/gpu/drm/i915/display/intel_display.c | 36 +--
drivers/gpu/drm/i915/display/intel_display.h | 2 ++
drivers/gpu/drm/i915/display/inte
We reference DP AUX registers via the DP_AUX_CH_CTL() and
DP_AUX_CH_DATA() macros that calculate all the register offsets for us
automatically; there's no need to explicitly define every offset in
i915_reg.h if they're never going to be used by the driver code.
Signed-off-by: Matt Roper
---
driv
We're seeing some failures where an aux transaction still shows as
'busy' well after the timeout limit that the hardware is supposed to
enforce. Improve the error message so that we can see exactly which aux
channel this error happened on and what the status bits were during this
case that isn't s
On Fri, Oct 25, 2019 at 04:06:20PM -0700, Matt Roper wrote:
We reference DP AUX registers via the DP_AUX_CH_CTL() and
DP_AUX_CH_DATA() macros that calculate all the register offsets for us
automatically; there's no need to explicitly define every offset in
i915_reg.h if they're never going to be
On Fri, Oct 25, 2019 at 04:06:19PM -0700, Matt Roper wrote:
We're currently only processing AUX interrupts on the combo ports; make
sure we handle the TC ports as well.
v2: Drop stale comment
Fixes: f663769a5eef ("drm/i915/tgl: initialize TC and TBT ports")
Cc: José Roberto de Souza
Cc: Lucas
On Fri, Oct 25, 2019 at 04:06:21PM -0700, Matt Roper wrote:
TGL's extra ports also bring extra AUX channels.
Signed-off-by: Matt Roper
---
drivers/gpu/drm/i915/display/intel_bios.c | 6
drivers/gpu/drm/i915/display/intel_display.c | 36 +--
drivers/gpu/drm/i915/display/
== Series Details ==
Series: series starting with [1/2] drm/i915: Remove nonpriv flags when srm/lrm
(rev2)
URL : https://patchwork.freedesktop.org/series/68506/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7173_full -> Patchwork_14965_full
===
On Fri, Oct 25, 2019 at 04:06:22PM -0700, Matt Roper wrote:
We're seeing some failures where an aux transaction still shows as
'busy' well after the timeout limit that the hardware is supposed to
enforce. Improve the error message so that we can see exactly which aux
channel this error happened
On Fri, Oct 25, 2019 at 04:19:33PM -0700, Lucas De Marchi wrote:
> On Fri, Oct 25, 2019 at 04:06:22PM -0700, Matt Roper wrote:
> > We're seeing some failures where an aux transaction still shows as
> > 'busy' well after the timeout limit that the hardware is supposed to
> > enforce. Improve the er
On Fri, Oct 25, 2019 at 04:06:23PM -0700, Matt Roper wrote:
Our TGL CI platforms are running into cases where aux transactions have
failed to complete or declare a timeout well after the timeout limit
that the hardware is supposed to enforce. From the logs it appears that
it's a good idea to c
The location of RING_MI_MODE (used to stop the ring across resets) moved
for Tigerlake. Fixup the new location and include a selftest to verify
the location in the default context image.
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/intel_lrc.c| 18 +--
drive
On Fri, Oct 25, 2019 at 04:25:47PM -0700, Matt Roper wrote:
On Fri, Oct 25, 2019 at 04:19:33PM -0700, Lucas De Marchi wrote:
On Fri, Oct 25, 2019 at 04:06:22PM -0700, Matt Roper wrote:
> We're seeing some failures where an aux transaction still shows as
> 'busy' well after the timeout limit that
== Series Details ==
Series: drm/i915/selftests/blt: add some kthreads into the mix (rev2)
URL : https://patchwork.freedesktop.org/series/68563/
State : failure
== Summary ==
Applying: drm/i915/selftests/blt: add some kthreads into the mix
Using index info to reconstruct a base tree...
M
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/perf: Add helper macros for
comparing with whitelisted registers
URL : https://patchwork.freedesktop.org/series/68582/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
d9a93528ebbd drm/i915/perf: Add helper macro
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/perf: Add helper macros for
comparing with whitelisted registers
URL : https://patchwork.freedesktop.org/series/68582/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: drm/i915/perf: Ad
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/perf: Add helper macros for
comparing with whitelisted registers
URL : https://patchwork.freedesktop.org/series/68582/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7191 -> Patchwork_14991
===
The following changes since commit 340e06eb4b57da0cbceb25faf7b526263b3e3dfa:
linux-firmware: Add firmware file for Intel Bluetooth AX201 (2019-10-25
08:26:16 -0400)
are available in the Git repository at:
git://anongit.freedesktop.org/drm/drm-firmware ehl_tgl_uc
for you to fetch changes up
The next patches are going to touch this registers so here already
fixing it for older registers and make it consistent with most of
the other registers in this file.
Cc: Ramalingam C
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i915_reg.h | 18 +-
1 file change
HDCP could be fused off, so not all GEN9+ platforms will support it.
Cc: Ville Syrjälä
Cc: Martin Peres
Reviewed-by: Ramalingam C
Reviewed-by: Ville Syrjälä
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_hdcp.c | 2 +-
drivers/gpu/drm/i915/i915_pci.c |
Check if FBC is fused off and handle it.
Cc: Ville Syrjälä
Cc: Martin Peres
Reviewed-by: Ramalingam C
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_device_info.c | 3 +++
2 files changed, 4 insertions(+)
diff --git a/drive
Check if DMC is fused off and handle it.
Cc: Ville Syrjälä
Cc: Martin Peres
Reviewed-by: Ramalingam C
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_device_info.c | 3 +++
2 files changed, 4 insertions(+)
diff --git a/drive
DSC could be fused off, so not all GEN10+ platforms will support it.
Cc: Manasi Navare
Cc: Martin Peres
Reviewed-by: Ramalingam C
Reviewed-by: Manasi Navare
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_dp.c | 3 +++
drivers/gpu/drm/i915/i915_pci.c | 1
From: Anusha Srivatsa
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/i915_params.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_params.h
b/drivers/gpu/drm/i915/i915_params.h
index 56058978bb27..99d5ed597495 100644
--- a/drivers/gpu/drm/
GuC 35.2.0 and HuC 7.0.3 are the first production releases for TGL.
GuC 35.2 for gen12 is interface-compatible with 33.0 on older gens,
because the differences are related to additional blocks/commands in
the interface to support new Gen12 features. These parts of the
interface will be added when t
== Series Details ==
Series: DP AUX updates
URL : https://patchwork.freedesktop.org/series/68590/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
DESCEND objtool
CHK include/generated/compile.h
CC [M] drivers/gpu/drm/i915/gvt
== Series Details ==
Series: drm/i915/gem: Limit the blitter sizes to ensure low preemption latency
URL : https://patchwork.freedesktop.org/series/68584/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7191 -> Patchwork_14992
== Series Details ==
Series: drm/i915/tgl: Adjust the location of RING_MI_MODE in the context image
URL : https://patchwork.freedesktop.org/series/68591/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7191 -> Patchwork_14994
== Series Details ==
Series: drm/i915/gem: Make context persistence optional
URL : https://patchwork.freedesktop.org/series/68515/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7174_full -> Patchwork_14966_full
Summary
== Series Details ==
Series: series starting with [1/5] drm/i915: Add two spaces before the SKL_DFSM
registers
URL : https://patchwork.freedesktop.org/series/68594/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7191 -> Patchwork_14995
=
== Series Details ==
Series: series starting with [1/2] drm/i915/uc: define GuC and HuC binaries for
TGL
URL : https://patchwork.freedesktop.org/series/68595/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
9463715f8da8 drm/i915/uc: define GuC and HuC binaries for TGL
2501337dfc
== Series Details ==
Series: series starting with [1/2] drm/i915/uc: define GuC and HuC binaries for
TGL
URL : https://patchwork.freedesktop.org/series/68595/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7191 -> Patchwork_14996
===
== Series Details ==
Series: series starting with [1/3] drm/i915: Use _PICK() for CHICKEN_TRANS()
URL : https://patchwork.freedesktop.org/series/68517/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7174_full -> Patchwork_14967_full
=
On Fri, Oct 25, 2019 at 02:59:42PM +0100, Chris Wilson wrote:
> Avoid angering clang and smatch by using a constant value in a '&&' test,
> by forcing that constant value into a boolean.
>
> E.g.,
> drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c:159:13: warning: use of
> logical '&&' with const
== Series Details ==
Series: drm/i915/selftests: Mock the engine sorting for easy validation
URL : https://patchwork.freedesktop.org/series/68521/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7175_full -> Patchwork_14970_full
==
We reference DP AUX registers via the DP_AUX_CH_CTL() and
DP_AUX_CH_DATA() macros that calculate all the register offsets for us
automatically; there's no need to explicitly define every offset in
i915_reg.h if they're never going to be used by the driver code.
v2: Apparently GVT was directly usin
== Series Details ==
Series: DP AUX updates (rev2)
URL : https://patchwork.freedesktop.org/series/68590/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
1fb885c67a37 drm/i915/tgl: Handle AUX interrupts for TC ports
81a9ba208d76 drm/i915: Drop unused AUX register offsets
-:48: CHE
== Series Details ==
Series: drm/i914/guc: Fix resume on platforms w/o GuC submission but enabled
URL : https://patchwork.freedesktop.org/series/68526/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7175_full -> Patchwork_14971_full
=
== Series Details ==
Series: DP AUX updates (rev2)
URL : https://patchwork.freedesktop.org/series/68590/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7191 -> Patchwork_14997
Summary
---
**FAILURE**
Serious unknow
The location of RING_MI_MODE (used to stop the ring across resets) moved
for Tigerlake. Fixup the new location and include a selftest to verify
the location in the default context image.
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/intel_lrc.c| 18 +--
drive
== Series Details ==
Series: DP AUX updates (rev3)
URL : https://patchwork.freedesktop.org/series/68590/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
e8d35bb35f25 drm/i915/tgl: Handle AUX interrupts for TC ports
8902f9c59666 drm/i915: Drop unused AUX register offsets
-:48: CHE
== Series Details ==
Series: DP AUX updates (rev3)
URL : https://patchwork.freedesktop.org/series/68590/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7191 -> Patchwork_14998
Summary
---
**SUCCESS**
No regressions
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