Not every device naturally supports snooping and userptr, so be prepared
for the initial probe to fail.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111910
Signed-off-by: Chris Wilson
---
tests/i915/gem_userptr_blits.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff
We are still hitting the occasional stall upon submission, so be extra
caution and leave one more spare.
Signed-off-by: Chris Wilson
---
lib/i915/gem_ring.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/lib/i915/gem_ring.c b/lib/i915/gem_ring.c
index 272264659..9f099edf
This is really just an alias of mmap_gtt. Add a new CPU mmap
implementation that allows multiple fault handlers that depends on
the object's backing pages.
Note that we multiplex mmap_gtt and mmap_offset through the same ioctl,
and use the zero extending behaviour of drm to differentiate between
t
Fault handler to handle missing pages for shmem-backed objects.
Signed-off-by: Abdiel Janulgue
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
---
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 125 ++-
1 file changed, 100 insertions(+), 25 deletions(-)
diff --git a/drivers/gp
From: Daniele Ceraolo Spurio
The following patches in the series will use it to avoid certain
operations when aperture is not available in HW.
Signed-off-by: Daniele Ceraolo Spurio
Cc: Matthew Auld
---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drive
If there is no aperture we can't use map_gtt to map dumb buffers, so we
need a cpu-map based path to do it. We prefer map_gtt on platforms that
do have aperture.
Signed-off-by: Abdiel Janulgue
Cc: Daniele Ceraolo Spurio
Cc: Tvrtko Ursulin
Cc: Matthew Auld
---
drivers/gpu/drm/i915/gem/i915_gem
Have i915 replace the core drm_gem_mmap implementation to overcome its
limitation in having only a single mmap offset node per gem object.
This change allows us to have multiple mmap offsets per object and
enables a mmapping instance to use unique fault-handlers per user vma.
This allows i915 to s
== Series Details ==
Series: series starting with [v2,5/5] drm/i915: Add cpu fault handler for
mmap_offset (rev5)
URL : https://patchwork.freedesktop.org/series/65793/
State : failure
== Summary ==
Applying: drm/i915: Add cpu fault handler for mmap_offset
error: sha1 information is lacking or
On Mon, 07 Oct 2019, "Lee, Shawn C" wrote:
> On Fri, 04 Oct 2019, Jani Nikula wrote:
>>On Fri, 04 Oct 2019, Adam Jackson wrote:
>>> On Sat, 2019-10-05 at 05:58 +0800, Lee Shawn C wrote:
This panel (manufacturer is SDC, product ID is 0x4141) used
manufacturer defined DPCD register to c
From: Daniele Ceraolo Spurio
The following patches in the series will use it to avoid certain
operations when aperture is not available in HW.
Signed-off-by: Daniele Ceraolo Spurio
Cc: Matthew Auld
---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drive
Fault handler to handle missing pages for shmem-backed objects.
Signed-off-by: Abdiel Janulgue
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
---
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 125 ++-
1 file changed, 100 insertions(+), 25 deletions(-)
diff --git a/drivers/gp
If there is no aperture we can't use map_gtt to map dumb buffers, so we
need a cpu-map based path to do it. We prefer map_gtt on platforms that
do have aperture.
Signed-off-by: Abdiel Janulgue
Cc: Daniele Ceraolo Spurio
Cc: Tvrtko Ursulin
Cc: Matthew Auld
---
drivers/gpu/drm/i915/gem/i915_gem
This is really just an alias of mmap_gtt. Add a new CPU mmap
implementation that allows multiple fault handlers that depends on
the object's backing pages.
Note that we multiplex mmap_gtt and mmap_offset through the same ioctl,
and use the zero extending behaviour of drm to differentiate between
t
Have i915 replace the core drm_gem_mmap implementation to overcome its
limitation in having only a single mmap offset node per gem object.
This change allows us to have multiple mmap offsets per object and
enables a mmapping instance to use unique fault-handlers per user vma.
This allows i915 to s
== Series Details ==
Series: series starting with [v2,1/5] drm/i915: Allow i915 to manage the vma
offset nodes instead of drm core
URL : https://patchwork.freedesktop.org/series/67674/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
60a6a58e3c4f drm/i915: Allow i915 to manage th
Since writing the comment that the scheduler is entirely passive, we've
added minimal timeslicing which adds the most primitive of active
elements (a timeout and reschedule).
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
Cc: Ramalingam C
---
drivers/gpu/drm/i915/i915_scheduler_types.h | 9 +++
On Mon, 07 Oct 2019, "Jani Nikula" wrote:
>On Mon, 07 Oct 2019, "Lee, Shawn C" wrote:
>> On Fri, 04 Oct 2019, Jani Nikula wrote:
>>>On Fri, 04 Oct 2019, Adam Jackson wrote:
On Sat, 2019-10-05 at 05:58 +0800, Lee Shawn C wrote:
> This panel (manufacturer is SDC, product ID is 0x4141) u
On Mon, 07 Oct 2019, "Jani Nikula"
mailto:jani.nik...@intel.com>> wrote:
>On Mon, 07 Oct 2019, "Lee, Shawn C"
>mailto:shawn.c@intel.com>> wrote:
>> On Fri, 04 Oct 2019, Jani Nikula
>> mailto:jani.nik...@intel.com>> wrote:
>>>On Fri, 04 Oct 2019, Adam Jackson mailto:a...@redhat.com>>
>>>wro
Quoting Abdiel Janulgue (2019-10-07 10:19:16)
> @@ -312,6 +313,12 @@ vm_fault_t i915_gem_fault(struct vm_fault *vmf)
> list_add(&obj->userfault_link, &i915->ggtt.userfault_list);
> mutex_unlock(&i915->ggtt.vm.mutex);
>
> + /* Track the mmo associated with the fenced
== Series Details ==
Series: series starting with [v2,1/5] drm/i915: Allow i915 to manage the vma
offset nodes instead of drm core
URL : https://patchwork.freedesktop.org/series/67674/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7021 -> Patchwork_14684
=
Adding following definition to i915_reg.h
1. DC_STATE_EN register DC3CO bit fields and masks.
DC3CO enable bit will be used by driver to make DC3CO
ready for DMC f/w and status bit will be used as DC3CO
entry status.
2. Transcoder EXITLINE register and its bit fields and mask.
Transcode
Quoting Abdiel Janulgue (2019-10-07 10:19:18)
> +static int gem_mmap_offset(struct drm_device *dev, void *data,
> + struct drm_file *file)
> +{
> + struct drm_i915_gem_mmap_offset *args = data;
> + enum i915_mmap_type type;
> +
> + if ((args->flags & (I915
Quoting Abdiel Janulgue (2019-10-07 10:19:18)
> enum i915_mmap_type {
> I915_MMAP_TYPE_GTT = 0,
> + I915_MMAP_TYPE_OFFSET_WC,
> + I915_MMAP_TYPE_OFFSET_WB,
> + I915_MMAP_TYPE_OFFSET_UC,
_OFFSET_ is worse than redundant.
-Chris
Quoting Abdiel Janulgue (2019-10-07 10:19:18)
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index cc70aba6ac26..9182da57182b 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -2696,7 +2696,7 @@ static const struct drm_io
Quoting Abdiel Janulgue (2019-10-07 10:19:18)
> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> index 30c542144016..bc85656ab7fd 100644
> --- a/include/uapi/drm/i915_drm.h
> +++ b/include/uapi/drm/i915_drm.h
> @@ -359,6 +359,7 @@ typedef struct _drm_i915_sarea {
> #define
Quoting Abdiel Janulgue (2019-10-07 10:19:19)
> +int
> +i915_gem_mmap_dumb(struct drm_file *file,
> + struct drm_device *dev,
> + u32 handle,
> + u64 *offset)
> +{
> + struct drm_i915_private *i915 = dev->dev_private;
What?!
-Chris
Quoting Abdiel Janulgue (2019-10-07 10:19:20)
> +static vm_fault_t i915_gem_fault_cpu(struct vm_fault *vmf)
> +{
> + struct vm_area_struct *area = vmf->vma;
> + struct i915_mmap_offset *priv = area->vm_private_data;
> + struct drm_i915_gem_object *obj = priv->obj;
> + vm_fau
On Fri, Oct 04, 2019 at 02:51:34PM -0700, James Ausmus wrote:
> On Fri, Oct 04, 2019 at 01:55:46PM -0700, Lucas De Marchi wrote:
> > On Fri, Sep 27, 2019 at 03:24:27PM -0700, James Ausmus wrote:
> > >Starting from TGL, we now need to read the SAGV block time via a PCODE
> > >mailbox, rather than ha
== Series Details ==
Series: drm/i915: Note the addition of timeslicing to the pretend scheduler
URL : https://patchwork.freedesktop.org/series/67675/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7021 -> Patchwork_14685
Su
Quoting Abdiel Janulgue (2019-10-07 10:19:20)
> +static vm_fault_t i915_gem_fault_cpu(struct vm_fault *vmf)
> +{
> + struct vm_area_struct *area = vmf->vma;
> + struct i915_mmap_offset *priv = area->vm_private_data;
> + struct drm_i915_gem_object *obj = priv->obj;
> + vm_fau
== Series Details ==
Series: DC3CO Support for TGL test with DC3CO IGT (rev2)
URL : https://patchwork.freedesktop.org/series/67525/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7021 -> Patchwork_14686
Summary
---
**
Hello Daniele,
On Fri, Sep 27, 2019 at 02:42:41PM -0700, Daniele Ceraolo Spurio wrote:
> To better organize the information, add a microcontrollers section and
> move/link the GuC, HuC and DMC documentation under it. Also add a small
> intro.
>
> Signed-off-by: Daniele Ceraolo Spurio
> Cc: Micha
On 2019-10-07 at 10:46:35 +, Patchwork wrote:
> == Series Details ==
>
> Series: DC3CO Support for TGL test with DC3CO IGT (rev2)
> URL : https://patchwork.freedesktop.org/series/67525/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_7021 -> Patchwork_14686
> =
Exercise the first level of suspend, S0. This is basically the same as
our runtime-suspend, we need to put the device to sleep but otherwise
it is left powered up.
Ideally, we would measure the energy consumption in this state.
References: https://bugs.freedesktop.org/show_bug.cgi?id=111909
Signe
== Series Details ==
Series: series starting with [v2,1/5] drm/i915: Allow i915 to manage the vma
offset nodes instead of drm core
URL : https://patchwork.freedesktop.org/series/67674/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7021_full -> Patchwork_14684_full
===
Hello Daniele,
On Fri, Sep 27, 2019 at 02:42:42PM -0700, Daniele Ceraolo Spurio wrote:
> Add a short description of what we expect from GuC and some minor
> improvements to existing documentation. Also remove a comment about a
> difference between GuC and HuC that is not true anymore.
>
> Signed
On Wed, 02 Oct 2019, Matt Roper wrote:
> The latest documented version of the VBT is 229, but no further data has
> been added to the child device definition in block 2. Update the child
> device version test to eliminate the "Expected child device config size
> for VBT version XXX not known; ass
On Fri, 04 Oct 2019, Jonathan Neuschäfer wrote:
> On Thu, Oct 03, 2019 at 06:45:56PM -, Patchwork wrote:
>> == Series Details ==
>>
>> Series: drm/i915: Add Sphinx-compatible references to struct fields
>> URL : https://patchwork.freedesktop.org/series/67550/
>> State : failure
>>
>> == Su
Hello Daniele,
On Fri, Sep 27, 2019 at 02:42:43PM -0700, Daniele Ceraolo Spurio wrote:
> Better explain the usage of the microcontroller and what i915 is
> responsible of. While at it, fix the documentation for the auth
> function, which doesn't do any pinning anymore.
>
> Signed-off-by: Daniele
On Fri, 04 Oct 2019, Krzysztof Kozlowski wrote:
> drivers/gpu/drm/i915/Kconfig | 12 +-
> drivers/gpu/drm/i915/Kconfig.debug | 144 +++
Please split these out to a separate patch. Can't speak for others, but
the patch looks like it'll be conflicts galore and
From: Ville Syrjälä
Put the vblank timestamping constants update loop into its own
function. It has no business living inside
drm_atomic_helper_update_legacy_modeset_state() so we'll be wanting
to move it out entirely. As a first step we'll still call it
from drm_atomic_helper_update_legacy_modes
From: Ville Syrjälä
The timestamping constants have nothing to do with any legacy state
so should not be updated from
drm_atomic_helper_update_legacy_modeset_state().
Let's make everyone call drm_atomic_helper_calc_timestamping_constants()
directly instead of relying on
drm_atomic_helper_update_
From: Ville Syrjälä
Once we do the hw vs. uapi split we can no longer use
drm_atomic_helper_calc_timestamping_constants() as it'll
consult the uapi state instead of the hw state.
So let's just update the vblank timestamping constants whenever
we update the scanline offset. We use both to convert
On 06/10/2019 17:49, Chris Wilson wrote:
Lost in the rebasing was Tvrtko's reminder that we need to keep an
uninterruptible wait around for the Ironlake VT-d w/a
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_gt_requests.c | 2 +-
1 file changed, 1 inserti
Use the local uncore accessors for the GT rather than using the [not-so]
magic global dev_priv mmio routines. In the process, we also teach the
perf stream to use backpointers to the i915_perf rather than digging it
out of dev_priv.
Signed-off-by: Chris Wilson
Cc: Umesh Nerlige Ramappa
Cc: Lione
Anshuman, I have addressed below failures and updated filters for Bug 111872 .
Lakshmi.
-Original Message-
From: Gupta, Anshuman
Sent: Monday, October 7, 2019 2:02 PM
To: intel-gfx@lists.freedesktop.org; Vudum, Lakshminarayana
Cc: Deak, Imre
Subject: Re: ✗ Fi.CI.BAT: failure for DC3CO
On 07/10/2019 16:03, Chris Wilson wrote:
Use the local uncore accessors for the GT rather than using the [not-so]
magic global dev_priv mmio routines. In the process, we also teach the
perf stream to use backpointers to the i915_perf rather than digging it
out of dev_priv.
Signed-off-by: Chris W
Quoting Lionel Landwerlin (2019-10-07 14:33:02)
> On 07/10/2019 16:03, Chris Wilson wrote:
> > Use the local uncore accessors for the GT rather than using the [not-so]
> > magic global dev_priv mmio routines. In the process, we also teach the
> > perf stream to use backpointers to the i915_perf rat
The BKL struct_mutex is no more, the only serialisation we required for
setting the exclusive stream is already managed by ce->pin_mutex in
gen8_configure_all_contexts(). As such, we can manipulate
i915_perf.exclusive_stream underneath our own perf->lock.
Signed-off-by: Chris Wilson
Cc: Umesh Ner
6fe7864acc33f0c62bd9d866b722:
drm/i915: Update DRIVER_DATE to 20191007 (2019-10-07 15:24:47 +0300)
UAPI Changes:
- Never allow userptr into the mappable GGTT (Chris)
No existing users. Avoid anyone from even trying to
spare a d
On 07/10/2019 16:36, Chris Wilson wrote:
Quoting Lionel Landwerlin (2019-10-07 14:33:02)
On 07/10/2019 16:03, Chris Wilson wrote:
Use the local uncore accessors for the GT rather than using the [not-so]
magic global dev_priv mmio routines. In the process, we also teach the
perf stream to use ba
On 07/10/2019 16:38, Chris Wilson wrote:
The BKL struct_mutex is no more, the only serialisation we required for
setting the exclusive stream is already managed by ce->pin_mutex in
gen8_configure_all_contexts(). As such, we can manipulate
i915_perf.exclusive_stream underneath our own perf->lock.
The BKL struct_mutex is no more, the only serialisation we required for
setting the exclusive stream is already managed by ce->pin_mutex in
gen8_configure_all_contexts(). As such, we can manipulate
i915_perf.exclusive_stream underneath our own perf->lock.
Signed-off-by: Chris Wilson
Cc: Umesh Ner
Use the local uncore accessors for the GT rather than using the [not-so]
magic global dev_priv mmio routines. In the process, we also teach the
perf stream to use backpointers to the i915_perf rather than digging it
out of dev_priv.
v2: Rebase onto i915_perf_types.h
Signed-off-by: Chris Wilson
C
On Thu, Oct 3, 2019 at 9:26 AM Maxime Ripard wrote:
>
> Hi,
>
> On Wed, Oct 02, 2019 at 10:06:04PM +0200, Maxime Ripard wrote:
> > Hi Dave, Daniel,
> >
> > I hope that you enjoy XDC if you could make it this year :)
> >
> > Here's the first round of fixes for drm-misc
> >
> > Maxime
> >
> > drm-mi
== Series Details ==
Series: series starting with [1/3] drm/atomic-helper: Extract
drm_atomic_helper_calc_timestamping_constants()
URL : https://patchwork.freedesktop.org/series/67681/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7023 -> Patchwork_14687
=
== Series Details ==
Series: drm/i915/perf: Wean ourselves off dev_priv
URL : https://patchwork.freedesktop.org/series/67686/
State : failure
== Summary ==
Applying: drm/i915/perf: Wean ourselves off dev_priv
error: sha1 information is lacking or useless (drivers/gpu/drm/i915/i915_drv.h).
erro
== Series Details ==
Series: drm/i915/perf: Set the exclusive stream under perf->lock
URL : https://patchwork.freedesktop.org/series/67687/
State : failure
== Summary ==
Applying: drm/i915/perf: Set the exclusive stream under perf->lock
error: sha1 information is lacking or useless
(drivers/g
Another attempt at trying to cleanup the probe/remove wrt
display. TL;DR: It's a mess.
I'm trying to chop up the intel_modeset_*() functions in intel_display.c
to smaller pieces, and eventually remove the extra
i915_driver_modeset_*() layer from i915_drv.c.
The intermediate steps aren't the prett
Prefer i915 over dev_priv where possible. No functional changes.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.c | 42 -
1 file changed, 21 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.
Move vga switcheroo and dsm handler register later in
i915_driver_register(), and unregister in i915_driver_unregister(). The
dsm handler unregister is a nop, and is only added for completeness.
My unsubstantiated suspicion is that the vga switcheroo state change
would not work as early as we regi
Split intel_modeset_driver_remove() to two, the part with working irqs
before irq uninstall, and the part after irq uninstall. Move
irq_unintall() closer to the layer it belongs.
The error path in i915_driver_modeset_probe() looks obviously weird
after this, but remains as good or broken as it eve
Pair the irq install and uninstall in the same layer. There are no
functional changes in the happy day scenario. The cleanup paths are
currently a mess though.
Note that modeset probe pre-irq + post-irq install are matched by
modeset driver remove pre-irq + post-irq uninstall, together, but not
in
== Series Details ==
Series: series starting with [CI,1/2] drm/i915/perf: Wean ourselves off dev_priv
URL : https://patchwork.freedesktop.org/series/67689/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
c449e123f41b drm/i915/perf: Wean ourselves off dev_priv
-:415: WARNING:AVOID
Move intel_power_domains_init_hw() call one level higher, to be on the
same level as all the other intel_power_domains_*() calls in the
probe/remove paths.
This also moves the power domain hw init earlier in the sequence, along
with the dependent intel_update_rawclk() call. As far as I can tell
th
With the intel_display_* prove/remove functions clarified, we can
continue with moving more related calls to the right layer:
- drm_vblank_init()
- intel_bios_init() and intel_bios_driver_remove()
- intel_vga_register() and intel_vga_unregister()
- intel_csr_ucode_init() and intel_csr_ucode_fini()
Push irq uninstall further up, by splitting i915_driver_modeset_remove()
to two, the part with working irqs before irq uninstall, and the part
after irq uninstall. No functional changes.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.c | 11 +--
1 file changed, 9 insertions
Split inte_modeset_init() to parts before and after irq install, to
facilitate further cleanup. The error paths are a mess, otherwise no
functional changes.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 17 +
drivers/gpu/drm/i915/display/intel_disp
Makes more sense, facilitates further cleanup.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 6 ++
drivers/gpu/drm/i915/i915_drv.c | 6 --
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_displa
Turn current intel_modeset_init() to a pre-gem init function, and add a
new intel_modeset_init() function and move all post-gem modeset init
there, in the correct layer. Again, apart from possible failure paths,
no functional changes.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/i
The i915_driver_modeset_*() functions have become irrelevant, and the
extra layer can be removed.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.c | 76 +
1 file changed, 19 insertions(+), 57 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c
== Series Details ==
Series: DC3CO Support for TGL test with DC3CO IGT (rev2)
URL : https://patchwork.freedesktop.org/series/67525/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7021 -> Patchwork_14686
Summary
---
**
Quoting Jani Nikula (2019-10-07 16:09:36)
> The i915_driver_modeset_*() functions have become irrelevant, and the
> extra layer can be removed.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/i915_drv.c | 76 +
> 1 file changed, 19 insertions(+), 57 de
== Series Details ==
Series: series starting with [CI,1/2] drm/i915/perf: Wean ourselves off dev_priv
URL : https://patchwork.freedesktop.org/series/67689/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7024 -> Patchwork_14690
===
== Series Details ==
Series: drm/i915: modeset probe/remove cleanup
URL : https://patchwork.freedesktop.org/series/67691/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
4f485ace7f46 drm/i915: register vga switcheroo later, unregister earlier
4cea63d24b5c drm/i915: switch i915_dr
From: Colin Ian King
Don't populate the array hw_engine_mask on the stack but instead make it
static. Makes the object code smaller by 316 bytes.
Before:
textdata bss dec hex filename
340044388 320 387129738 gpu/drm/i915/gt/intel_reset.o
After:
textdata
Avoid going to the base i915 device when we already have a path from gt
to the runtime powermanagement interface. The benefit is that it looks a
bit more self-consistent to always be acquiring the gt->uncore->rpm for
use with the gt->uncore.
Signed-off-by: Chris Wilson
Cc: Daniele Ceraolo Spurio
On 07/10/2019 16:45, Chris Wilson wrote:
Avoid going to the base i915 device when we already have a path from gt
to the runtime powermanagement interface. The benefit is that it looks a
bit more self-consistent to always be acquiring the gt->uncore->rpm for
use with the gt->uncore.
Signed-off-b
On Mon, Oct 7, 2019 at 7:39 AM Jani Nikula wrote:
>
> On Fri, 04 Oct 2019, Krzysztof Kozlowski wrote:
> > drivers/gpu/drm/i915/Kconfig | 12 +-
> > drivers/gpu/drm/i915/Kconfig.debug | 144 +++
>
> Please split these out to a separate patch. Can't speak for
On 04/10/2019 20:47, Chris Wilson wrote:
As we may signal a request and take the engine->active.lock within the
signaler, the engine submission paths have to use a nested annotation on
their requests -- but we guarantee that we can never submit on the same
engine as the signaling fence.
<4>[ 7
On 04/10/2019 21:31, Chris Wilson wrote:
Disable irqs around updating the context image to keep lockdep happy:
<4>[ 673.483340] WARNING: possible irq lock inversion dependency detected
<4>[ 673.483342] 5.4.0-rc1-CI-Trybot_5118+ #1 Tainted: G U
<4>[ 673.483342] ---
Quoting Colin King (2019-10-07 16:41:51)
> From: Colin Ian King
>
> Don't populate the array hw_engine_mask on the stack but instead make it
> static. Makes the object code smaller by 316 bytes.
>
> Before:
>textdata bss dec hex filename
> 340044388 320 387129
== Series Details ==
Series: drm/i915: modeset probe/remove cleanup
URL : https://patchwork.freedesktop.org/series/67691/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7024 -> Patchwork_14691
Summary
---
**FAILURE**
== Series Details ==
Series: drm/i915/gt: Prefer local path to runtime powermanagement
URL : https://patchwork.freedesktop.org/series/67696/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: drm/i915/gt: Prefer local path to runtime powermanagement
-O:dri
== Series Details ==
Series: drm/i915: make array hw_engine_mask static, makes object smaller
URL : https://patchwork.freedesktop.org/series/67694/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7024 -> Patchwork_14692
Summa
To provide shared last-level-cache isolation to cpu workloads running
concurrently with gpu workloads, the gpu allocation of cache lines needs
to be restricted to certain ways. Currently GPU hardware supports four
class-of-service(CLOS) levels and there is an associated way-mask for
each CLOS. Each
For GEN11 MOCS are part of context register state. This means updating
CLOS also needs to update the context state of active contexts.
v3: Rebase
v2: Updated the interface to use two sysfs files(Joonas)
- Gen12 PCode interface is not ready yet to read the way mask.
So removed TGL support
On Wed, Sep 25, 2019 at 03:58:30PM -0700, Derek Basehore wrote:
> This adds a helper function for reading the rotation (panel
> orientation) from the device tree.
>
> Signed-off-by: Derek Basehore
> Reviewed-by: Sam Ravnborg
The patch LGTM, but I don't see it used anywhere later in the patch? I
On Mon, Sep 30, 2019 at 04:14:54PM -0700, dbasehore . wrote:
> On Sat, Sep 28, 2019 at 10:23 PM james qian wang (Arm Technology
> China) wrote:
> >
> > On Wed, Sep 25, 2019 at 03:58:31PM -0700, Derek Basehore wrote:
> > > Devicetree systems can set panel orientation via a panel binding, but
> > >
On Wed, Sep 25, 2019 at 03:58:32PM -0700, Derek Basehore wrote:
> Not every platform needs quirk detection for panel orientation, so
> split the drm_connector_init_panel_orientation_property into two
> functions. One for platforms without the need for quirks, and the
> other for platforms that need
== Series Details ==
Series: drm/i915/gt: Prefer local path to runtime powermanagement
URL : https://patchwork.freedesktop.org/series/67696/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7024 -> Patchwork_14693
Summary
On Wed, Sep 25, 2019 at 03:58:33PM -0700, Derek Basehore wrote:
> This inits the panel orientation property for the mediatek dsi driver
> if the panel orientation (connector.display_info.panel_orientation) is
> not DRM_MODE_PANEL_ORIENTATION_UNKNOWN.
>
> Signed-off-by: Derek Basehore
> Acked-by:
== Series Details ==
Series: Add sysfs interface to control class-of-service
URL : https://patchwork.freedesktop.org/series/67700/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: drm/i915/ehl: Add sysfs interface to control class-of-service
+drivers/gpu
On 07/10/2019 08:37, Chris Wilson wrote:
Not every device naturally supports snooping and userptr, so be prepared
for the initial probe to fail.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111910
Signed-off-by: Chris Wilson
---
tests/i915/gem_userptr_blits.c | 7 +--
1 file c
> -Original Message-
> From: Intel-gfx On Behalf Of Abdiel
> Janulgue
> Sent: Monday, October 7, 2019 2:19 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Auld, Matthew
> Subject: [Intel-gfx] [PATCH v2 3/5] drm/i915: Introduce
> DRM_I915_GEM_MMAP_OFFSET
>
> This is really just an alias of
On 07/10/2019 09:27, Chris Wilson wrote:
We are still hitting the occasional stall upon submission, so be extra
caution and leave one more spare.
Signed-off-by: Chris Wilson
---
lib/i915/gem_ring.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/lib/i915/gem_ring.c b
== Series Details ==
Series: series starting with [1/3] drm/atomic-helper: Extract
drm_atomic_helper_calc_timestamping_constants()
URL : https://patchwork.freedesktop.org/series/67681/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7023_full -> Patchwork_14687_full
===
On 05/10/2019 11:55, Chris Wilson wrote:
The forced-reset itself should be immediate; it's just the wait after
the health check where we appear to have issues!
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
tests/i915/gem_eio.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
On 05/10/2019 09:15, Chris Wilson wrote:
Rather than do a fixed amount of work that takes *forever*, run for a
fixed amount of time.
Signed-off-by: Chris Wilson
---
tests/i915/gem_softpin.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/tests/i915/gem_softpin.c b/
On 06/10/2019 17:49, Chris Wilson wrote:
If we cannot claim the timeline->mutex while preparing for a wait on it,
we have to skip the timeline. In doing so, treat it as active so that
under a intel_gt_wait_for_idle() loop, we repeat the wait after
scheduling away.
Signed-off-by: Chris Wilson
C
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