Why sleep when you can busywait for an interrupt? Throw out the old irq
handlers, and use irq_poll instead.
References: https://bugs.freedesktop.org/show_bug.cgi?id=111880
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/Kconfig | 1 +
drivers/gpu/drm/i915
Why sleep when you can busywait for an interrupt? Throw out the old irq
handlers, and use irq_poll instead.
References: https://bugs.freedesktop.org/show_bug.cgi?id=111880
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/Kconfig | 1 +
drivers/gpu/drm/i915
== Series Details ==
Series: TGL HAX drm/i915/tgl: Interrupts are overrated (rev4)
URL : https://patchwork.freedesktop.org/series/67558/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
9b1dcf587b4b TGL HAX drm/i915/tgl: Interrupts are overrated
-:190: ERROR:COMPLEX_MACRO: Macros
Why sleep when you can busywait for an interrupt? Throw out the old irq
handlers, and use irq_poll instead.
References: https://bugs.freedesktop.org/show_bug.cgi?id=111880
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/Kconfig | 1 +
drivers/gpu/drm/i915
== Series Details ==
Series: TGL HAX drm/i915/tgl: Interrupts are overrated (rev4)
URL : https://patchwork.freedesktop.org/series/67558/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7001 -> Patchwork_14661
Summary
---
== Series Details ==
Series: TGL HAX drm/i915/tgl: Interrupts are overrated (rev5)
URL : https://patchwork.freedesktop.org/series/67558/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
25e18100cd25 TGL HAX drm/i915/tgl: Interrupts are overrated
-:209: ERROR:COMPLEX_MACRO: Macros
Quoting Stimson, Dale B (2019-10-04 00:26:24)
> > On Wed, Oct 02, 2019 at 12:26:48PM +0100, Chris Wilson wrote:
> > > There's very little variation in non-privileged registers for Tigerlake,
> > > so we can mostly inherit the set from gen11. There is no whitelist at
> > > present, so we do not need
Why sleep when you can busywait for an interrupt? Throw out the old irq
handlers, and use irq_poll instead.
References: https://bugs.freedesktop.org/show_bug.cgi?id=111880
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/Kconfig | 1 +
drivers/gpu/drm/i915
On 03/10/2019 22:00, Chris Wilson wrote:
Make dma_fence_enable_sw_signaling() behave like its
dma_fence_add_callback() and dma_fence_default_wait() counterparts and
perform the test to enable signaling under the fence->lock, along with
the action to do so. This ensure that should an implementati
On 03/10/2019 22:00, Chris Wilson wrote:
In preparation for rearranging the booleans into a flags field, ensure
all the current users are using the inline helpers and not directly
accessing the members.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/drm_mm.c | 19 ++
Moved common code to check gamma_enable to specific funcs per platform
in bit_precision func. icl doesn't support that and chv has separate
enable knob for CGM LUT.
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 23 +-
1 file changed, 18 insertio
Premature gamma lut prepration and loading which was getting
reflected in first modeset causing different colors on
screen during boot.
Issue: In BIOS, gamma is disabled by default. However, legacy read_luts()
was setting crtc_state->base.gamma_lut and gamma_lut was programmed
with junk values whi
In this patch series, basically added 3 patches
1. Fixing broken state-checker during boot since legacy platforms
i.e. platforms for which state checker was already enabled
2. Moving gamma_enable checks in bit_precision func() to platform
specific func()
3. Enabling state checker for ICL
For icl+, have hw read out to create hw blob of gamma
lut values. icl+ platforms supports multi segmented gamma
mode by default, add hw lut creation for this mode.
This will be used to validate gamma programming using dsb
(display state buffer) which is a tgl specific feature.
Major change done-r
Only to print hw and sw lut values/channel.
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b/drivers/gpu/drm/i915/display/intel_color.c
index 168e9daae3de..2b8706dba746 1
On 03/10/2019 22:00, Chris Wilson wrote:
A straightforward conversion of assignment and checking of the boolean
state flags (allocated, scanned) into non-atomic bitops. The caller
remains responsible for all locking around the drm_mm and its nodes.
Signed-off-by: Chris Wilson
---
drivers/gpu
Why sleep when you can busywait for an interrupt? Throw out the old irq
handlers, and use irq_poll instead.
References: https://bugs.freedesktop.org/show_bug.cgi?id=111880
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/Kconfig | 1 +
drivers/gpu/drm/i915
On Tue, Oct 01, 2019 at 11:07:39AM +0300, Jani Nikula wrote:
> The kernel has plenty of ternary operators to choose between constant
> strings, such as condition ? "yes" : "no", as well as value == 1 ? "" :
> "s":
>
> $ git grep '? "yes" : "no"' | wc -l
> 258
> $ git grep '? "on" : "off"' | wc -l
On 03/10/2019 22:01, Chris Wilson wrote:
A few callers need to serialise the destruction of their drm_mm_node and
ensure it is removed from the drm_mm before freeing. However, to be
completely sure that any access from another thread is complete before
we free the struct, we require the RELEASE
== Series Details ==
Series: fix broken state checker and enable state checker for icl+
URL : https://patchwork.freedesktop.org/series/67586/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a31640d6d4c0 drm/i915/color: fix broken gamma state-checker during boot
-:18: ERROR:GIT_CO
== Series Details ==
Series: TGL HAX drm/i915/tgl: Interrupts are overrated (rev7)
URL : https://patchwork.freedesktop.org/series/67558/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
cbf4264ef04e TGL HAX drm/i915/tgl: Interrupts are overrated
-:244: ERROR:COMPLEX_MACRO: Macros
On 03/10/2019 22:00, Chris Wilson wrote:
If we unwind the active requests, and on resubmission discover that we
intend to preempt the active context with itself, simply skip the ELSP
submission.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 17 -
1 fi
Make dma_fence_enable_sw_signaling() behave like its
dma_fence_add_callback() and dma_fence_default_wait() counterparts and
perform the test to enable signaling under the fence->lock, along with
the action to do so. This ensure that should an implementation be trying
to flush the cb_list (by signal
On 04/10/2019 11:11, Chris Wilson wrote:
Make dma_fence_enable_sw_signaling() behave like its
dma_fence_add_callback() and dma_fence_default_wait() counterparts and
perform the test to enable signaling under the fence->lock, along with
the action to do so. This ensure that should an implementati
== Series Details ==
Series: TGL HAX drm/i915/tgl: Interrupts are overrated (rev5)
URL : https://patchwork.freedesktop.org/series/67558/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7001 -> Patchwork_14662
Summary
---
== Series Details ==
Series: series starting with [1/5] drm/i915/execlists: Skip redundant
resubmission (rev2)
URL : https://patchwork.freedesktop.org/series/67566/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
6adbc5589cd8 drm/i915/execlists: Skip redundant resubmission
d1690
On 03/10/2019 15:20, Chris Wilson wrote:
Keep track of the GEM contexts underneath i915->gem.contexts and assign
them their own lock for the purposes of list management.
v2: Focus on lock tracking; ctx->vm is protected by ctx->mutex
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
Another
On Thu, Oct 03, 2019 at 09:55:22PM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/tgl: Add the Thunderbolt PLL divider values (rev3)
> URL : https://patchwork.freedesktop.org/series/67498/
> State : success
Thanks for the review, pushed to -dinq.
>
> == Summary ==
>
> CI
The L3 cache remapping is stored as u32 elements, and we should ensure
that the user only supplies complete slice information(u32).
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_sysfs.c | 57 ---
1 file changed, 29 insertions(+), 28 del
Quoting Tvrtko Ursulin (2019-10-04 10:15:20)
>
> On 03/10/2019 22:01, Chris Wilson wrote:
> > A few callers need to serialise the destruction of their drm_mm_node and
> > ensure it is removed from the drm_mm before freeing. However, to be
> > completely sure that any access from another thread is
On 04/10/2019 11:59, Chris Wilson wrote:
The L3 cache remapping is stored as u32 elements, and we should ensure
that the user only supplies complete slice information(u32).
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_sysfs.c | 57
== Series Details ==
Series: fix broken state checker and enable state checker for icl+
URL : https://patchwork.freedesktop.org/series/67586/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7003 -> Patchwork_14663
Summary
---
Quoting Chris Wilson (2019-10-04 12:07:10)
> Quoting Tvrtko Ursulin (2019-10-04 10:15:20)
> >
> > On 03/10/2019 22:01, Chris Wilson wrote:
> > > A few callers need to serialise the destruction of their drm_mm_node and
> > > ensure it is removed from the drm_mm before freeing. However, to be
> > >
== Series Details ==
Series: drm: Add getfb2 ioctl
URL : https://patchwork.freedesktop.org/series/67553/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7000_full -> Patchwork_14656_full
Summary
---
**FAILURE**
Seri
== Series Details ==
Series: TGL HAX drm/i915/tgl: Interrupts are overrated (rev7)
URL : https://patchwork.freedesktop.org/series/67558/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7003 -> Patchwork_14664
Summary
---
== Series Details ==
Series: LMEM basics (rev2)
URL : https://patchwork.freedesktop.org/series/67350/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7000_full -> Patchwork_14658_full
Summary
---
**FAILURE**
Serious
When the clock is higher than the dotclock, try with 2 pipes enabled.
If we can enable 2, then we will go into big joiner mode, and steal
the adjacent crtc.
This only links the crtc's in software, no hardware or plane
programming is done yet. Blobs are also copied from the master's
crtc_state, so
Instead of looking at drm_plane_state, look at intel_plane_state directly.
This will allow us to make the watermarks bigjoiner aware, when we make it
work for bigjoiner slave pipes as well.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/display/intel_display.h | 8 +++
drivers/gpu/d
We have a src and dect rectangle, use it instead of relying on
the core drm properties.
This removes the special case in the watermark code for cursor w/h.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/display/intel_display.c | 57 +++
drivers/gpu/drm/i915/intel_pm.c
Using for_each_intel_plane_mask() fails because of an extra bracket,
remove the bracket so we can use it in the next commit.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/display/intel_display.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/
From: Ville Syrjälä
We need to insert stuff between the plane and crtc .atomic_check()
drm_atomic_helper_check_planes() doesn't allow us to do that so
stop using it and hand roll the loops instead.
Signed-off-by: Ville Syrjälä
Reviewed-by: Stanislav Lisovskiy
Signed-off-by: Maarten Lankhorst
Small changes to intel_dp_mode_valid(), allow listing modes that
can only be supported in the bigjoiner configuration, which is
not supported yet.
eDP does not support bigjoiner, so do not expose bigjoiner only
modes on the eDP port.
Changes since v1:
- Disallow bigjoiner on eDP.
Signed-off-by:
The first approach centered on ensuring that bigjoiner had a separate
master_plane_state and slave_plane_state, this complicated the code
too much.
The new approach performs the same uapi and hw split as I did for
crtc_state, and allows bigjoiner to work with very small modifications
in comparison
Splitting plane state is easier than splitting crtc_state,
before plane check we copy the drm properties to hw so we can
do the same in bigjoiner later on.
We copy the state after we did all the modeset handling, but fortunately
i915 seems to be split correctly and nothing during modeset looks
at
Make sure that when a plane is set in a bigjoiner mode, we will add
their counterpart to the atomic state as well. This will allow us to
make sure all state is available when planes are checked.
Because of the funny interactions with bigjoiner and planar YUV
formats, we may end up adding a lot of
Make vdsc work when no output is enabled. The big joiner needs VDSC
on the slave, so enable it and set the appropriate bits.
Also update timestamping constants, because slave crtc's are not
updated in drm_atomic_helper_update_legacy_modeset_state().
This should be enough to bring up CRTC's in a bi
Signed-off-by: Maarten Lankhorst
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 60 +++
.../gpu/drm/i915/display/intel_atomic_plane.h | 4 ++
drivers/gpu/drm/i915/display/intel_display.c | 19 +++---
drivers/gpu/drm/i915/display/intel_sprite.c | 21 +++
4 files change
Use this in all the places where we try to acquire planes after the planes
atomic_check().
In case of intel_modeset_all_pipes() this is not yet done after atomic_check,
but seems like it will be in the future. To add some paranoia, add all planes
rather than active planes, because of bigjoiner and
We split plane_state into hw and uapi, this will allow us to
make bigjoiner work without rewriting the entire atomic_check and
plane programming to be bigjoienr aware.
This results in a cleaner bigjoiner implementation than if we use
a separate plane_state.
The only exception is intel_legacy_curs
This is required to ensure property blobs are correctly copied on bigjoiner
slaves. Only at this point we are sure that the slave crtc is part of the state.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/display/intel_display.c | 10 ++
1 file changed, 10 insertions(+)
diff -
Enabling is done in a special sequence and to be fair, so should
plane updates be. Ideally the end user never notices the second
pipe is used, so use the vblank evasion to cover both pipes.
This way ideally everything will be tear free, and updates are
really atomic as userspace expects it.
The d
And only verify cursor allocation when cursor plane is active.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/display/intel_display.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/i
DSC is available on the display emulator, but not set in DPCD.
Override the entries to allow bigjoiner testing.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/drm_dp_helper.c | 4 ++--
include/drm/drm_dp_helper.h | 1 +
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/dri
It's useful to know what the actual clipped state is, rather than
the unclipped crtc properties.
This is useful when a plane is spread across 2 crtc's, where the
slave crtc has no own plane properties but derives its clipped
values from the master crtc.
Changes since v1:
- Report planar slaves as
We are still looking at drm_crtc_state in a few places, convert those
to use intel_crtc_state instead. Look at uapi/hw where appropriate.
Signed-off-by: Maarten Lankhorst
Reviewed-by: Matt Roper
---
drivers/gpu/drm/i915/display/intel_display.c | 14 +++---
drivers/gpu/drm/i915/display/i
Now that we split plane_state which I didn't want to do yet, we can
program the slave plane without requiring the master plane.
This is useful for programming bigjoiner slave planes as well. We
will no longer need the master's plane_state.
Signed-off-by: Maarten Lankhorst
---
.../gpu/drm/i915/d
We need to look at the hw fb in the plane split, so replace all the places
that use drm_plane_state with intel_plane_state.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/display/intel_display.c | 28 +++-
1 file changed, 16 insertions(+), 12 deletions(-)
diff --git a
Unfortunately I have no way to test this, but it should be correct
if the bios sets up bigjoiner in a sane way.
Skip iterating over bigjoiner slaves, only the master has the state we
care about.
Add the width of the bigjoiner slave to the reconstructed fb.
Hide the bigjoiner slave to userspace,
This can all be done from the intel_update_crtc function. Split out the
pipe update into a separate function, just like is done for the planes.
Pull in all the changes done during fastset as well. It makes no sense
for it to still exist as a separate function.
Changes since v1:
- Inline intel_upda
Now that we separated everything into uapi and hw, it's
time to make the split definitive. Remove the union and
make a copy of the hw state on modeset and fastset.
Color blobs are copied in crtc atomic_check(), right
before color management is checked.
Changes since v1:
- Copy all blobs immediate
== Series Details ==
Series: series starting with [1/5] drm/i915/execlists: Skip redundant
resubmission (rev2)
URL : https://patchwork.freedesktop.org/series/67566/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7003 -> Patchwork_14665
=
== Series Details ==
Series: series starting with [1/5] drm/i915/execlists: Skip redundant
resubmission
URL : https://patchwork.freedesktop.org/series/67566/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7000_full -> Patchwork_14659_full
==
On 04/10/2019 12:17, Chris Wilson wrote:
Quoting Chris Wilson (2019-10-04 12:07:10)
Quoting Tvrtko Ursulin (2019-10-04 10:15:20)
On 03/10/2019 22:01, Chris Wilson wrote:
A few callers need to serialise the destruction of their drm_mm_node and
ensure it is removed from the drm_mm before freei
Hey,
On Fri, 4 Oct 2019, Patchwork wrote:
> URL : https://patchwork.freedesktop.org/series/67350/
[...]
> **FAILURE**
>
> Serious unknown changes coming with Patchwork_14658_full absolutely need to
> be
> verified manually.
[...]
> * igt@gem_mmap_gtt@hang:
> - shard-kbl:
Quoting Kai Vehmanen (2019-10-04 13:06:43)
> Hey,
>
> On Fri, 4 Oct 2019, Patchwork wrote:
>
> > URL : https://patchwork.freedesktop.org/series/67350/
> [...]
> > **FAILURE**
> >
> > Serious unknown changes coming with Patchwork_14658_full absolutely need
> > to be
> > verified manually
On Thu, 03 Oct 2019, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/dp: remove static variable for aux last status (rev3)
> URL : https://patchwork.freedesktop.org/series/67499/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_6996_full -> Patchwork_14647_fu
== Series Details ==
Series: drm/i915: Restrict L3 remapping sysfs interface to dwords
URL : https://patchwork.freedesktop.org/series/67588/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7005 -> Patchwork_14666
Summary
Split out code related to vga switcheroo register/unregister and state
handling from i915_drv.c into new i915_switcheroo.[ch] files.
It's a bit difficult to draw the line how much to move to the new file
from i915_drv.c, but it seemed to me keeping i915_suspend_switcheroo()
and i915_resume_switche
Pair the gmbus setup and teardown in the same layer. This also fixes the
double gmbus teardown on the i915_driver_modeset_probe() error path.
Move the gmbus setup a bit later in the sequence to make the follow-up
refactoring easier, and to pinpoint any unexpected consequences of this
change right
Rename the function per Ville's suggestion. No functional changes.
Cc: Ville Syrjälä
Suggested-by: Ville Syrjälä
Reviewed-by: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display_power.c | 2 +-
drivers/gpu/drm/i915/display/intel_vga.c | 2 +-
driv
On Thu, 03 Oct 2019, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [v2,1/2] drm/i915: Fix audio power up sequence
> for gen10+ display
> URL : https://patchwork.freedesktop.org/series/67528/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_6996
== Series Details ==
Series: Enable bigjoiner support, second approach.
URL : https://patchwork.freedesktop.org/series/67590/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
DESCEND objtool
CHK include/generated/compile.h
AR
On Fri, Oct 04, 2019 at 01:34:52PM +0200, Maarten Lankhorst wrote:
> Using for_each_intel_plane_mask() fails because of an extra bracket,
> remove the bracket so we can use it in the next commit.
>
> Signed-off-by: Maarten Lankhorst
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/disp
== Series Details ==
Series: series starting with [CI,1/3] drm/i915/vga: rename
intel_vga_msr_write() to intel_vga_reset_io_mem()
URL : https://patchwork.freedesktop.org/series/67592/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
095e27e1a8ba drm/i915/vga: rename intel_vga_msr
On Fri, Oct 04, 2019 at 01:34:53PM +0200, Maarten Lankhorst wrote:
> Instead of looking at drm_plane_state, look at intel_plane_state directly.
>
> This will allow us to make the watermarks bigjoiner aware, when we make it
> work for bigjoiner slave pipes as well.
>
> Signed-off-by: Maarten Lankh
On Fri, Oct 04, 2019 at 01:34:54PM +0200, Maarten Lankhorst wrote:
> We have a src and dect rectangle, use it instead of relying on
> the core drm properties.
>
> This removes the special case in the watermark code for cursor w/h.
I like getting rid of special cases. I guess the only concern I on
On Fri, Oct 04, 2019 at 01:34:55PM +0200, Maarten Lankhorst wrote:
> We need to look at the hw fb in the plane split, so replace all the places
> that use drm_plane_state with intel_plane_state.
>
> Signed-off-by: Maarten Lankhorst
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/displ
On Fri, Oct 04, 2019 at 01:34:59PM +0200, Maarten Lankhorst wrote:
> We are still looking at drm_crtc_state in a few places, convert those
> to use intel_crtc_state instead. Look at uapi/hw where appropriate.
>
> Signed-off-by: Maarten Lankhorst
> Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm
The overlay uses the modeset mutex to control itself and only required
the struct_mutex for requests, which is now obsolete.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/display/intel_display.c | 7 +--
drivers/gpu/drm/i915/display/intel_overlay.c | 13 -
As we need to use a mutex to serialise i915_active activation
(because we want to allow the callback to sleep), we need to push the
i915_active.retire into a worker callback in case we get need to retire
from an atomic context.
Signed-off-by: Chris Wilson
Reviewed-by: Matthew Auld
---
.../gpu/d
wait_for_timelines is essentially the same loop as retiring requests
(with an extra timeout), so merge the two into one routine.
v2: i915_retire_requests_timeout and keep VT'd w/a as !interruptible
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gem/i915_gem_mm
Since we cannot allocate underneath the vm->mutex (it is used in the
direct-reclaim paths), we need to shift the allocations off into a
mutexless worker with fence recursion prevention. To know when we need
this protection, we mark up the address spaces that do allocate before
insertion. In the fut
Now that we can retire without taking struct_mutex, we can do so to
handle shrinking the mmap-offset space after an allocation failure.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
Cc: Matthew Auld
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 17 +--
Just patch 14 needs review and then we're ready to pull the plug.
-Chris
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
With the introduction of ctx->engines[] we allow multiple logical
contexts to be used on the same engine (e.g. with virtual engines).
According to bspec, aach logical context requires a unique tag in order
for context-switching to occur correctly between them. [Simple
experiments show that it is no
Now that we now longer need to guarantee that the active callback is
under the struct_mutex, we can lift it out of the i915_gem_park() and
into the engine parking itself.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gem/i915_gem_pm.c| 19 -
struct_mutex provides no serialisation of the registers and data
structures being saved and restored across suspend/resume. It is
completely superfluous here.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_suspend.c | 8
1 file changed, 8 deletion
Keep track of the GEM contexts underneath i915->gem.contexts and assign
them their own lock for the purposes of list management.
v2: Focus on lock tracking; ctx->vm is protected by ctx->mutex
v3: Correct split with removal of logical HW ID
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
dri
We don't need to hold struct_mutex now for retiring requests, so drop it
from i915_retire_requests() and i915_gem_wait_for_idle(), finally
removing I915_WAIT_LOCKED for good.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
.../gpu/drm/i915/gem/i915_gem_client_blt.c| 7 +-
driv
The premise here is to simply avoiding having to acquire the vm->mutex
inside vma create/destroy to update the vm->unbound_lists, to avoid some
nasty lock recursions later.
Signed-off-by: Chris Wilson
Reviewed-by: Matthew Auld
---
drivers/gpu/drm/i915/gem/i915_gem_stolen.c| 2 +-
drivers/g
We no longer need to placate lockdep by holding struct_mutex for our
initialisation, so don't.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gem/i915_gem_pm.c | 2 --
drivers/gpu/drm/i915/i915_gem.c | 9 -
drivers/gpu/drm/i91
Nothing inside the idle worker now requires struct_mutex, so we can
remove the indirection of using our own worker.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gem/i915_gem_pm.c| 28 ++-
.../drm/i915/gem/selftests/i915_gem_mman.c|
Requests are run from the gt and are tided into the gt runtime power
management, so pull the runtime request management under gt/
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/gem/i915_gem_mman.c |
On 04/10/2019 14:40, Chris Wilson wrote:
Keep track of the GEM contexts underneath i915->gem.contexts and assign
them their own lock for the purposes of list management.
v2: Focus on lock tracking; ctx->vm is protected by ctx->mutex
v3: Correct split with removal of logical HW ID
Reviewed-by:
Chris Wilson writes:
> There's very little variation in non-privileged registers for Tigerlake,
> so we can mostly inherit the set from gen11. There is no whitelist at
> present, so we do not need to add any special registers.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111599
> Si
== Series Details ==
Series: series starting with [CI,1/3] drm/i915/vga: rename
intel_vga_msr_write() to intel_vga_reset_io_mem()
URL : https://patchwork.freedesktop.org/series/67592/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7007 -> Patchwork_14668
==
Quoting Mika Kuoppala (2019-10-04 14:51:05)
> Chris Wilson writes:
>
> > There's very little variation in non-privileged registers for Tigerlake,
> > so we can mostly inherit the set from gen11. There is no whitelist at
> > present, so we do not need to add any special registers.
> >
> > Bugzilla
Forgo the struct_mutex serialisation for i915_active, and interpose its
own mutex handling for active/retire.
This is a multi-layered sleight-of-hand. First, we had to ensure that no
active/retire callbacks accidentally inverted the mutex ordering rules,
nor assumed that they were themselves seria
We no longer need struct_mutex to serialise request emission, so remove
it from the gt selftests.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
.../gpu/drm/i915/gem/selftests/huge_pages.c | 15 +-
.../drm/i915/gem/selftests/i915_gem_context.c | 4 -
.../drm/i915/gem/selftests
As our global unpark/park keep track of the number of active users, we
can simply move the accounting from the GEM layer to the base GT layer.
It was placed originally inside GEM to benefit from the 100ms extra
delay on idleness, but that has been eliminated and now there is no
substantive differen
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