[Intel-gfx] [PATCH 1/2] drm/i915/dp: Fix dsc bpp calculations, v5.

2019-09-25 Thread Maarten Lankhorst
There was a integer wraparound when mode_clock became too high, and we didn't correct for the FEC overhead factor when dividing, with the calculations breaking at HBR3. As a result our calculated bpp was way too high, and the link width limitation never came into effect. Print out the resulting b

[Intel-gfx] [PATCH 2/2] drm/i915: Add hardware readout for FEC

2019-09-25 Thread Maarten Lankhorst
Readout the FEC state in encoder->get_config(), this will allow us to ensure that we can correctly inherit the state from boot, and that we set FEC during modeset. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/display/intel_ddi.c | 17 + drivers/gpu/drm/i915/displ

Re: [Intel-gfx] [PATCH 12/21] drm/i915: Mark up address spaces that may need to allocate

2019-09-25 Thread Chris Wilson
Quoting Tvrtko Ursulin (2019-09-23 09:10:26) > > On 20/09/2019 17:35, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2019-09-20 17:22:42) > >> > >> On 02/09/2019 05:02, Chris Wilson wrote: > >>> Since we cannot allocate underneath the vm->mutex (it is used in the > >>> direct-reclaim paths), we n

Re: [Intel-gfx] [PATCH] drm/i915: Small joiner RAM buffer size is platform-specific

2019-09-25 Thread Maarten Lankhorst
Hey, Op 25-09-2019 om 07:53 schreef Matt Roper: > According to the bspec, GLK/CNL have a smaller small joiner RAM buffer > than ICL+. This feels like something that could easily change again on > future platforms, so let's just add a function to return the proper > per-platform buffer size. That

Re: [Intel-gfx] [PATCH V2 0/8] mdev based hardware virtio offloading support

2019-09-25 Thread Tian, Kevin
> From: Jason Wang [mailto:jasow...@redhat.com] > Sent: Tuesday, September 24, 2019 9:53 PM > > Hi all: > > There are hardware that can do virtio datapath offloading while having > its own control path. This path tries to implement a mdev based > unified API to support using kernel virtio driver

Re: [Intel-gfx] [PATCH V2 2/8] mdev: class id support

2019-09-25 Thread Tian, Kevin
> From: Jason Wang > Sent: Tuesday, September 24, 2019 9:53 PM > > Mdev bus only supports vfio driver right now, so it doesn't implement > match method. But in the future, we may add drivers other than vfio, > the first driver could be virtio-mdev. This means we need to add > device class id suppo

Re: [Intel-gfx] [PATCH i-g-t] i915/perf_pmu: Compare semaphore and busy measurements

2019-09-25 Thread Tvrtko Ursulin
On 24/09/2019 23:01, Chris Wilson wrote: Our semaphore time is measured by sampling a ring register, whereas our busy time is measured exactly. This leaves a window of discrepancy that we wish to keep small (at least within sample tolerance). References: https://bugs.freedesktop.org/show_bug.cg

Re: [Intel-gfx] [PATCH] Revert "drm/i915/color: Extract icl_read_luts()"

2019-09-25 Thread Jani Nikula
On Tue, 24 Sep 2019, Swati Sharma wrote: > This reverts commit 84af7649188194a74cdd6437235a5e3c86108f0f. > > This is causing problems with the display, displays are all > bright colors. > > Signed-off-by: Swati Sharma Pushed, thanks for the patch. Now we do need to figure out how to do at least

Re: [Intel-gfx] [PATCH] Revert "drm/i915/color: Extract icl_read_luts()"

2019-09-25 Thread Jani Nikula
On Wed, 25 Sep 2019, "Saarinen, Jani" wrote: > Hi, > >> -Original Message- >> From: Intel-gfx On Behalf Of Swati >> Sharma >> Sent: tiistai 24. syyskuuta 2019 16.58 >> To: intel-gfx@lists.freedesktop.org >> Cc: Nikula, Jani ; daniel.vet...@ffwll.ch; Nautiyal, >> Ankit K >> >> Subject:

Re: [Intel-gfx] [PATCH 17/21] drm/i915: Drop struct_mutex from around i915_retire_requests()

2019-09-25 Thread Chris Wilson
Quoting Tvrtko Ursulin (2019-09-24 16:25:29) > > On 02/09/2019 05:02, Chris Wilson wrote: > > @@ -449,8 +447,6 @@ tl_write(struct intel_timeline *tl, struct > > intel_engine_cs *engine, u32 value) > > struct i915_request *rq; > > int err; > > > > - lockdep_assert_held(&tl->gt->

Re: [Intel-gfx] [PATCH 17/21] drm/i915: Drop struct_mutex from around i915_retire_requests()

2019-09-25 Thread Tvrtko Ursulin
On 25/09/2019 09:43, Chris Wilson wrote: Quoting Tvrtko Ursulin (2019-09-24 16:25:29) On 02/09/2019 05:02, Chris Wilson wrote: @@ -449,8 +447,6 @@ tl_write(struct intel_timeline *tl, struct intel_engine_cs *engine, u32 value) struct i915_request *rq; int err; - lockdep_

Re: [Intel-gfx] [PATCH V2 5/8] mdev: introduce device specific ops

2019-09-25 Thread Tian, Kevin
> From: Alex Williamson > Sent: Wednesday, September 25, 2019 7:07 AM > > On Tue, 24 Sep 2019 21:53:29 +0800 > Jason Wang wrote: > > > Currently, except for the create and remove, the rest of > > mdev_parent_ops is designed for vfio-mdev driver only and may not help > > for kernel mdev driver. W

Re: [Intel-gfx] [PATCH 19/21] drm/i915: Merge wait_for_timelines with retire_request

2019-09-25 Thread Chris Wilson
Quoting Tvrtko Ursulin (2019-09-24 16:57:12) > > On 02/09/2019 05:03, Chris Wilson wrote: > > wait_for_timelines is essentially the same loop as retiring requests > > (with an extra), so merge the two into one routine. > > Extra suspense! :) > > > > > Signed-off-by: Chris Wilson > > --- > >

Re: [Intel-gfx] [PATCH V2 6/8] mdev: introduce virtio device and its device ops

2019-09-25 Thread Tian, Kevin
> From: Jason Wang [mailto:jasow...@redhat.com] > Sent: Tuesday, September 24, 2019 9:54 PM > > This patch implements basic support for mdev driver that supports > virtio transport for kernel virtio driver. > > Signed-off-by: Jason Wang > --- > include/linux/mdev.h| 2 + > include/lin

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/dp: Fix dsc bpp calculations, v5.

2019-09-25 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/dp: Fix dsc bpp calculations, v5. URL : https://patchwork.freedesktop.org/series/67203/ State : warning == Summary == $ dim checkpatch origin/drm-tip ae2d2fb87831 drm/i915/dp: Fix dsc bpp calculations, v5. -:23: WARNING:COMMIT_LO

Re: [Intel-gfx] [PATCH v8 4/7] drm/i915/tgl: Do modeset to enable and configure DC3CO exitline.

2019-09-25 Thread Anshuman Gupta
On 2019-09-23 at 19:26:56 +0300, Imre Deak wrote: > On Fri, Sep 13, 2019 at 01:53:36PM +0530, Anshuman Gupta wrote: > > DC3CO enabling B.Specs sequence requires to enable end configure > > exit scanlines to TRANS_EXITLINE register, programming this register > > has to be part of modeset sequence as

[Intel-gfx] [PATCH i-g-t v2] i915/perf_pmu: Compare semaphore and busy measurements

2019-09-25 Thread Chris Wilson
Our semaphore time is measured by sampling a ring register, whereas our busy time is measured exactly. This leaves a window of discrepancy that we wish to keep small (at least within sample tolerance). v2: Explain the sema <= busy assert, and lots of other Tvrtko tweaks References: https://bugs.f

Re: [Intel-gfx] [PATCH i-g-t v2] i915/perf_pmu: Compare semaphore and busy measurements

2019-09-25 Thread Tvrtko Ursulin
On 25/09/2019 10:23, Chris Wilson wrote: Our semaphore time is measured by sampling a ring register, whereas our busy time is measured exactly. This leaves a window of discrepancy that we wish to keep small (at least within sample tolerance). v2: Explain the sema <= busy assert, and lots of oth

Re: [Intel-gfx] [PATCH 05/23] drm/i915: Complete sw/hw split

2019-09-25 Thread Maarten Lankhorst
Op 25-09-2019 om 01:41 schreef Matt Roper: > On Fri, Sep 20, 2019 at 01:42:17PM +0200, Maarten Lankhorst wrote: >> Now that we separated everything into uapi and hw, it's >> time to make the split definitive. Remove the union and >> make a copy of the hw state on modeset and fastset. >> >> Color bl

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/dp: Fix dsc bpp calculations, v5.

2019-09-25 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/dp: Fix dsc bpp calculations, v5. URL : https://patchwork.freedesktop.org/series/67203/ State : success == Summary == CI Bug Log - changes from CI_DRM_6954 -> Patchwork_14526

Re: [Intel-gfx] [PATCH 21/21] drm/i915: Move global activity tracking from GEM to GT

2019-09-25 Thread Tvrtko Ursulin
On 02/09/2019 05:03, Chris Wilson wrote: As our global unpark/park keep track of the number of active users, we can simply move the accounting from the GEM layer to the base GT layer. It was placed originally inside GEM to benefit from the 100ms extra delay on idleness, but that has been elimina

[Intel-gfx] [PATCH 21/27] drm/i915: Move context management under GEM

2019-09-25 Thread Chris Wilson
Keep track of the GEM contexts underneath i915->gem.contexts and assign them their own lock for the purposes of list management. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gem/i915_gem_context.c | 155 +++--- drivers/gpu/drm/i915/gem/i915_gem_context.h

[Intel-gfx] struct_mutex is over the hill and far away

2019-09-25 Thread Chris Wilson
We're getting closer! -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH 17/27] drm/i915/execlists: Cancel banned contexts on schedule-out

2019-09-25 Thread Chris Wilson
On completion of a banned context, scrub the context image so that we do not replay the active payload. The intent is that we skip banned payloads on request submission so that the timeline advancement continues on in the background. However, if we are returning to a preempted request, i915_request

[Intel-gfx] [PATCH 23/27] drm/i915: Drop struct_mutex guard from debugfs/framebuffer_info

2019-09-25 Thread Chris Wilson
It protects nothing being accessed for the intel_framebuffer, so it's own locking had better be sufficient. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_debugfs.c | 6 -- 1 file changed, 6 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i91

[Intel-gfx] [PATCH 24/27] drm/i915: Remove struct_mutex guard for debugfs/opregion

2019-09-25 Thread Chris Wilson
Having a struct_mutex around the read of a BIOS blob serves no purpose. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_debugfs.c | 12 +--- 1 file changed, 1 insertion(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c

[Intel-gfx] [PATCH 26/27] drm/i915/selftests: Drop vestigal struct_mutex guards

2019-09-25 Thread Chris Wilson
We no longer need struct_mutex to serialise request emission, so remove it from the gt selftests. Signed-off-by: Chris Wilson --- .../gpu/drm/i915/gem/selftests/huge_pages.c | 15 +- .../drm/i915/gem/selftests/i915_gem_mman.c| 2 - .../drm/i915/gem/selftests/i915_gem_phys.c| 2 -

[Intel-gfx] [PATCH 12/27] drm/i915: Move request runtime management onto gt

2019-09-25 Thread Chris Wilson
Requests are run from the gt and are tided into the gt runtime power management, so pull the runtime request management under gt/ Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/gem/i915_gem_mman.c | 6 +- drivers/gpu/drm/i915/ge

[Intel-gfx] [PATCH 07/27] drm/i915: Coordinate i915_active with its own mutex

2019-09-25 Thread Chris Wilson
Forgo the struct_mutex serialisation for i915_active, and interpose its own mutex handling for active/retire. This is a multi-layered sleight-of-hand. First, we had to ensure that no active/retire callbacks accidentally inverted the mutex ordering rules, nor assumed that they were themselves seria

[Intel-gfx] [PATCH 14/27] drm/i915: Expose engine properties via sysfs

2019-09-25 Thread Chris Wilson
Preliminary stub to add engines underneath /sys/class/drm/cardN/, so that we can expose properties on each engine to the sysadmin. To start with we have basic analogues of the i915_query ioctl so that we can pretty print engine discovery from the shell, and flesh out the directory structure. Later

[Intel-gfx] [PATCH 13/27] drm/i915: Move global activity tracking from GEM to GT

2019-09-25 Thread Chris Wilson
As our global unpark/park keep track of the number of active users, we can simply move the accounting from the GEM layer to the base GT layer. It was placed originally inside GEM to benefit from the 100ms extra delay on idleness, but that has been eliminated and now there is no substantive differen

[Intel-gfx] [PATCH 08/27] drm/i915: Move idle barrier cleanup into engine-pm

2019-09-25 Thread Chris Wilson
Now that we now longer need to guarantee that the active callback is under the struct_mutex, we can lift it out of the i915_gem_park() and into the engine parking itself. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/gem/i915_gem_pm.c| 19 -

[Intel-gfx] [PATCH 18/27] drm/i915: Cancel non-persistent contexts on close

2019-09-25 Thread Chris Wilson
Normally, we rely on our hangcheck to prevent persistent batches from hogging the GPU. However, if the user disables hangcheck, this mechanism breaks down. Despite our insistence that this is unsafe, the users are equally insistent that they want to use endless batches and will disable the hangchec

[Intel-gfx] [PATCH 11/27] drm/i915: Merge wait_for_timelines with retire_request

2019-09-25 Thread Chris Wilson
wait_for_timelines is essentially the same loop as retiring requests (with an extra timeout), so merge the two into one routine. v2: i915_retire_requests_timeout and keep VT'd w/a as !interruptible Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gem/i915_gem_mman.c | 4 +- drivers/gp

[Intel-gfx] [PATCH 19/27] drm/i915: Replace hangcheck by heartbeats

2019-09-25 Thread Chris Wilson
Replace sampling the engine state every so often with a periodic heartbeat request to measure the health of an engine. This is coupled with the forced-preemption to allow long running requests to survive so long as they do not block other users. v2: Couple in sysfs controls Signed-off-by: Chris W

[Intel-gfx] [PATCH 22/27] drm/i915/overlay: Drop struct_mutex guard

2019-09-25 Thread Chris Wilson
The overlay uses the modeset mutex to control itself and only required the struct_mutex for requests, which is now obsolete. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/display/intel_display.c | 7 +-- drivers/gpu/drm/i915/display/intel_overlay.c | 13 - drivers/gpu/drm

[Intel-gfx] [PATCH 15/27] drm/i915/execlists: Force preemption

2019-09-25 Thread Chris Wilson
If the preempted context takes too long to relinquish control, e.g. it is stuck inside a shader with arbitration disabled, evict that context with an engine reset. This ensures that preemptions are reasonably responsive, providing a tighter QoS for the more important context at the cost of flagging

[Intel-gfx] [PATCH 03/27] drm/i915: Only track bound elements of the GTT

2019-09-25 Thread Chris Wilson
The premise here is to simply avoiding having to acquire the vm->mutex inside vma create/destroy to update the vm->unbound_lists, to avoid some nasty lock recursions later. Signed-off-by: Chris Wilson Reviewed-by: Matthew Auld --- drivers/gpu/drm/i915/gem/i915_gem_stolen.c| 2 +- drivers/g

[Intel-gfx] [PATCH 27/27] drm/i915: Drop struct_mutex from around GEM initialisation

2019-09-25 Thread Chris Wilson
We no longer need to placate lockdep by holding struct_mutex for our initialisation, so don't. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gem/i915_gem_pm.c | 2 -- drivers/gpu/drm/i915/i915_gem.c | 9 - drivers/gpu/drm/i915/selftests/mock_gem_device.c

[Intel-gfx] [PATCH 09/27] drm/i915: Drop struct_mutex from around i915_retire_requests()

2019-09-25 Thread Chris Wilson
We don't need to hold struct_mutex now for retiring requests, so drop it from i915_retire_requests() and i915_gem_wait_for_idle(), finally removing I915_WAIT_LOCKED for good. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- .../gpu/drm/i915/gem/i915_gem_client_blt.c| 7 +- driv

[Intel-gfx] [PATCH 20/27] drm/i915: Remove logical HW ID

2019-09-25 Thread Chris Wilson
With the introduction of ctx->engines[] we allow multiple logical contexts to be used on the same engine (e.g. with virtual engines). Each logical context requires a unique tag in order for context-switching to occur correctly between them. We only need to keep a unique tag for the active lifetime

[Intel-gfx] [PATCH 25/27] drm/i915: Drop struct_mutex from suspend state save/restore

2019-09-25 Thread Chris Wilson
struct_mutex provides no serialisation of the registers and data structures being saved and restored across suspend/resume. It is completely superfluous here. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_suspend.c | 8 1 file changed, 8 deletions(-) diff --git a/drivers/gp

[Intel-gfx] [PATCH 04/27] drm/i915: Mark up address spaces that may need to allocate

2019-09-25 Thread Chris Wilson
Since we cannot allocate underneath the vm->mutex (it is used in the direct-reclaim paths), we need to shift the allocations off into a mutexless worker with fence recursion prevention. To know when we need this protection, we mark up the address spaces that do allocate before insertion. Signed-of

[Intel-gfx] [PATCH 16/27] drm/i915: Mark up "sentinel" requests

2019-09-25 Thread Chris Wilson
Sometimes we want to emit a terminator request, a request that flushes the pipeline and allows no request to come after it. This can be used for a "preempt-to-idle" to ensure that upon processing the context-switch to that request, all other active contexts have been flushed. Signed-off-by: Chris

[Intel-gfx] [PATCH 02/27] drm/mm: Pack allocated/scanned boolean into a bitfield

2019-09-25 Thread Chris Wilson
The ulterior motive to switching the booleans over to bitops is to allow use of the allocated flag as a bitlock. Signed-off-by: Chris Wilson --- drivers/gpu/drm/drm_mm.c | 36 +++ .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 6 ++-- drivers/gpu/drm/i915/g

[Intel-gfx] [PATCH 10/27] drm/i915: Remove the GEM idle worker

2019-09-25 Thread Chris Wilson
Nothing inside the idle worker now requires struct_mutex, so we can remove the indirection of using our own worker. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/gem/i915_gem_pm.c| 28 ++- .../drm/i915/gem/selftests/i915_gem_mman.c|

[Intel-gfx] [PATCH 01/27] dma-fence: Serialise signal enabling (dma_fence_enable_sw_signaling)

2019-09-25 Thread Chris Wilson
Make dma_fence_enable_sw_signaling() behave like its dma_fence_add_callback() and dma_fence_default_wait() counterparts and perform the test to enable signaling under the fence->lock, along with the action to do so. This ensure that should an implementation be trying to flush the cb_list (by signal

[Intel-gfx] [PATCH 06/27] drm/i915: Push the i915_active.retire into a worker

2019-09-25 Thread Chris Wilson
As we need to use a mutex to serialise i915_active activation (because we want to allow the callback to sleep), we need to push the i915_active.retire into a worker callback in case we get need to retire from an atomic context. Signed-off-by: Chris Wilson Reviewed-by: Matthew Auld --- .../gpu/d

Re: [Intel-gfx] [PATCH v3 3/6] drm/i915/display/icl: HW state readout for transcoder port sync config

2019-09-25 Thread Ville Syrjälä
On Tue, Sep 24, 2019 at 10:59:57AM -0700, Manasi Navare wrote: > On Tue, Sep 24, 2019 at 05:38:00PM +0200, Maarten Lankhorst wrote: > > Op 22-09-2019 om 19:08 schreef Manasi Navare: > > > After the state is committed, we readout the HW registers and compare > > > the HW state with the SW state that

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/27] dma-fence: Serialise signal enabling (dma_fence_enable_sw_signaling)

2019-09-25 Thread Patchwork
== Series Details == Series: series starting with [01/27] dma-fence: Serialise signal enabling (dma_fence_enable_sw_signaling) URL : https://patchwork.freedesktop.org/series/67206/ State : warning == Summary == $ dim checkpatch origin/drm-tip 00c4ac0a46d7 dma-fence: Serialise signal enabling

Re: [Intel-gfx] [PATCH 1/2] drm/i915/dp: Fix dsc bpp calculations, v5.

2019-09-25 Thread Ville Syrjälä
On Wed, Sep 25, 2019 at 10:21:09AM +0200, Maarten Lankhorst wrote: > There was a integer wraparound when mode_clock became too high, > and we didn't correct for the FEC overhead factor when dividing, > with the calculations breaking at HBR3. > > As a result our calculated bpp was way too high, and

Re: [Intel-gfx] [PATCH 1/2] drm/i915/dp: Fix dsc bpp calculations, v5.

2019-09-25 Thread Maarten Lankhorst
Op 25-09-2019 om 12:26 schreef Ville Syrjälä: > On Wed, Sep 25, 2019 at 10:21:09AM +0200, Maarten Lankhorst wrote: >> There was a integer wraparound when mode_clock became too high, >> and we didn't correct for the FEC overhead factor when dividing, >> with the calculations breaking at HBR3. >> >>

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [01/27] dma-fence: Serialise signal enabling (dma_fence_enable_sw_signaling)

2019-09-25 Thread Patchwork
== Series Details == Series: series starting with [01/27] dma-fence: Serialise signal enabling (dma_fence_enable_sw_signaling) URL : https://patchwork.freedesktop.org/series/67206/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.6.0 Commit: dma-fence: Serialise si

Re: [Intel-gfx] [PATCH 1/2] drm/i915/dp: Fix dsc bpp calculations, v5.

2019-09-25 Thread Ville Syrjälä
On Wed, Sep 25, 2019 at 12:34:17PM +0200, Maarten Lankhorst wrote: > Op 25-09-2019 om 12:26 schreef Ville Syrjälä: > > On Wed, Sep 25, 2019 at 10:21:09AM +0200, Maarten Lankhorst wrote: > >> There was a integer wraparound when mode_clock became too high, > >> and we didn't correct for the FEC overh

Re: [Intel-gfx] [PATCH 11/27] drm/i915: Merge wait_for_timelines with retire_request

2019-09-25 Thread Tvrtko Ursulin
On 25/09/2019 11:01, Chris Wilson wrote: wait_for_timelines is essentially the same loop as retiring requests (with an extra timeout), so merge the two into one routine. v2: i915_retire_requests_timeout and keep VT'd w/a as !interruptible Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [01/27] dma-fence: Serialise signal enabling (dma_fence_enable_sw_signaling)

2019-09-25 Thread Patchwork
== Series Details == Series: series starting with [01/27] dma-fence: Serialise signal enabling (dma_fence_enable_sw_signaling) URL : https://patchwork.freedesktop.org/series/67206/ State : success == Summary == CI Bug Log - changes from CI_DRM_6954 -> Patchwork_14527 =

Re: [Intel-gfx] [PATCH 11/27] drm/i915: Merge wait_for_timelines with retire_request

2019-09-25 Thread Chris Wilson
Quoting Tvrtko Ursulin (2019-09-25 11:47:35) > > On 25/09/2019 11:01, Chris Wilson wrote: > > -bool i915_retire_requests(struct drm_i915_private *i915) > > +long i915_retire_requests_timeout(struct drm_i915_private *i915, long > > timeout) > > { > > struct intel_gt_timelines *timelines =

Re: [Intel-gfx] [PATCH 12/27] drm/i915: Move request runtime management onto gt

2019-09-25 Thread Tvrtko Ursulin
On 25/09/2019 11:01, Chris Wilson wrote: Requests are run from the gt and are tided into the gt runtime power management, so pull the runtime request management under gt/ Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/gem/i915_gem

Re: [Intel-gfx] [PATCH 12/27] drm/i915: Move request runtime management onto gt

2019-09-25 Thread Chris Wilson
Quoting Tvrtko Ursulin (2019-09-25 11:57:53) > > On 25/09/2019 11:01, Chris Wilson wrote: > > @@ -423,6 +424,7 @@ void i915_gem_object_release_mmap(struct > > drm_i915_gem_object *obj) > > static int create_mmap_offset(struct drm_i915_gem_object *obj) > > { > > struct drm_i915_private *

Re: [Intel-gfx] [PATCH 12/27] drm/i915: Move request runtime management onto gt

2019-09-25 Thread Chris Wilson
Quoting Chris Wilson (2019-09-25 12:17:14) > Quoting Tvrtko Ursulin (2019-09-25 11:57:53) > > > > I am still slightly uneasy about having requests, which I see as a GEM > > concept, be retired from GT, but okay, it's not the most important issue > > at the moment. > > requests are not a GEM con

Re: [Intel-gfx] [PATCH 12/27] drm/i915: Move request runtime management onto gt

2019-09-25 Thread Chris Wilson
Quoting Chris Wilson (2019-09-25 12:24:08) > Quoting Chris Wilson (2019-09-25 12:17:14) > > Quoting Tvrtko Ursulin (2019-09-25 11:57:53) > > > > > > I am still slightly uneasy about having requests, which I see as a GEM > > > concept, be retired from GT, but okay, it's not the most important issu

Re: [Intel-gfx] [PATCH 12/27] drm/i915: Move request runtime management onto gt

2019-09-25 Thread Chris Wilson
Quoting Chris Wilson (2019-09-25 12:29:40) > Quoting Chris Wilson (2019-09-25 12:24:08) > > Quoting Chris Wilson (2019-09-25 12:17:14) > > > Quoting Tvrtko Ursulin (2019-09-25 11:57:53) > > > > > > > > I am still slightly uneasy about having requests, which I see as a GEM > > > > concept, be reti

Re: [Intel-gfx] [PATCH 5/6] vringh: fix copy direction of vringh_iov_push_kern()

2019-09-25 Thread Jason Wang
On 2019/9/24 下午10:04, Alex Williamson wrote: > On Mon, 23 Sep 2019 12:00:41 -0400 > "Michael S. Tsirkin" wrote: > >> On Mon, Sep 23, 2019 at 09:45:59AM -0600, Alex Williamson wrote: >>> On Mon, 23 Sep 2019 21:03:30 +0800 >>> Jason Wang wrote: >>> We want to copy from iov to buf, so the d

Re: [Intel-gfx] [PATCH V2 2/8] mdev: class id support

2019-09-25 Thread Jason Wang
On 2019/9/25 上午7:06, Alex Williamson wrote: > On Tue, 24 Sep 2019 21:53:26 +0800 > Jason Wang wrote: > >> Mdev bus only supports vfio driver right now, so it doesn't implement >> match method. But in the future, we may add drivers other than vfio, >> the first driver could be virtio-mdev. This me

Re: [Intel-gfx] [PATCH V2 5/8] mdev: introduce device specific ops

2019-09-25 Thread Jason Wang
On 2019/9/25 上午7:06, Alex Williamson wrote: > On Tue, 24 Sep 2019 21:53:29 +0800 > Jason Wang wrote: > >> Currently, except for the create and remove, the rest of >> mdev_parent_ops is designed for vfio-mdev driver only and may not help >> for kernel mdev driver. With the help of class id, this p

Re: [Intel-gfx] [PATCH V2 6/8] mdev: introduce virtio device and its device ops

2019-09-25 Thread Jason Wang
On 2019/9/25 上午7:06, Alex Williamson wrote: > On Tue, 24 Sep 2019 21:53:30 +0800 > Jason Wang wrote: > >> This patch implements basic support for mdev driver that supports >> virtio transport for kernel virtio driver. >> >> Signed-off-by: Jason Wang >> --- >> include/linux/mdev.h| 2 +

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/tgl: Swap engines for no rc6/rps (gpu powersave and reclocking)

2019-09-25 Thread Patchwork
== Series Details == Series: drm/i915/tgl: Swap engines for no rc6/rps (gpu powersave and reclocking) URL : https://patchwork.freedesktop.org/series/67178/ State : success == Summary == CI Bug Log - changes from CI_DRM_6951_full -> Patchwork_14519_full =

Re: [Intel-gfx] [PATCH V2 2/8] mdev: class id support

2019-09-25 Thread Jason Wang
On 2019/9/25 下午4:28, Tian, Kevin wrote: >> From: Jason Wang >> Sent: Tuesday, September 24, 2019 9:53 PM >> >> Mdev bus only supports vfio driver right now, so it doesn't implement >> match method. But in the future, we may add drivers other than vfio, >> the first driver could be virtio-mdev. Thi

Re: [Intel-gfx] [PATCH V2 0/8] mdev based hardware virtio offloading support

2019-09-25 Thread Jason Wang
On 2019/9/25 下午4:24, Tian, Kevin wrote: >> From: Jason Wang [mailto:jasow...@redhat.com] >> Sent: Tuesday, September 24, 2019 9:53 PM >> >> Hi all: >> >> There are hardware that can do virtio datapath offloading while having >> its own control path. This path tries to implement a mdev based >> uni

[Intel-gfx] [PATCH v3] drm/i915: Restrict qgv points which don't have enough bandwidth.

2019-09-25 Thread Stanislav Lisovskiy
According to BSpec 53998, we should try to restrict qgv points, which can't provide enough bandwidth for desired display configuration. Currently we are just comparing against all of those and take minimum(worst case). v2: Fixed wrong PCode reply mask, removed hardcoded values. v3: Forbid si

[Intel-gfx] [PATCH] drm/i915/tgl: Swap rps disable for rc6 disable

2019-09-25 Thread Chris Wilson
Still searching to the sweetspot to leave CI alive as we figure out the root cause. Signed-off-by: Chris Wilson Cc: Mika Kuoppala --- drivers/gpu/drm/i915/i915_pci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_p

Re: [Intel-gfx] [PATCH v8 4/7] drm/i915/tgl: Do modeset to enable and configure DC3CO exitline.

2019-09-25 Thread Imre Deak
On Wed, Sep 25, 2019 at 02:40:42PM +0530, Anshuman Gupta wrote: > On 2019-09-23 at 19:26:56 +0300, Imre Deak wrote: > > On Fri, Sep 13, 2019 at 01:53:36PM +0530, Anshuman Gupta wrote: > > > DC3CO enabling B.Specs sequence requires to enable end configure > > > exit scanlines to TRANS_EXITLINE regis

Re: [Intel-gfx] [PATCH] drm/i915/tgl: Swap rps disable for rc6 disable

2019-09-25 Thread Mika Kuoppala
Chris Wilson writes: > Still searching to the sweetspot to leave CI alive as we figure out the > root cause. > > Signed-off-by: Chris Wilson > Cc: Mika Kuoppala Acked-by: Mika Kuoppala > --- > drivers/gpu/drm/i915/i915_pci.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff -

Re: [Intel-gfx] [PATCH 20/27] drm/i915: Remove logical HW ID

2019-09-25 Thread Tvrtko Ursulin
[+ Daniele, I think he might want to have a look at this.] On 25/09/2019 11:01, Chris Wilson wrote: With the introduction of ctx->engines[] we allow multiple logical contexts to be used on the same engine (e.g. with virtual engines). Each logical context requires a unique tag in order for contex

Re: [Intel-gfx] [PATCH 22/27] drm/i915/overlay: Drop struct_mutex guard

2019-09-25 Thread Tvrtko Ursulin
On 25/09/2019 11:01, Chris Wilson wrote: The overlay uses the modeset mutex to control itself and only required the struct_mutex for requests, which is now obsolete. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/display/intel_display.c | 7 +-- drivers/gpu/drm/i915/display/intel

Re: [Intel-gfx] [PATCH 23/27] drm/i915: Drop struct_mutex guard from debugfs/framebuffer_info

2019-09-25 Thread Tvrtko Ursulin
On 25/09/2019 11:01, Chris Wilson wrote: It protects nothing being accessed for the intel_framebuffer, so it's own locking had better be sufficient. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_debugfs.c | 6 -- 1 file changed, 6 deletions(-) diff --git a/drivers/gpu/drm/i

Re: [Intel-gfx] [PATCH 09/23] drm/i915: Do not add all planes when checking scalers on glk+

2019-09-25 Thread Maarten Lankhorst
Op 25-09-2019 om 06:55 schreef Matt Roper: > On Fri, Sep 20, 2019 at 01:42:21PM +0200, Maarten Lankhorst wrote: >> We cannot switch between HQ and normal mode on GLK+, so only >> add planes on platforms where it makes sense. >> >> We could probably restrict it even more to only add when scaler >> u

Re: [Intel-gfx] [PATCH V2 6/8] mdev: introduce virtio device and its device ops

2019-09-25 Thread Jason Wang
On 2019/9/25 下午5:09, Tian, Kevin wrote: From: Jason Wang [mailto:jasow...@redhat.com] Sent: Tuesday, September 24, 2019 9:54 PM This patch implements basic support for mdev driver that supports virtio transport for kernel virtio driver. Signed-off-by: Jason Wang --- include/linux/mdev.h

Re: [Intel-gfx] [PATCH 24/27] drm/i915: Remove struct_mutex guard for debugfs/opregion

2019-09-25 Thread Tvrtko Ursulin
On 25/09/2019 11:01, Chris Wilson wrote: Having a struct_mutex around the read of a BIOS blob serves no purpose. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_debugfs.c | 12 +--- 1 file changed, 1 insertion(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_deb

Re: [Intel-gfx] [PATCH 20/27] drm/i915: Remove logical HW ID

2019-09-25 Thread Chris Wilson
Quoting Tvrtko Ursulin (2019-09-25 13:41:10) > [+ Daniele, I think he might want to have a look at this.] > > On 25/09/2019 11:01, Chris Wilson wrote: > > With the introduction of ctx->engines[] we allow multiple logical > > contexts to be used on the same engine (e.g. with virtual engines). Each

Re: [Intel-gfx] [PATCH 25/27] drm/i915: Drop struct_mutex from suspend state save/restore

2019-09-25 Thread Tvrtko Ursulin
On 25/09/2019 11:01, Chris Wilson wrote: struct_mutex provides no serialisation of the registers and data structures being saved and restored across suspend/resume. It is completely superfluous here. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_suspend.c | 8 1 file ch

Re: [Intel-gfx] [PATCH 22/27] drm/i915/overlay: Drop struct_mutex guard

2019-09-25 Thread Chris Wilson
Quoting Tvrtko Ursulin (2019-09-25 13:43:46) > > On 25/09/2019 11:01, Chris Wilson wrote: > > The overlay uses the modeset mutex to control itself and only required > > the struct_mutex for requests, which is now obsolete. > > > > Signed-off-by: Chris Wilson > > --- > > drivers/gpu/drm/i915/di

Re: [Intel-gfx] [PATCH 26/27] drm/i915/selftests: Drop vestigal struct_mutex guards

2019-09-25 Thread Tvrtko Ursulin
On 25/09/2019 11:01, Chris Wilson wrote: We no longer need struct_mutex to serialise request emission, so remove it from the gt selftests. Signed-off-by: Chris Wilson --- .../gpu/drm/i915/gem/selftests/huge_pages.c | 15 +- .../drm/i915/gem/selftests/i915_gem_mman.c| 2 - .../drm/

Re: [Intel-gfx] [PATCH 27/27] drm/i915: Drop struct_mutex from around GEM initialisation

2019-09-25 Thread Tvrtko Ursulin
On 25/09/2019 11:01, Chris Wilson wrote: We no longer need to placate lockdep by holding struct_mutex for our initialisation, so don't. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gem/i915_gem_pm.c | 2 -- drivers/gpu/drm/i915/i915_gem.c | 9 - d

Re: [Intel-gfx] [PATCH 05/23] drm/i915: Complete sw/hw split

2019-09-25 Thread Ville Syrjälä
On Fri, Sep 20, 2019 at 01:42:17PM +0200, Maarten Lankhorst wrote: > Now that we separated everything into uapi and hw, it's > time to make the split definitive. Remove the union and > make a copy of the hw state on modeset and fastset. > > Color blobs are copied in crtc atomic_check(), right > be

Re: [Intel-gfx] [PATCH 22/27] drm/i915/overlay: Drop struct_mutex guard

2019-09-25 Thread Tvrtko Ursulin
On 25/09/2019 13:53, Chris Wilson wrote: Quoting Tvrtko Ursulin (2019-09-25 13:43:46) On 25/09/2019 11:01, Chris Wilson wrote: The overlay uses the modeset mutex to control itself and only required the struct_mutex for requests, which is now obsolete. Signed-off-by: Chris Wilson --- driv

Re: [Intel-gfx] [PATCH 09/23] drm/i915: Do not add all planes when checking scalers on glk+

2019-09-25 Thread Ville Syrjälä
On Tue, Sep 24, 2019 at 09:55:31PM -0700, Matt Roper wrote: > On Fri, Sep 20, 2019 at 01:42:21PM +0200, Maarten Lankhorst wrote: > > We cannot switch between HQ and normal mode on GLK+, so only > > add planes on platforms where it makes sense. > > > > We could probably restrict it even more to onl

[Intel-gfx] [PATCH] drm/i915/execlists: Simplify gen12_csb_parse

2019-09-25 Thread Chris Wilson
Having decided that we only care about the promotion predicate, we can simplify gen12_csb_parse to simply check whether we need to jump to a new queue. Signed-off-by: Chris Wilson Cc: Mika Kuoppala Cc: Daniele Ceraolo Spurio --- drivers/gpu/drm/i915/gt/intel_lrc.c | 8 +++- 1 file changed,

Re: [Intel-gfx] [PATCH 22/27] drm/i915/overlay: Drop struct_mutex guard

2019-09-25 Thread Chris Wilson
Quoting Tvrtko Ursulin (2019-09-25 14:01:51) > > On 25/09/2019 13:53, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2019-09-25 13:43:46) > >> > >> On 25/09/2019 11:01, Chris Wilson wrote: > >>> diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c > >>> b/drivers/gpu/drm/i915/gt/intel_reset.c > >>

Re: [Intel-gfx] [PATCH] drm/i915/execlists: Simplify gen12_csb_parse

2019-09-25 Thread Andi Shyti
Hi Chris, On Wed, Sep 25, 2019 at 02:08:45PM +0100, Chris Wilson wrote: > Having decided that we only care about the promotion predicate, we can > simplify gen12_csb_parse to simply check whether we need to jump to a > new queue. > > Signed-off-by: Chris Wilson > Cc: Mika Kuoppala > Cc: Daniele

Re: [Intel-gfx] [PATCH V2 6/8] mdev: introduce virtio device and its device ops

2019-09-25 Thread Michael S. Tsirkin
On Wed, Sep 25, 2019 at 08:45:21PM +0800, Jason Wang wrote: > > On 2019/9/25 下午5:09, Tian, Kevin wrote: > > > From: Jason Wang [mailto:jasow...@redhat.com] > > > Sent: Tuesday, September 24, 2019 9:54 PM > > > > > > This patch implements basic support for mdev driver that supports > > > virtio tr

[Intel-gfx] [PATCH i-g-t 1/2] i915_drm.h sync

2019-09-25 Thread Chris Wilson
Update to commit fef476f3ab47527a00818ddaf4b46b8c0936 (not upstream!) Author: Chris Wilson Date: Mon Aug 5 22:55:44 2019 +0100 drm/i915: Cancel non-persistent contexts on close for I915_CONTEXT_PARAM_PERSISTENCE --- include/drm-uapi/i915_drm.h | 22 -- 1 file chang

[Intel-gfx] [PATCH i-g-t 2/2] Add i915/gem_ctx_persistence

2019-09-25 Thread Chris Wilson
Sanity test existing persistence and new exciting non-persistent context behaviour. Signed-off-by: Chris Wilson Cc: Joonas Lahtinen Cc: Michał Winiarski Cc: Jon Bloomfield --- lib/i915/gem_context.c | 37 lib/i915/gem_context.h | 8 + lib/igt_dummyload.c

Re: [Intel-gfx] [PATCH 05/23] drm/i915: Complete sw/hw split

2019-09-25 Thread Maarten Lankhorst
Op 25-09-2019 om 15:01 schreef Ville Syrjälä: > On Fri, Sep 20, 2019 at 01:42:17PM +0200, Maarten Lankhorst wrote: >> Now that we separated everything into uapi and hw, it's >> time to make the split definitive. Remove the union and >> make a copy of the hw state on modeset and fastset. >> >> Color

Re: [Intel-gfx] [PATCH 07/23] drm/i915: Remove begin/finish_crtc_commit.

2019-09-25 Thread Maarten Lankhorst
Op 25-09-2019 om 06:17 schreef Matt Roper: > On Fri, Sep 20, 2019 at 01:42:19PM +0200, Maarten Lankhorst wrote: >> This can all be done from the intel_update_crtc function. Split out the >> pipe update into a separate function, just like is done for the planes. >> >> Signed-off-by: Maarten Lankhors

[Intel-gfx] [PATCH 2/3] drm/dp/mst: Handle arbitrary DP_LINK_BW values

2019-09-25 Thread Ville Syrjala
From: Ville Syrjälä Make drm_dp_get_vc_payload() tolerate arbitrary DP_LINK_BW_* values, just like drm_dp_bw_code_to_link_rate() does since commit 57a1b0893782 ("drm: Make the bw/link rate calculations more forgiving"). Cc: Lyude Paul Cc: Sean Paul Signed-off-by: Ville Syrjälä --- drivers/gp

[Intel-gfx] [PATCH 1/3] drm/dp/mst: Reduce nested ifs

2019-09-25 Thread Ville Syrjala
From: Ville Syrjälä Replace the nested ifs with a single if and a logical AND. Cc: Lyude Paul Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/drm_dp_mst_topology.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/

[Intel-gfx] [PATCH v3 0/4] drm/edid: Add new modes from CTA-861-G

2019-09-25 Thread Ville Syrjala
From: Ville Syrjälä Remainder of the new CTA-861-G modes. I already pushed the first patch adding the modes with VIC<128. I did improve the BUILD_BUG_ON()s in the last patch a bit to make it easier to visually double check the numbers against VIC comments in the mode arrays. Ville Syrjälä (4):

[Intel-gfx] [PATCH v3 2/4] drm/edid: Add CTA-861-G modes with VIC >= 193

2019-09-25 Thread Ville Syrjala
From: Ville Syrjälä Add a second table to the cea modes with VIC >= 193. Cc: Hans Verkuil Cc: Shashank Sharma Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/drm_edid.c | 151 - 1 file changed, 149 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/d

[Intel-gfx] [PATCH v3 3/4] drm/edid: Throw away the dummy VIC 0 cea mode

2019-09-25 Thread Ville Syrjala
From: Ville Syrjälä Now that the cea mode handling is not 100% tied to the single array the dummy VIC 0 mode is pretty much pointles. Throw it out. Cc: Hans Verkuil Cc: Shashank Sharma Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/drm_edid.c | 14 +- 1 file changed, 5 insertio

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