On Tue, Sep 03, 2019 at 04:37:30PM +0300, Jani Nikula wrote:
> The kernel has plenty of ternary operators to choose between constant
> strings, such as condition ? "yes" : "no", as well as value == 1 ? "" :
> "s":
>
> $ git grep '? "yes" : "no"' | wc -l
> 258
> $ git grep '? "on" : "off"' | wc -l
Chris Wilson writes:
> Icelake hit an issue where it missed reporting a completion event and
> instead jumped straight to a idle->active event (skipping over the
> active->idle and not even hitting the lite-restore preemption).
>
> 661497511us : process_csb: rcs0 cs-irq head=11, tail=0
> 66149751
On Tue, 03 Sep 2019, Shashank Sharma wrote:
> If the upscaling ratio is a complete integer, Intel display HW can
> pickup special scaling mode, which can produce better non-blurry
> outputs. This patch adds a check to indicate if this is such an upscaling
> opportunity, while calculating the scale
On 2019-09-03 at 22:22:26 +0530, Shashank Sharma wrote:
> If the upscaling ratio is a complete integer, Intel display HW can
> pickup special scaling mode, which can produce better non-blurry
> outputs. This patch adds a check to indicate if this is such an upscaling
> opportunity, while calculatin
== Series Details ==
Series: drm/i915: Fix corruption lines on the screen on Gen9 chromebooks
URL : https://patchwork.freedesktop.org/series/66196/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
DESCEND objtool
CHK include/gene
On 2019-09-03 at 22:22:27 +0530, Shashank Sharma wrote:
> Nearest-neighbor, is a new scaling mode, introduced in GEN11 display HW.
> Nearest-neighbor results in blurless outputs, when upscaling ratio is a
> complete integer ratio like:
>
> - upscaling from 1280x720(HD) to 3840x2160(UHD/4K)
> hor
On 03/09/2019 15.37, Jani Nikula wrote:
> While the main goal here is to abstract recurring patterns, and slightly
> clean up the code base by not open coding the ternary operators, there
> are also some space savings to be had via better string constant
> pooling.
Eh, no? The linker does that ac
/linux/commits/Gaurav-K-Singh/drm-i915-Fix-corruption-lines-on-the-screen-on-Gen9-chromebooks/20190904-151433
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-defconfig (attached as .config)
compiler: gcc-7 (Debian 7.4.0-11) 7.4.0
reproduce:
# save the attached .config
On Tue, 2019-09-03 at 17:49 +0200, Daniel Vetter wrote:
> On Tue, Sep 03, 2019 at 11:49:23AM +, Lisovskiy, Stanislav wrote:
> > On Tue, 2019-09-03 at 11:40 +0200, Daniel Vetter wrote:
> > >
> > > > > In fact I was wrong - when it worked, it was using exactly
> > > > > those
> > > > > patches :
On Gen9 chromebooks, we are seeing the screen shows several
large blue horizontal stripes over the top. Also, corruption happens
when we switch from a chrome browser tab to VT2 mode(by pressing Ctrl+Alt+F2)
and then back to chrome tab.
As per the display workaround #1200, FBC needs wait for vblank
On Gen9 chromebooks, we are seeing the screen shows several
large blue horizontal stripes over the top. Also, corruption happens
when we switch from a chrome browser tab to VT2 mode(by pressing Ctrl+Alt+F2)
and then back to chrome tab.
As per the display workaround #1200, FBC needs wait for vblank
== Series Details ==
Series: drm/i915: If the first pin in map_ggtt doesn't success, try again
URL : https://patchwork.freedesktop.org/series/66191/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6832_full -> Patchwork_14272_full
On Wed, Sep 04, 2019 at 08:36:46AM +, Lisovskiy, Stanislav wrote:
> On Tue, 2019-09-03 at 17:49 +0200, Daniel Vetter wrote:
> > On Tue, Sep 03, 2019 at 11:49:23AM +, Lisovskiy, Stanislav wrote:
> > > On Tue, 2019-09-03 at 11:40 +0200, Daniel Vetter wrote:
> > > >
> > > > > > In fact I was
On Wed, 04 Sep 2019, Swati Sharma wrote:
> In this patch series, added state checker to validate gamma
> (8BIT and 10BIT).This reads hardware state, and compares the originally
> requested state(s/w) to the state read from the hardware.
> This is done for legacy, ilk, glk and their variant platfor
== Series Details ==
Series: drm/i915: Fix corruption lines on the screen on Gen9 chromebooks (rev3)
URL : https://patchwork.freedesktop.org/series/66196/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
3e31641ea606 drm/i915: Fix corruption lines on the screen on Gen9 chromebooks
Yay! Thanks Jani.
Thanks and Regards,
Swati
-Original Message-
From: Jani Nikula
Sent: Wednesday, September 4, 2019 3:01 PM
To: Sharma, Swati2 ; intel-gfx@lists.freedesktop.org
Cc: Roper, Matthew D ; Vivi, Rodrigo
; Sharma, Shashank ; Manna,
Animesh ; Nautiyal, Ankit K
; daniel.vet.
This bit was fliped on for "syncing dependencies between camera and
graphics". BSpec has no recollection why, and it is causing
unrecoverable GPU hangs with Vulkan compute workloads.
From BSpec, setting bit5 to 0 enables relaxed padding requiremets for
buffers, 1D and 2D non-array, non-MSAA, non-m
On Wed, 2019-09-04 at 11:23 +0200, Daniel Vetter wrote:
>
> > Sure this will work, but still we need somehow to be able to
> > determine
> > this "if it's different" state. In your solution we just move that
> > comparison to drm_connector_update_edid_property, which is quite
> > fine
> > for me.
== Series Details ==
Series: drm/i915: Fix corruption lines on the screen on Gen9 chromebooks (rev3)
URL : https://patchwork.freedesktop.org/series/66196/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6833 -> Patchwork_14274
Hi,
On 8/30/2019 7:02 PM, Jani Nikula wrote:
On Fri, 30 Aug 2019, Animesh Manna wrote:
Gamma lut programming can be programmed using DSB
where bulk register programming can be done using indexed
register write which takes number of data and the mmio offset
to be written.
v1: Initial version.
On Mon, Aug 26, 2019 at 2:21 PM Abdiel Janulgue
wrote:
>
> Have i915 replace the core drm_gem_mmap implementation to overcome its
> limitation in having only a single mmap offset node per gem object.
> The change allows us to have multiple mmap offsets per object. This
> enables a mmapping instanc
On 9/4/2019 12:58 PM, Jani Nikula wrote:
On Tue, 03 Sep 2019, Shashank Sharma wrote:
If the upscaling ratio is a complete integer, Intel display HW can
pickup special scaling mode, which can produce better non-blurry
outputs. This patch adds a check to indicate if this is such an upscaling
opp
On 9/4/2019 1:08 PM, Ramalingam C wrote:
On 2019-09-03 at 22:22:26 +0530, Shashank Sharma wrote:
If the upscaling ratio is a complete integer, Intel display HW can
pickup special scaling mode, which can produce better non-blurry
outputs. This patch adds a check to indicate if this is such an up
On Wed, 04 Sep 2019, Rasmus Villemoes wrote:
> On 03/09/2019 15.37, Jani Nikula wrote:
>
>> While the main goal here is to abstract recurring patterns, and slightly
>> clean up the code base by not open coding the ternary operators, there
>> are also some space savings to be had via better string
== Series Details ==
Series: drm/i915: Restore relaxed padding (OCL_OOB_SUPPRES_ENABLE) for skl+
(rev2)
URL : https://patchwork.freedesktop.org/series/64920/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6833 -> Patchwork_14275
Chris Wilson writes:
> This bit was fliped on for "syncing dependencies between camera and
> graphics". BSpec has no recollection why, and it is causing
> unrecoverable GPU hangs with Vulkan compute workloads.
>
> From BSpec, setting bit5 to 0 enables relaxed padding requiremets for
> buffers, 1D
== Series Details ==
Series: drm/i915: Restore relaxed padding (OCL_OOB_SUPPRES_ENABLE) for skl+
(rev2)
URL : https://patchwork.freedesktop.org/series/64920/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6833_full -> Patchwork_14275_full
==
On Wed, Sep 04, 2019 at 08:32:09AM +0530, Sharma, Shashank wrote:
> Hello Ville,
>
> On 9/3/2019 10:50 PM, Ville Syrjälä wrote:
> > On Tue, Sep 03, 2019 at 10:22:25PM +0530, Shashank Sharma wrote:
> >> Blurry outputs during upscaling the buffer, is a generic problem of gfx
> >> industry. One of th
On Tue, Sep 03, 2019 at 07:21:33AM +0100, Chris Wilson wrote:
> If we make sure we grab a strong reference to each object as we dump it,
> we can reduce the locks outside of our iterators to an rcu_read_lock.
>
> This should prevent errors like:
> [ 2138.371911] BUG: KASAN: use-after-free in per_f
Hi,
[This is an automated email]
This commit has been processed because it contains a "Fixes:" tag,
fixing commit: 8424171e135c drm/i915/gen9: h/w w/a: syncing dependencies
between camera and graphics.
The bot has tested the following trees: v5.2.11, v4.19.69, v4.14.141, v4.9.190,
v4.4.190.
v
On 2019-09-03 3:06 p.m., Daniel Vetter wrote:
> It's the only flag anyone actually cares about. Plus if we're unlucky,
> the atomic ioctl might need a different flag for async flips. So
> better to abstract this away from the uapi a bit.
>
> Cc: Maarten Lankhorst
> Cc: Michel Dänzer
> Cc: Alex D
On Tue, 03 Sep 2019, Baolin Wang wrote:
> From: Chris Wilson
>
> If we skipped all the connectors that were not part of a tile, we would
> leave conn_seq=0 and conn_configured=0, convincing ourselves that we
> had stagnated in our configuration attempts. Avoid this situation by
> starting conn_se
Chris Wilson writes:
> If we make sure we grab a strong reference to each object as we dump it,
> we can reduce the locks outside of our iterators to an rcu_read_lock.
>
> This should prevent errors like:
> [ 2138.371911] BUG: KASAN: use-after-free in per_file_stats+0x43/0x380 [i915]
> [ 2138.371
On Tue, 09 Jul 2019, Matt Roper wrote:
> Convert the code that operates directly on gen11 combo PHY's to use the
> new namespace. Combo PHY registers are those named "ICL_PORT_*" plus
> ICL_DPHY_CHKN.
>
> Note that a lot of the PHY programming happens in the MIPI DSI code.
> For clarity I've adde
On Tue, Sep 03, 2019 at 08:10:18PM +, Souza, Jose wrote:
> On Tue, 2019-09-03 at 18:40 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > This reverts commit 4eaceea3a00f8e936a7f48dcd0c975a57f88930f.
> >
> > Several userspace clients (modesetting ddx and mutter+wayland at
> > least)
On Wed, Sep 04, 2019 at 12:45:35AM +, Souza, Jose wrote:
> On Tue, 2019-09-03 at 10:16 -0700, Matt Roper wrote:
> > On Thu, Aug 29, 2019 at 01:37:55PM +0300, Ville Syrjälä wrote:
> > > On Thu, Aug 29, 2019 at 02:25:50AM -0700, Lucas De Marchi wrote:
> > > > DP_TP_{CTL,STATUS} should only be pro
On Tue, Sep 3, 2019 at 9:21 PM Souza, Jose wrote:
>
> On Thu, 2019-08-29 at 08:50 +0200, Daniel Vetter wrote:
> > On Wed, Aug 28, 2019 at 08:31:27PM +, Souza, Jose wrote:
> > > On Wed, 2019-08-28 at 21:13 +0100, Chris Wilson wrote:
> > > > Quoting Souza, Jose (2019-08-28 21:11:53)
> > > > > Re
On Wed, Sep 4, 2019 at 4:29 PM Daniel Vetter wrote:
>
> On Tue, Sep 3, 2019 at 9:21 PM Souza, Jose wrote:
> >
> > On Thu, 2019-08-29 at 08:50 +0200, Daniel Vetter wrote:
> > > On Wed, Aug 28, 2019 at 08:31:27PM +, Souza, Jose wrote:
> > > > On Wed, 2019-08-28 at 21:13 +0100, Chris Wilson wrot
On Wed, Sep 04, 2019 at 04:42:49PM +0300, Jani Nikula wrote:
> On Tue, 09 Jul 2019, Matt Roper wrote:
> > Convert the code that operates directly on gen11 combo PHY's to use the
> > new namespace. Combo PHY registers are those named "ICL_PORT_*" plus
> > ICL_DPHY_CHKN.
> >
> > Note that a lot of
On 9/4/2019 5:56 PM, Ville Syrjälä wrote:
On Wed, Sep 04, 2019 at 08:32:09AM +0530, Sharma, Shashank wrote:
Hello Ville,
On 9/3/2019 10:50 PM, Ville Syrjälä wrote:
On Tue, Sep 03, 2019 at 10:22:25PM +0530, Shashank Sharma wrote:
Blurry outputs during upscaling the buffer, is a generic proble
On Tue, Sep 03, 2019 at 09:29:35PM -, Patchwork wrote:
> == Series Details ==
>
> Series: Revert "drm/i915: Fix DP-MST crtc_mask"
> URL : https://patchwork.freedesktop.org/series/66173/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_6828_full -> Patchwork_14266_fu
Jason: Are you alright with this?
Assuming you are I think we should merge it.
Thanks,
-Lionel
On 29/08/2019 08:26, Zhou, David(ChunMing) wrote:
v6 is fine to me as well, RB on it to go ahead.
Out of curious, why " [PATCH v11 01/10] " is on subject?
-David
-Original Message-
From:
From: Ville Syrjälä
Apparently some TVs suck and always overscan even when our infoframes
say that the image should be underscanned. Let's expose the (now
standard) margin properties to allow the user the compensate by
squishing the image down a bit via the panel fitter.
I've only implemented th
From: Ville Syrjälä
Some I915_READ_FW()s have snuck in where we don't hold the uncore lock.
Replace with the normal thing for now.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/g
From: Ville Syrjälä
Add a function to fill the AVI infoframe bar information from
the standard tv margin properties.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/drm_edid.c | 17 +
include/drm/drm_edid.h | 4
2 files changed, 21 insertions(+)
diff --git a/drivers
From: Ville Syrjälä
Make the PFIT_PIPE stuff less ugly via parametriziation.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_panel.c | 3 +--
drivers/gpu/drm/i915/i915_reg.h| 1 +
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i91
From: Ville Syrjälä
Make things a bit more abstract by replacing the pch_pfit.pos/size
raw register values with a drm_rect. Makes it slighly more convenient
to eg. compute the scaling factors.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 83 -
From: Ville Syrjälä
Most of the pfit functions are of the form:
func()
{
if (pfit_enabled) {
...
}
}
Flip the pfit_enabled check around to flatten the functions.
And while we're touching all this let's do the usual
s/pipe_config/crtc_state/ replacement.
Signed-
From: Ville Syrjälä
Fix skl_update_scaler_crtc() to deal with different scaling
modes correctly. The current implementation assumes
DRM_MODE_SCALE_FULLSCREEN. Fortunately we don't expose any
border properties currently so the code does actually end
up doing the right thing (assigning a scaler for
From: Ville Syrjälä
The panel fitter imposes extra limits on the maximum pipe source
size we can use. Check for that.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 56
1 file changed, 56 insertions(+)
diff --git a/drivers/gpu/drm/i915/dis
From: Ville Syrjälä
Make sure we're not exceeding the max scaling factors for the panel
fitter.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 46 +++-
1 file changed, 45 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/in
From: Ville Syrjälä
Follow the new naming convention and call the crtc state
"crtc_state", and while at it drop the redundant crtc argument.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/icl_dsi.c | 3 +-
drivers/gpu/drm/i915/display/intel_dp.c| 7 +-
drivers/gpu/drm/
From: Ville Syrjälä
Pass the entire connector state to intel_{gmch,pch}_panel_fitting().
For now we just need to get at .scaling_mode but in the future we'll
want access to the margin properties as well.
v2: Deal with intel_dp_ycbcr420_config()
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm
From: Ville Syrjälä
Transcoder hdisplay/vdisplay have documented minimum limits
when using the panel fitter. Enforce those limits.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 51 ++--
1 file changed, 47 insertions(+), 4 deletions(-)
diff --g
From: Ville Syrjälä
Change intel_{gmch,pch}_panel_fitting() to return a normal
error vs. success int. We'll need this later to validate that
the margin properties aren't misconfigured.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/icl_dsi.c | 10 +++---
drivers/gpu/drm/
From: Ville Syrjälä
As with HDMI let's can expose the margin properties for DP/LSPCON
on ilk+. I don't think DP has anything resembling the AVI infoframe
bar information so we don't have to worry about that part except
with LSPCON.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=29723
Sig
From: Ville Syrjälä
Expose the margin properties for DP MST as well. Only HSW+ to
worry about here, so nothing really to do but set up the
pfit appropriately.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=29723
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dp_mst
From: Ville Syrjälä
Add support for underscan by exposing the margin properties on
ilk+ HDMI ports. This can be useful with silly TVs that won't
let you disable overscanning.
We limit this to ilk+ only because the gmch style panel fitter
doesn't really have the flexibility we need.
Bugzilla: ht
On Wed, 04 Sep 2019, Matt Roper wrote:
> On Wed, Sep 04, 2019 at 04:42:49PM +0300, Jani Nikula wrote:
>> On Tue, 09 Jul 2019, Matt Roper wrote:
>> > Convert the code that operates directly on gen11 combo PHY's to use the
>> > new namespace. Combo PHY registers are those named "ICL_PORT_*" plus
>
== Series Details ==
Series: drm/i915: Expose margin connector properties for underscan
URL : https://patchwork.freedesktop.org/series/66225/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: drm/edid: Add drm_hdmi_avi_infoframe_bars()
Okay!
Commit: drm/
On Fri, Aug 30, 2019 at 01:50:53PM +0300, Joonas Lahtinen wrote:
> To ensure cross-driver locking compatibility, document the expected
> guidelines for implementing the GEM locking in i915. Note that this
> is a description of how things should end up after being reworked,
> and does not reflect th
== Series Details ==
Series: drm/i915: Expose margin connector properties for underscan
URL : https://patchwork.freedesktop.org/series/66225/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6835 -> Patchwork_14276
Summary
---
On Tue, Sep 03, 2019 at 02:55:26PM +0800, Baolin Wang wrote:
> From: Chris Wilson
>
> If we skipped all the connectors that were not part of a tile, we would
> leave conn_seq=0 and conn_configured=0, convincing ourselves that we
> had stagnated in our configuration attempts. Avoid this situation
On Wed, 2019-09-04 at 16:31 +0200, Daniel Vetter wrote:
> On Wed, Sep 4, 2019 at 4:29 PM Daniel Vetter wrote:
> > On Tue, Sep 3, 2019 at 9:21 PM Souza, Jose
> > wrote:
> > > On Thu, 2019-08-29 at 08:50 +0200, Daniel Vetter wrote:
> > > > On Wed, Aug 28, 2019 at 08:31:27PM +, Souza, Jose wrote
On Thu, Aug 22, 2019 at 06:21:23PM -, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Engine relative MMIO (rev7)
> URL : https://patchwork.freedesktop.org/series/57117/
> State : warning
>
> == Summary ==
>
> $ dim checkpatch origin/drm-tip
> 2eab059bc87e drm/i915: Engine re
On Thu, 2019-08-29 at 14:18 +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: disable set/get_tiling ioctl on gen12+ (rev2)
> URL : https://patchwork.freedesktop.org/series/65495/
> State : success
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_6750_full -> Patchwork
== Series Details ==
Series: drm/i915: Expose margin connector properties for underscan
URL : https://patchwork.freedesktop.org/series/66225/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6835_full -> Patchwork_14276_full
S
On Tue, 2019-09-03 at 10:55 -0700, Matt Roper wrote:
> On Thu, Aug 29, 2019 at 02:25:51AM -0700, Lucas De Marchi wrote:
> > Gen 12 onwards moves the DP_TP_* registers to be transcoder-based
> > rather
> > than port-based. This adds the new register addresses and changes
> > all
> > the callers to u
On Wed, 2019-09-04 at 20:44 +, Souza, Jose wrote:
> On Tue, 2019-09-03 at 10:55 -0700, Matt Roper wrote:
> > On Thu, Aug 29, 2019 at 02:25:51AM -0700, Lucas De Marchi wrote:
> > > Gen 12 onwards moves the DP_TP_* registers to be transcoder-based
> > > rather
> > > than port-based. This adds the
It was enabling and checking PSR interruptions in every transcoder
while it should keep the interruptions on the non-used transcoders
masked.
While doing this it gives us trouble on Tiger Lake if we are
reading/writing to registers of disabled transcoders since from gen12
onwards the registers are
From: Lucas De Marchi
SAGV is not currently working for Tiger Lake. We better disable it until
the implementation is stabilized and we can enable it.
HSDES: 1409542895 2208191909
Signed-off-by: Lucas De Marchi
Reviewed-by: José Roberto de Souza
---
drivers/gpu/drm/i915/intel_pm.c | 4
1
From: Lucas De Marchi
Add case for gen == 12 and add MISSING_CASE() for future gens. We were
already handling gen12 as the default, so this doesn't change the
current behavior.
BSpec: 19481 and 44980
Cc: CQ Tang
Signed-off-by: Lucas De Marchi
Reviewed-by: José Roberto de Souza
Reviewed-by: M
6 of 7 patches from https://patchwork.freedesktop.org/series/65982/
with Reviewed-by added and comments addressed.
Just missing a Reviewed-by on "drm/i915: protect access to DP_TP_* on
non-dp".
José Roberto de Souza (2):
drm/i915/psr: Only handle interruptions of the transcoder in use
drm/i915
From: Lucas De Marchi
DP_TP_{CTL,STATUS} should only be programmed when the encoder is intel_dp.
Checking its current usages intel_disable_ddi_buf() is the only
offender, with other places being protected by checks like
pipe_config->fec_enable that is only set by intel_dp.
v3 (José):
- Using int
For older gens PSR IIR and IMR have fixed addresses. From TGL onwards those
registers moved to each transcoder offset. The bits for the registers
are defined without an offset per transcoder as right now we have one
register per transcoder. So add a fake "trans_shift" when calculating
the bits offs
From: Lucas De Marchi
Gen 12 onwards moves the DP_TP_* registers to be transcoder-based rather
than port-based. This adds the new register addresses and changes all
the callers to use the register saved in intel_dp->regs.*. This is
filled out when preparing to enable the port so we take into acco
On Wed, Sep 04, 2019 at 02:34:16PM -0700, José Roberto de Souza wrote:
> From: Lucas De Marchi
>
> DP_TP_{CTL,STATUS} should only be programmed when the encoder is intel_dp.
> Checking its current usages intel_disable_ddi_buf() is the only
> offender, with other places being protected by checks l
== Series Details ==
Series: Tiger Lake batch 3.5 (rev2)
URL : https://patchwork.freedesktop.org/series/65982/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6837 -> Patchwork_14277
Summary
---
**SUCCESS**
No regre
== Series Details ==
Series: Tiger Lake batch 3.5 (rev2)
URL : https://patchwork.freedesktop.org/series/65982/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
ef543edfad30 drm/i915/psr: Only handle interruptions of the transcoder in use
-:250: CHECK:MACRO_ARG_REUSE: Macro argumen
WA 1409120013 is also valid for TGL, so lets check for ">= 11".
BSpec: 52890
Cc: Matt Roper
Cc: Clinton Taylor
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_fbc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display
Tiger Lake has up to 4 pipes so the mask would need to be 0xf instead of
0x7. Do not hardcode the mask so it allows the fake MST encoders to
connect to all pipes no matter how many the platform has.
Iterating over all pipes to keep consistent with intel_ddi_init().
Initialy this patch was replace
== Series Details ==
Series: series starting with [1/2] drm/i915: Apply FBC WA for TGL too
URL : https://patchwork.freedesktop.org/series/66240/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
7b29d0a6ab58 drm/i915: Apply FBC WA for TGL too
a39d2e414e37 drm/i915/mst: Do not hardc
On Wed, 2019-09-04 at 23:24 +, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [1/2] drm/i915: Apply FBC WA for TGL too
> URL : https://patchwork.freedesktop.org/series/66240/
> State : warning
>
> == Summary ==
>
> $ dim checkpatch origin/drm-tip
> 7b29d0a6ab58 dr
On Mon, 2019-09-02 at 21:08 +0300, Jani Nikula wrote:
> Abstract away direct access to ->num_pipes to allow further
> refactoring. No functional changes.
>
Reviewed-by: José Roberto de Souza
> Cc: Chris Wilson
> Cc: José Roberto de Souza
> Cc: Ville Syrjälä
> Signed-off-by: Jani Nikula
> --
== Series Details ==
Series: Tiger Lake batch 3.5 (rev2)
URL : https://patchwork.freedesktop.org/series/65982/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6837_full -> Patchwork_14277_full
Summary
---
**SUCCESS**
On Mon, 2019-09-02 at 21:08 +0300, Jani Nikula wrote:
> Replace device info number of pipes with a bit mask of available
> pipes. This will prove handy in the future. There's still a bunch of
> future work to do to actually allow a non-consecutive mask of pipes,
> but
> it's a start. No functional
== Series Details ==
Series: series starting with [1/2] drm/i915: Apply FBC WA for TGL too
URL : https://patchwork.freedesktop.org/series/66240/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6837 -> Patchwork_14278
Summary
On Mon, 2019-09-02 at 21:08 +0300, Jani Nikula wrote:
> Stop setting ->pipe_mask to zero when display is disabled, allowing
> us
> to have different code paths for not actually having display
> hardware,
> and having display hardware disabled. This lets us develop those two
> avenues independently.
On Mon, 2019-09-02 at 21:08 +0300, Jani Nikula wrote:
> Prepare for making a distinction between not having display and
> having
> disabled display. Add INTEL_DISPLAY_ENABLED() and use it where
> HAS_DISPLAY() is used. This is initially duplication, as disabling
> display still leads to ->pipe_mask
On Wed, 2019-09-04 at 23:35 +, Patchwork wrote:
> == Series Details ==
>
> Series: Tiger Lake batch 3.5 (rev2)
> URL : https://patchwork.freedesktop.org/series/65982/
> State : success
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_6837_full -> Patchwork_14277_full
> ==
On Wed, Sep 04, 2019 at 04:02:40PM -0700, José Roberto de Souza wrote:
> WA 1409120013 is also valid for TGL, so lets check for ">= 11".
>
> BSpec: 52890
>
> Cc: Matt Roper
> Cc: Clinton Taylor
> Signed-off-by: José Roberto de Souza
Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm/i915/disp
== Series Details ==
Series: series starting with [1/2] drm/i915: Apply FBC WA for TGL too
URL : https://patchwork.freedesktop.org/series/66240/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6837_full -> Patchwork_14278_full
ICL+ DSI outputs operate a bit differently than DP/HDMI/eDP and are more
closely tied to the PHY than to the DDI. Since we've separated PHY's
out into their own namespace it makes sense to operate on 'enum phy'
throughout most of the ICL DSI code rather than 'enum port' which we
generally use to r
== Series Details ==
Series: drm/i915: Convert ICL-style DSI to use phy namespace
URL : https://patchwork.freedesktop.org/series/66242/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6838 -> Patchwork_14279
Summary
---
== Series Details ==
Series: drm/i915: Convert ICL-style DSI to use phy namespace
URL : https://patchwork.freedesktop.org/series/66242/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6838_full -> Patchwork_14279_full
Summary
Hi,
I was able to get 5K HPz27q 317b monitor for some time. Below are the
observation on HPz27q Monitor with two DP cables connected to a KBL machine.
*General Observation*
The monitor settings has two modes, DP1.0 and DP1.2.
One of the connector is enumerated as 'tiled' and the other
On Mon, 2019-07-08 at 15:53 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Allow drivers to call drm_atomic_helper_check_modeset() without
> having the crtc helper funcs specified. i915 doesn't need those
> anymore.
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/drm_atomic_hel
On Mon, 2019-07-08 at 15:53 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> i915 doesn't use the crtc_state->plane_changed flag for anything,
> so setting it is pointless.
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_atomic.c | 7 ---
> 1 file changed,
On Mon, 2019-07-08 at 15:53 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> We need to insert stuff between the plane and crtc .atomic_check()
> drm_atomic_helper_check_planes() doesn't allow us to do that so
> stop using it and hand roll the loops instead.
>
> Signed-off-by: Ville Syrjälä
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