For the reusability of the enum transcoder and enum pipe in other driver
modules (like mei_hdcp), enum port definition is moved from I915 local
header intel_display.h to drm/i915_drm.h
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/display/intel_display.h | 44 ---
include/
Enabling the HDCP1.4 and 2.2 on TGL by supporting the HW block movement
from DDI into transcoder.
v6:
Extending the I915-MEI HDCP interface to include the transcoder.
For register programming, transcoder is used instead of PIPE. Just
readability improvement
pipe and transcoder defini
From Gen12 onwards, HDCP HW block is implemented within transcoders.
Till Gen11 HDCP HW block was part of DDI.
Hence required changes in HW programming is handled here.
As ME FW needs the transcoder detail on which HDCP is enabled
on Gen12+ platform, we are populating the detail in hdcp_port_data
ME FW takes the transcoder details for Gen12+ platforms, as HDCP HW
block is moved to transcoders.
hdcp_port_data is extended with enum transcoder. Payload structure is
modified and populated from the hdcp_port_data.
Signed-off-by: Ramalingam C
---
drivers/misc/mei/hdcp/mei_hdcp.c | 27 +++
Stuart Summers writes:
> Add a new function to allow each platform to set maximum
> slice, subslice, and EU information to reduce code duplication.
>
> Signed-off-by: Stuart Summers
Reviewed-by: Mika Kuoppala
> ---
> drivers/gpu/drm/i915/gt/intel_sseu.c | 8 +
> drivers/gpu/drm/i915
On Sat, Aug 17, 2019 at 12:42 AM Souza, Jose wrote:
> On Sat, 2019-06-29 at 17:39 +0200, Daniel Vetter wrote:
> > On Fri, Jun 28, 2019 at 7:24 PM Sean Paul wrote:
> > > On Fri, Jun 14, 2019 at 08:17:23AM +0200, Daniel Vetter wrote:
> > > > Only dynamic mode objects, i.e. those which are refcounte
On Fri 16-08-19 11:31:45, Jason Gunthorpe wrote:
> On Fri, Aug 16, 2019 at 02:26:25PM +0200, Michal Hocko wrote:
[...]
> > I believe I have given some examples when introducing __GFP_NOLOCKDEP.
>
> Okay, I think that is 7e7844226f10 ("lockdep: allow to disable reclaim
> lockup detection") Hmm, sad
In some special cases we must not block, but there's not a
spinlock, preempt-off, irqs-off or similar critical section already
that arms the might_sleep() debug checks. Add a non_block_start/end()
pair to annotate these.
This will be used in the oom paths of mmu-notifiers, where blocking is
not al
Hi all,
Here's the respin. Changes:
- 2 patches for checking return values of callbacks dropped, they landed
- move the lockdep annotations ahead, since I think that part is less
contentious. lockdep map now also annotates invalidate_range_end, as
requested by Jason.
- add a patch to prime
We need to make sure implementations don't cheat and don't have a
possible schedule/blocking point deeply burried where review can't
catch it.
I'm not sure whether this is the best way to make sure all the
might_sleep() callsites trigger, and it's a bit ugly in the code flow.
But it gets the job d
We want to teach lockdep that mmu notifiers can be called from direct
reclaim paths, since on many CI systems load might never reach that
level (e.g. when just running fuzzer or small functional tests).
Motivated by a discussion with Jason.
I've put the annotation into mmu_notifier_register since
This is a similar idea to the fs_reclaim fake lockdep lock. It's
fairly easy to provoke a specific notifier to be run on a specific
range: Just prep it, and then munmap() it.
A bit harder, but still doable, is to provoke the mmu notifiers for
all the various callchains that might lead to them. But
The trouble with having a plain nesting flag for locks which do not
naturally nest (unlike block devices and their partitions, which is
the original motivation for nesting levels) is that lockdep will
never spot a true deadlock if you screw up.
This patch is an attempt at trying better, by highlig
Necessary to annotate functions where we might acquire a
mutex_lock_nested() or similar. Needed by i915.
Signed-off-by: Daniel Vetter
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Will Deacon
Cc: linux-ker...@vger.kernel.org
---
include/linux/lockdep.h | 8
1 file changed, 8 insertions(+)
So strictly speaking the existing annotation is also ok, because we
have a chain of
obj->mm.lock#I915_MM_GET_PAGES -> fs_reclaim -> obj->mm.lock
(the shrinker cannot get at an object while we're in get_pages, hence
this is safe). But it's confusing, so try to take the right subclass
of the lock.
Currently, we remove the from per-file request list for throttling and
retirement under a dedicated spinlock, but insertion is governed by
struct_mutex. This needs to be the same lock so that the
retirement/insertion of neighbouring requests (at the tail) doesn't
break the list.
Signed-off-by: Chr
On Tue, 20 Aug 2019 at 09:26, Chris Wilson wrote:
>
> Currently, we remove the from per-file request list for throttling and
> retirement under a dedicated spinlock, but insertion is governed by
> struct_mutex. This needs to be the same lock so that the
> retirement/insertion of neighbouring reque
>
> For the reusability of the enum transcoder and enum pipe in other driver
> modules (like mei_hdcp), enum port definition is moved from I915 local header
> intel_display.h to drm/i915_drm.h
Don't you need to name space those definitions in the global space, I guess
there are a lot of 'pipe'
>
> ME FW takes the transcoder details for Gen12+ platforms, as HDCP HW block is
> moved to transcoders.
>
> hdcp_port_data is extended with enum transcoder. Payload structure is
> modified and populated from the hdcp_port_data.
>
> Signed-off-by: Ramalingam C
> ---
> drivers/misc/mei/hdcp/me
On 2019-08-20 at 14:14:03 +0530, Winkler, Tomas wrote:
>
>
> >
> > For the reusability of the enum transcoder and enum pipe in other driver
> > modules (like mei_hdcp), enum port definition is moved from I915 local
> > header
> > intel_display.h to drm/i915_drm.h
>
> Don't you need to name spa
On Tue, 20 Aug 2019, Daniel Vetter wrote:
> On Sat, Aug 17, 2019 at 12:42 AM Souza, Jose wrote:
>> On Sat, 2019-06-29 at 17:39 +0200, Daniel Vetter wrote:
>> > On Fri, Jun 28, 2019 at 7:24 PM Sean Paul wrote:
>> > > On Fri, Jun 14, 2019 at 08:17:23AM +0200, Daniel Vetter wrote:
>> > > > Only dyn
On Tue, Aug 20, 2019 at 11:28 AM Jani Nikula wrote:
>
> On Tue, 20 Aug 2019, Daniel Vetter wrote:
> > On Sat, Aug 17, 2019 at 12:42 AM Souza, Jose wrote:
> >> On Sat, 2019-06-29 at 17:39 +0200, Daniel Vetter wrote:
> >> > On Fri, Jun 28, 2019 at 7:24 PM Sean Paul wrote:
> >> > > On Fri, Jun 14,
== Series Details ==
Series: drm/i915: Enable HDCP 1.4 and 2.2 on Gen12+ (rev4)
URL : https://patchwork.freedesktop.org/series/63432/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a1edb75d36db drm/i915: enum transcoder and pipe are moved into i915_drm.h
4dade0c7f121 misc/mei_hd
Before we acquire the vma for GPU activity, ensure that the underlying
object is not already in the process of being freed.
Signed-off-by: Chris Wilson
Reviewed-by: Matthew Auld
---
drivers/gpu/drm/i915/i915_vma.c | 3 +--
drivers/gpu/drm/i915/i915_vma.h | 8
2 files changed, 9 inserti
Quoting Daniel Vetter (2019-08-20 09:19:49)
> +#include
> +
> #include "display/intel_frontbuffer.h"
> #include "gt/intel_gt.h"
> #include "i915_drv.h"
> @@ -51,6 +53,15 @@ void i915_gem_object_init(struct drm_i915_gem_object *obj,
> {
> mutex_init(&obj->mm.lock);
>
> + if (IS_
From: Daniele Ceraolo Spurio
The CSB format has been reworked for Gen12 to include information on
both the context we're switching away from and the context we're
switching to. After the change, some of the events don't have their
own bit anymore and need to be inferred from other values in the c
On 2019-08-20 at 14:15:47 +0530, Winkler, Tomas wrote:
>
> >
> > ME FW takes the transcoder details for Gen12+ platforms, as HDCP HW block is
> > moved to transcoders.
> >
> > hdcp_port_data is extended with enum transcoder. Payload structure is
> > modified and populated from the hdcp_port_data
From: Daniele Ceraolo Spurio
The CSB format has been reworked for Gen12 to include information on
both the context we're switching away from and the context we're
switching to. After the change, some of the events don't have their
own bit anymore and need to be inferred from other values in the c
== Series Details ==
Series: Tiger Lake batch 3 (rev3)
URL : https://patchwork.freedesktop.org/series/65290/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
58746e12b1f7 drm/i915/tgl: disable DDIC
372e74bfab57 drm/i915/tgl: add support for reading the timestamp frequency
90e823a2
Quoting Lucas De Marchi (2019-08-17 10:38:54)
> From: Michel Thierry
>
> Gen12 removes the target-cache and age fields from the private PAT
> because MOCS now have the capability to set these itself. Only memory-type
> field should be programmed in the ppat, the reminded bits are reserved.
>
> S
Quoting Lucas De Marchi (2019-08-17 10:38:48)
> From: Daniele Ceraolo Spurio
>
> Re-use Gen11 context size for now.
>
> [ Lucas: add HACK since this is a temporary patch that needs to be
> confirmed: we need to check BSpec 46255 and recompute ]
We can drop the HACK and just refer to this as a
== Series Details ==
Series: Tiger Lake batch 3 (rev3)
URL : https://patchwork.freedesktop.org/series/65290/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: drm/i915/tgl: disable DDIC
Okay!
Commit: drm/i915/tgl: add support for reading the timestamp fr
== Series Details ==
Series: Refactor to expand subslice mask (rev 2)
URL : https://patchwork.freedesktop.org/series/65437/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6741_full -> Patchwork_14089_full
Summary
---
Quoting Stuart Summers (2019-08-19 22:49:57)
> Add a new parameter, ss_stride, to the runtime info
> structure. This is used to mirror the userspace concept
> of subslice stride, which is a range of subslices per slice.
>
> This patch simply adds the definition and updates usage
> in the QUERY_TOP
Quoting Stuart Summers (2019-08-19 22:49:58)
> Add a new SSEU runtime parameter, eu_stride, which is
> used to mirror the userspace concept of a range of EUs
> per subslice.
>
> This patch simply adds the parameter and updates usage
> in the QUERY_TOPOLOGY_INFO handler.
>
> Signed-off-by: Stuart
Quoting Stuart Summers (2019-08-19 22:49:59)
> Add a new function to set a range of subslices for a
> specified slice based on a given mask.
>
> v2: Use local variable for subslice_mask on HSW and
> clean up a few other subslice_mask local variable
> changes
>
> Signed-off-by: Stuart Summ
Quoting Stuart Summers (2019-08-19 22:50:00)
> Add a new function to determine whether a particular slice
> has a given subslice.
>
> Signed-off-by: Stuart Summers
> ---
> drivers/gpu/drm/i915/gt/intel_sseu.h | 10 ++
> drivers/gpu/drm/i915/intel_device_info.c | 9 -
> 2 fil
In order to achieve improved power savings we can tune down CD clock frequency
for sub 4k resolutions. The maximum CD clock frequency for sub 4k
resolutions is set to 172.8 MHz.
Signed-off-by: Mika Kahola
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 26 +-
drivers/gpu/drm
== Series Details ==
Series: Refactor to expand subslice mask (rev 2)
URL : https://patchwork.freedesktop.org/series/65437/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6741_full -> Patchwork_14089_full
Summary
---
Quoting Daniele Ceraolo Spurio (2019-08-20 03:01:46)
> This is only required for a single platform so no need to reserve the
> memory on all of them.
>
> This removes the last direct dependency of i915_drv.h on i915_reg.h
> (apart from the i915_reg_t definition).
>
> v2: drop unneeded diff, keep
== Series Details ==
Series: mmu notifier debug annotations/checks
URL : https://patchwork.freedesktop.org/series/65465/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
e625d02db27d mm, notifier: Add a lockdep map for invalidate_range_start/end
-:129: WARNING:NO_AUTHOR_SIGN_OFF:
== Series Details ==
Series: Refactor to expand subslice mask (rev 2)
URL : https://patchwork.freedesktop.org/series/65435/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6741_full -> Patchwork_14088_full
Summary
---
Quoting Daniele Ceraolo Spurio (2019-08-20 03:01:47)
> With the introduction of display uncore, we want to categorize registers
> between display and non-display. To help us getting it right, it will
> be useful to move the display registers to a new file that can be used
> without including i915_r
== Series Details ==
Series: series starting with [1/3] drm/i915: Switch obj->mm.lock lockdep
annotations on its head
URL : https://patchwork.freedesktop.org/series/65467/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
ed358b6f33d9 drm/i915: Switch obj->mm.lock lockdep annotati
== Series Details ==
Series: drm/i915: Enable HDCP 1.4 and 2.2 on Gen12+ (rev4)
URL : https://patchwork.freedesktop.org/series/63432/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6743 -> Patchwork_14093
Summary
---
== Series Details ==
Series: Tiger Lake batch 3 (rev3)
URL : https://patchwork.freedesktop.org/series/65290/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6743 -> Patchwork_14094
Summary
---
**FAILURE**
Serious un
The dma-fence selftest uses an on-stack timer that requires explicit
annotation for debugobjects.
Signed-off-by: Chris Wilson
Cc: Daniel Vetter
---
drivers/dma-buf/st-dma-fence.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/dma-buf/st-dma-fence.c b/drivers/dma-b
== Series Details ==
Series: drm/i915/uc: define GuC and HuC FWs for EHL
URL : https://patchwork.freedesktop.org/series/65444/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6741_full -> Patchwork_14090_full
Summary
---
On Tue, 20 Aug 2019, Ramalingam C wrote:
> On 2019-08-20 at 14:14:03 +0530, Winkler, Tomas wrote:
>>
>>
>> >
>> > For the reusability of the enum transcoder and enum pipe in other driver
>> > modules (like mei_hdcp), enum port definition is moved from I915 local
>> > header
>> > intel_display.
== Series Details ==
Series: mmu notifier debug annotations/checks
URL : https://patchwork.freedesktop.org/series/65465/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6743 -> Patchwork_14095
Summary
---
**SUCCESS**
== Series Details ==
Series: Tiger Lake batch 3 (rev3)
URL : https://patchwork.freedesktop.org/series/65290/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6743 -> Patchwork_14094
Summary
---
**SUCCESS**
No regress
== Series Details ==
Series: series starting with [v2,1/2] drm/i915: Dynamically allocate s0ix
struct for VLV
URL : https://patchwork.freedesktop.org/series/65445/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6741_full -> Patchwork_14091_full
On 2019-08-20 at 15:30:53 +0300, Jani Nikula wrote:
> On Tue, 20 Aug 2019, Ramalingam C wrote:
> > On 2019-08-20 at 14:14:03 +0530, Winkler, Tomas wrote:
> >>
> >>
> >> >
> >> > For the reusability of the enum transcoder and enum pipe in other driver
> >> > modules (like mei_hdcp), enum port de
On 8/19/19 4:48 PM, Neil Armstrong wrote:
> Hi Dariusz, Hans,
>
> I can apply the dw-hdmi patches if necessary.
I'd appreciate it if you can do that.
Thanks,
Hans
>
> Neil
>
> On 19/08/2019 11:38, Hans Verkuil wrote:
>> Hi all,
>>
>> The patches in this series can be applied independ
Always put_filesystem() in i915_gemfs_init().
Signed-off-by: Sergey Senozhatsky
---
- v2: rebased (i915 does not remount gemfs anymore)
drivers/gpu/drm/i915/gem/i915_gemfs.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/gem/i915_gemfs.c
b/drivers/gpu/drm/i915/gem/i9
Modules, e.g. i915, can use exported get_fs_type(), but are
unable to put_filesystem(). Export it and let modules to
decrement file systems' reference counters.
Signed-off-by: Sergey Senozhatsky
---
fs/filesystems.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/fs/filesystems.c b/fs/filesy
On Tue, Aug 20, 2019 at 02:06:31PM +0300, Mika Kahola wrote:
> In order to achieve improved power savings we can tune down CD clock frequency
> for sub 4k resolutions. The maximum CD clock frequency for sub 4k
> resolutions is set to 172.8 MHz.
>
> Signed-off-by: Mika Kahola
> ---
> drivers/gpu/
On Fri, Aug 09, 2019 at 11:47:12AM +0300, Imre Deak wrote:
> On Fri, Aug 09, 2019 at 06:55:53AM +, Patchwork wrote:
> > == Series Details ==
> >
> > Series: drm/i915: Fix HW readout for crtc_clock in HDMI mode (rev2)
> > URL : https://patchwork.freedesktop.org/series/64909/
> > State : failu
On Tue, 2019-08-20 at 16:03 +0300, Ville Syrjälä wrote:
> On Tue, Aug 20, 2019 at 02:06:31PM +0300, Mika Kahola wrote:
> > In order to achieve improved power savings we can tune down CD
> > clock frequency
> > for sub 4k resolutions. The maximum CD clock frequency for sub 4k
> > resolutions is set
On Sat, Aug 17, 2019 at 02:58:45AM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Sanitize PHY state during display core uninit
> URL : https://patchwork.freedesktop.org/series/65298/
> State : success
Thanks for the review, pushed to -dinq.
>
> == Summary ==
>
> CI Bug
>-Original Message-
>From: Kahola, Mika
>Sent: Tuesday, August 20, 2019 4:37 PM
>To: intel-gfx@lists.freedesktop.org
>Cc: Shankar, Uma ; Kahola, Mika
>
>Subject: [PATCH] drm/i915/tgl: Lower cdclk for sub 4k resolutions
>
>In order to achieve improved power savings we can tune down CD cloc
Split struct declaration and array definition. Fix indents and
whitespace. No functional changes.
Cc: Ramalingam C
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 39 +++
1 file changed, 19 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/d
Split struct declaration and array definition. Fix indents and
whitespace. No functional changes.
Cc: Ramalingam C
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_dp.c | 70 +
1 file changed, 36 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/d
Everything seems to be all right, but shadowing is to be avoided.
Cc: Ramalingam C
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_dp.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/d
It's static const data, make it so.
Cc: Ramalingam C
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_dp.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 0d8
It's static const data, make it so.
Cc: Ramalingam C
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c
b/drivers/gpu/drm/i915/display/intel_hdmi.c
index d30c8314
On Tue, Aug 20, 2019 at 01:35:37PM +, Shankar, Uma wrote:
>
>
> >-Original Message-
> >From: Kahola, Mika
> >Sent: Tuesday, August 20, 2019 4:37 PM
> >To: intel-gfx@lists.freedesktop.org
> >Cc: Shankar, Uma ; Kahola, Mika
> >
> >Subject: [PATCH] drm/i915/tgl: Lower cdclk for sub 4k re
On Tue, Aug 20, 2019 at 01:22:00PM +, Kahola, Mika wrote:
> On Tue, 2019-08-20 at 16:03 +0300, Ville Syrjälä wrote:
> > On Tue, Aug 20, 2019 at 02:06:31PM +0300, Mika Kahola wrote:
> > > In order to achieve improved power savings we can tune down CD
> > > clock frequency
> > > for sub 4k resolu
On Tue, Aug 20, 2019 at 04:40:15PM +0300, Jani Nikula wrote:
> Split struct declaration and array definition. Fix indents and
> whitespace. No functional changes.
>
> Cc: Ramalingam C
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 70 +
>
Make sure that we wait for the vma to be pinned prior to telling the GPU
to fill the pages through that vma.
However, since our async operations fight over obj->resv->excl_fence we
must manually order them. This makes it much more fragile, and gives an
outside observer the chance to see the interm
Make sure that we wait for the vma to be pinned prior to telling the GPU
to fill the pages through that vma.
However, since our async operations fight over obj->resv->excl_fence we
must manually order them. This makes it much more fragile, and gives an
outside observer the chance to see the interm
On 2019-08-20 at 16:40:15 +0300, Jani Nikula wrote:
> Split struct declaration and array definition. Fix indents and
> whitespace. No functional changes.
>
Reviewed-by: Ramalingam C
-Ram
> Cc: Ramalingam C
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 70
On 2019-08-20 at 16:40:16 +0300, Jani Nikula wrote:
> Everything seems to be all right, but shadowing is to be avoided.
>
> Cc: Ramalingam C
> Signed-off-by: Jani Nikula
Reviewed-by: Ramalingam C
-Ram
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 8
> 1 file changed, 4 insertion
On 2019-08-20 at 16:40:17 +0300, Jani Nikula wrote:
> It's static const data, make it so.
>
> Cc: Ramalingam C
> Signed-off-by: Jani Nikula
Reviewed-by: Ramalingam C
-Ram
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 10 +-
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> d
On 2019-08-20 at 16:40:18 +0300, Jani Nikula wrote:
> Split struct declaration and array definition. Fix indents and
> whitespace. No functional changes.
>
> Cc: Ramalingam C
> Signed-off-by: Jani Nikula
Reviewed-by: Ramalingam C
-Ram
> ---
> drivers/gpu/drm/i915/display/intel_hdmi.c | 39 ++
On 2019-08-20 at 16:40:19 +0300, Jani Nikula wrote:
> It's static const data, make it so.
>
> Cc: Ramalingam C
> Signed-off-by: Jani Nikula
Reviewed-by: Ramalingam C
-Ram
> ---
> drivers/gpu/drm/i915/display/intel_hdmi.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git
The current assertion tries to make sure that we do not over count the
number of used PDE inside a page directory -- that is with an array of
512 pde, we do not expect more than 512 elements used! However, our
assertion has to take into account that as we pin an element into the
page directory, the
== Series Details ==
Series: series starting with [1/3] drm/i915: Switch obj->mm.lock lockdep
annotations on its head
URL : https://patchwork.freedesktop.org/series/65467/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6743 -> Patchwork_14096
==
== Series Details ==
Series: drm/i915: Serialize insertion into the file->mm.request_list
URL : https://patchwork.freedesktop.org/series/65468/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6743 -> Patchwork_14097
Summary
-
On Tue, 20 Aug 2019, Ville Syrjälä wrote:
> On Tue, Aug 20, 2019 at 04:40:15PM +0300, Jani Nikula wrote:
>> Split struct declaration and array definition. Fix indents and
>> whitespace. No functional changes.
>>
>> Cc: Ramalingam C
>> Signed-off-by: Jani Nikula
>> ---
>> drivers/gpu/drm/i915/d
Quoting Chris Wilson (2019-08-20 12:16:36)
> Quoting Daniele Ceraolo Spurio (2019-08-20 03:01:47)
> > With the introduction of display uncore, we want to categorize registers
> > between display and non-display. To help us getting it right, it will
> > be useful to move the display registers to a n
Chris Wilson writes:
> The current assertion tries to make sure that we do not over count the
> number of used PDE inside a page directory -- that is with an array of
> 512 pde, we do not expect more than 512 elements used! However, our
> assertion has to take into account that as we pin an eleme
The current assertion tries to make sure that we do not over count the
number of used PDE inside a page directory -- that is with an array of
512 pde, we do not expect more than 512 elements used! However, our
assertion has to take into account that as we pin an element into the
page directory, the
When under severe stress for GTT mappable space, the LRU eviction model
falls off a cliff. We spend all our time scanning the much large
non-mappable vma searching for something within the mappable zone we can
evict. Turn this on its head by only using the full vma if it is already
pinned in the ma
We can reduce the locking for fence registers from the dev->struct_mutex
to a local mutex. We could introduce a mutex for the sole purpose of
tracking the fence acquisition, except there is a little bit of overlap
with the fault tracking, so use the i915_ggtt.mutex as it covers both.
Signed-off-by
The premise here is to simply avoiding having to acquire the vm->mutex
inside vma create/destroy to update the vm->unbound_lists, to avoid some
nasty lock recursions later.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_stolen.c| 2 +-
drivers/gpu/drm/i915/i915_gem_gtt.c
Avoid calling i915_vma_put_fence() by using our alternate paths that
bind a secondary vma avoiding the original fenced vma. For the few
instances where we need to release the fence (i.e. on binding when the
GGTT range becomes invalid), replace the put_fence with a revoke_fence.
Signed-off-by: Chri
Since we want to revoke the ggtt vma from only under the ggtt->mutex, we
need to move protection of the userfault tracking from the struct_mutex
to the ggtt->mutex.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 10 +++---
drivers/gpu/drm/i915/i915_debugfs.c
Quoting Mika Kuoppala (2019-08-20 15:25:50)
> Chris Wilson writes:
>
> > The current assertion tries to make sure that we do not over count the
> > number of used PDE inside a page directory -- that is with an array of
> > 512 pde, we do not expect more than 512 elements used! However, our
> > as
On Wed, 14 Aug 2019, Animesh Manna wrote:
> Yes, have missed and local build also could not catch as maybe object
> files were present in that directory.
> Fixed the issue and latest trybot link -
> https://patchwork.freedesktop.org/series/65161/
I don't have the patches. I'm not subscribed to
We can't copy_*_user while holding reservations, that will (soon even
for nouveau) lead to deadlocks. And it breaks the cross-driver
contract around dma_resv.
Fix this by adding a slowpath for when we need relocations, and by
pushing the writeback of the new presumed offsets to the very end.
Asid
With nouveau fixed all ttm-using drives have the correct nesting of
mmap_sem vs dma_resv, and we can just lock the buffer.
Assuming I didn't screw up anything with my audit of course.
Signed-off-by: Daniel Vetter
Cc: Christian Koenig
Cc: Huang Rui
Cc: Gerd Hoffmann
Cc: "VMware Graphics"
Cc:
Hi all,
As part of all the recent discussions around ttm and dma_resv I started
looking into this. The goal (at least somewhen in the near future) is to
have it all documented and the cross-driver semantics locked down as much
as possible.
One of the biggest issues there is how the dma_resv ww_mu
Full audit of everyone:
- i915, radeon, amdgpu should be clean per their maintainers.
- vram helpers should be fine, they don't do command submission, so
really no business holding struct_mutex while doing copy_*_user. But
I haven't checked them all.
- panfrost seems to dma_resv_lock only in
Am 20.08.19 um 16:53 schrieb Daniel Vetter:
> Full audit of everyone:
>
> - i915, radeon, amdgpu should be clean per their maintainers.
>
> - vram helpers should be fine, they don't do command submission, so
>really no business holding struct_mutex while doing copy_*_user. But
>I haven't ch
Quoting Daniel Vetter (2019-08-20 15:53:34)
> Full audit of everyone:
>
> - i915, radeon, amdgpu should be clean per their maintainers.
>
> - vram helpers should be fine, they don't do command submission, so
> really no business holding struct_mutex while doing copy_*_user. But
> I haven't ch
== Series Details ==
Series: drm/i915: Be defensive when starting vma activity
URL : https://patchwork.freedesktop.org/series/65471/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6743 -> Patchwork_14098
Summary
---
*
>> >-Original Message-
>> >From: Kahola, Mika
>> >Sent: Tuesday, August 20, 2019 4:37 PM
>> >To: intel-gfx@lists.freedesktop.org
>> >Cc: Shankar, Uma ; Kahola, Mika
>> >
>> >Subject: [PATCH] drm/i915/tgl: Lower cdclk for sub 4k resolutions
>> >
>> >In order to achieve improved power saving
Am 20.08.19 um 16:53 schrieb Daniel Vetter:
> With nouveau fixed all ttm-using drives have the correct nesting of
> mmap_sem vs dma_resv, and we can just lock the buffer.
>
> Assuming I didn't screw up anything with my audit of course.
>
> Signed-off-by: Daniel Vetter
> Cc: Christian Koenig
> Cc:
On Tue, Aug 20, 2019 at 10:34:18AM -0300, Jason Gunthorpe wrote:
> On Tue, Aug 20, 2019 at 10:19:02AM +0200, Daniel Vetter wrote:
> > We need to make sure implementations don't cheat and don't have a
> > possible schedule/blocking point deeply burried where review can't
> > catch it.
> >
> > I'm n
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