On Wed, Aug 14, 2019 at 09:00:29PM -0300, Jason Gunthorpe wrote:
> On Wed, Aug 14, 2019 at 10:20:25PM +0200, Daniel Vetter wrote:
> > We need to make sure implementations don't cheat and don't have a
> > possible schedule/blocking point deeply burried where review can't
> > catch it.
> >
> > I'm n
On Wed, Aug 14, 2019 at 09:09:59PM -0300, Jason Gunthorpe wrote:
> On Wed, Aug 14, 2019 at 10:20:26PM +0200, Daniel Vetter wrote:
> > This is a similar idea to the fs_reclaim fake lockdep lock. It's
> > fairly easy to provoke a specific notifier to be run on a specific
> > range: Just prep it, and
On Wed, Aug 14, 2019 at 09:11:37PM -0300, Jason Gunthorpe wrote:
> On Wed, Aug 14, 2019 at 10:20:27PM +0200, Daniel Vetter wrote:
> > Similar to the warning in the mmu notifer, warning if an hmm mirror
> > callback gets it's blocking vs. nonblocking handling wrong, or if it
> > fails with anything
On Wed, Aug 14, 2019 at 07:57:57PM +0100, Chris Wilson wrote:
> Quoting Daniel Vetter (2019-08-14 19:49:41)
> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> > b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> > index d474c6ac4100..1ea3c3c96a5a 100644
> > --- a/drivers/gpu/drm
Quoting Daniel Vetter (2019-08-15 08:23:01)
> On Wed, Aug 14, 2019 at 07:57:57PM +0100, Chris Wilson wrote:
> > Quoting Daniel Vetter (2019-08-14 19:49:41)
> > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> > > b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> > > index d474c
Am 14.08.19 um 20:26 schrieb Chris Wilson:
> Quoting Chris Wilson (2019-08-14 19:24:01)
>> This reverts
>> 67c97fb79a7f ("dma-buf: add reservation_object_fences helper")
>> dd7a7d1ff2f1 ("drm/i915: use new reservation_object_fences helper")
>> 0e1d8083bddb ("dma-buf: further relax reservation_objec
== Series Details ==
Series: drm/i915: Replace PIN_NONFAULT with calls to PIN_NOEVICT
URL : https://patchwork.freedesktop.org/series/65222/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6711 -> Patchwork_14023
Summary
-
Hi Dave & Daniel -
One use after free fix for GVT.
It doesn't have a Link: tag because dim doesn't check that while
applying the pull, and, for some reason, it was also not checked when I
pushed out the branch. Possibly because it's in a merge? Anyway, I only
got the complaint when making the pu
When under severe stress for GTT mappable space, the LRU eviction model
falls off a cliff. We spend all our time scanning the much large
non-mappable vma searching for something within the mappable zone we can
evict. Turn this on its head by only using the full vma if it is already
pinned in the ma
On Wed, 29 May 2019, Swati Sharma wrote:
> In this patch series, added state checker to validate gamma
> and will be extended to validate degamma lut values aswell.
> This reads hardware state, and compares the originally
> requested state to the state read from hardware.
What happened to this pa
Add tile cache flushing for gen11. To relive us from the
burden of previous obsolete workarounds, make a dedicated
flush/invalidate callback for gen11.
To fortify an independent single flush, do post
sync op as there are indications that without it
we don't flush everything. This should also make
Flush according to what gen11 expects when writing
breadcrumbs. As only the seqnowrite + flush differs
between engine and gens, enclose the footer to
helper.
Cc: Chris Wilson
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 88 -
1 file changed,
On the set of invalidations, we need to add command
cache invalidate as a new domain.
Signed-off-by: Mika Kuoppala
Reviewed-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 1 +
drivers/gpu/drm/i915/gt/intel_lrc.c | 1 +
2 files changed, 2 insertions(+)
diff --git a
This macro doesn't work because the right shift has higher precedence
than bitwise AND.
Fixes: 9749a5b6c09f ("drm/i915/tgl: Fix the read of the DDI that transcoder is
attached to")
Signed-off-by: Dan Carpenter
---
drivers/gpu/drm/i915/i915_reg.h | 2 +-
1 file changed, 1 insertion(+), 1 deletio
On Sat, 16 Feb 2019, Ramalingam C via dri-devel
wrote:
> Implements the DP adaptation specific HDCP2.2 functions.
>
> These functions perform the DPCD read and write for communicating the
> HDCP2.2 auth message back and forth.
>
> v2:
> wait for cp_irq is merged with this patch. Rebased.
> v3:
On Wed 14-08-19 13:45:58, Andrew Morton wrote:
> On Wed, 14 Aug 2019 22:20:24 +0200 Daniel Vetter
> wrote:
>
> > In some special cases we must not block, but there's not a
> > spinlock, preempt-off, irqs-off or similar critical section already
> > that arms the might_sleep() debug checks. Add a
== Series Details ==
Series: series starting with [1/3] drm/i915/icl: Implement gen11 flush
including tile cache
URL : https://patchwork.freedesktop.org/series/65226/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
4241b319406b drm/i915/icl: Implement gen11 flush including tile
Hello Matthew Auld,
The patch 14d1b9a6247c: "drm/i915: buddy allocator" from Aug 9, 2019,
leads to the following static checker warning:
drivers/gpu/drm/i915/selftests/i915_buddy.c:670 igt_buddy_alloc_range()
error: we previously assumed 'block' could be null (see line 665)
drive
== Series Details ==
Series: drm/i915/tgl: Fix TGL_TRANS_DDI_FUNC_CTL_VAL_TO_PORT() macro
URL : https://patchwork.freedesktop.org/series/65227/
State : failure
== Summary ==
Applying: drm/i915/tgl: Fix TGL_TRANS_DDI_FUNC_CTL_VAL_TO_PORT() macro
Using index info to reconstruct a base tree...
M
== Series Details ==
Series: drm/i915: Replace PIN_NONFAULT with calls to PIN_NOEVICT (rev2)
URL : https://patchwork.freedesktop.org/series/65222/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6711 -> Patchwork_14024
Summar
Quoting Mika Kuoppala (2019-08-15 09:30:55)
> Flush according to what gen11 expects when writing
> breadcrumbs. As only the seqnowrite + flush differs
> between engine and gens, enclose the footer to
> helper.
>
> Cc: Chris Wilson
> Signed-off-by: Mika Kuoppala
> ---
> drivers/gpu/drm/i915/gt/i
On Thu, 15 Aug 2019, Dan Carpenter wrote:
> This macro doesn't work because the right shift has higher precedence
> than bitwise AND.
>
> Fixes: 9749a5b6c09f ("drm/i915/tgl: Fix the read of the DDI that transcoder
> is attached to")
> Signed-off-by: Dan Carpenter
Thanks, already fixed by 1cdd87
Quoting Mika Kuoppala (2019-08-15 09:30:53)
> Add tile cache flushing for gen11. To relive us from the
> burden of previous obsolete workarounds, make a dedicated
> flush/invalidate callback for gen11.
>
> To fortify an independent single flush, do post
> sync op as there are indications that with
== Series Details ==
Series: series starting with [1/3] drm/i915/icl: Implement gen11 flush
including tile cache
URL : https://patchwork.freedesktop.org/series/65226/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6711 -> Patchwork_14025
===
Looking around the GT initialisation, we have a few log messages we
think are interesting enough present to the user (such as the amount of L4
cache) and a few to inform them of the result of actions or conflicting
HW restrictions (i.e. quirks). These are device specific messages, so
use the dev fa
Am 14.08.19 um 22:07 schrieb Daniel Vetter:
> On Wed, Aug 14, 2019 at 07:26:44PM +0100, Chris Wilson wrote:
>> Quoting Chris Wilson (2019-08-14 19:24:01)
>>> This reverts
>>> 67c97fb79a7f ("dma-buf: add reservation_object_fences helper")
>>> dd7a7d1ff2f1 ("drm/i915: use new reservation_object_fence
Flush according to what gen11 expects when writing
breadcrumbs. As only the seqnowrite + flush differs
between engine and gens, enclose the footer to
helper.
v2: avoid problem of sane local naming by not using them
Cc: Chris Wilson
Signed-off-by: Mika Kuoppala
Reviewed-by: Chris Wilson
---
dr
== Series Details ==
Series: ttm
URL : https://patchwork.freedesktop.org/series/65194/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6709_full -> Patchwork_14015_full
Summary
---
**FAILURE**
Serious unknown change
On Thu, 15 Aug 2019 11:36:04 +0200, Chris Wilson
wrote:
Looking around the GT initialisation, we have a few log messages we
think are interesting enough present to the user (such as the amount of
L4
cache) and a few to inform them of the result of actions or conflicting
HW restrictions (i.
== Series Details ==
Series: drm/i915: Convert a few more bland dmesg info to be device specific
URL : https://patchwork.freedesktop.org/series/65253/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6711 -> Patchwork_14027
Su
Dan reported the following static checker warning:
drivers/gpu/drm/i915/selftests/i915_buddy.c:670 igt_buddy_alloc_range()
error: we previously assumed 'block' could be null (see line 665)
Reported-by: Dan Carpenter
Signed-off-by: Matthew Auld
Cc: Dan Carpenter
Cc: Chris Wilson
---
drivers/g
Am 07.08.19 um 01:15 schrieb Jason Gunthorpe:
From: Jason Gunthorpe
radeon is using a device global hash table to track what mmu_notifiers
have been registered on struct mm. This is better served with the new
get/put scheme instead.
radeon has a bug where it was not blocking notifier release()
On Tue, 30 Jul 2019 at 17:26, Daniel Vetter wrote:
>
> On Thu, Jun 27, 2019 at 09:55:59PM +0100, Matthew Auld wrote:
> > Support basic eviction for regions.
> >
> > Signed-off-by: Matthew Auld
> > Cc: Joonas Lahtinen
> > Cc: Abdiel Janulgue
>
> So from a very high level this looks like it was l
== Series Details ==
Series: dma-buf: Restore seqlock around dma_resv updates
URL : https://patchwork.freedesktop.org/series/65196/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6709_full -> Patchwork_14016_full
Summary
---
Quoting Matthew Auld (2019-08-15 11:32:10)
> Dan reported the following static checker warning:
>
> drivers/gpu/drm/i915/selftests/i915_buddy.c:670 igt_buddy_alloc_range()
> error: we previously assumed 'block' could be null (see line 665)
>
> Reported-by: Dan Carpenter
> Signed-off-by: Matthew
Chris Wilson writes:
> Since __i915_request_queue() may be called from hardirq (timer) context,
> we cannot use local_bh_disable/enable at the lower level. As we do want
> to kick the tasklet to speed up initial submission or preemption for
> normal client submission, lift it to the normal proces
On Thu, Aug 15, 2019 at 9:42 AM Jani Nikula wrote:
>
>
> Hi Dave & Daniel -
>
> One use after free fix for GVT.
>
> It doesn't have a Link: tag because dim doesn't check that while
> applying the pull, and, for some reason, it was also not checked when I
> pushed out the branch. Possibly because i
== Series Details ==
Series: series starting with [1/3] drm/i915/icl: Implement gen11 flush
including tile cache (rev2)
URL : https://patchwork.freedesktop.org/series/65226/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
258ad12f28aa drm/i915/icl: Implement gen11 flush includin
Quoting Mika Kuoppala (2019-08-15 12:35:37)
> Chris Wilson writes:
>
> > Since __i915_request_queue() may be called from hardirq (timer) context,
> > we cannot use local_bh_disable/enable at the lower level. As we do want
> > to kick the tasklet to speed up initial submission or preemption for
>
== Series Details ==
Series: series starting with [1/2] drm/i915: Comment userptr recursion on
struct_mutex (rev3)
URL : https://patchwork.freedesktop.org/series/65177/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6709_full -> Patchwork_14017_full
===
== Series Details ==
Series: series starting with [1/3] drm/i915/icl: Implement gen11 flush
including tile cache (rev2)
URL : https://patchwork.freedesktop.org/series/65226/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6711 -> Patchwork_14028
Chris Wilson writes:
> Quoting Mika Kuoppala (2019-08-15 12:35:37)
>> Chris Wilson writes:
>>
>> > Since __i915_request_queue() may be called from hardirq (timer) context,
>> > we cannot use local_bh_disable/enable at the lower level. As we do want
>> > to kick the tasklet to speed up initial s
== Series Details ==
Series: drm/i915/selftest/buddy: fixup igt_buddy_alloc_range
URL : https://patchwork.freedesktop.org/series/65256/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6711 -> Patchwork_14029
Summary
---
On Thu, Aug 15, 2019 at 3:04 PM Jason Gunthorpe wrote:
>
> On Thu, Aug 15, 2019 at 10:44:29AM +0200, Michal Hocko wrote:
>
> > As the oom reaper is the primary guarantee of the oom handling forward
> > progress it cannot be blocked on anything that might depend on blockable
> > memory allocations.
On Thu 15-08-19 09:23:44, Jason Gunthorpe wrote:
> On Thu, Aug 15, 2019 at 08:58:29AM +0200, Daniel Vetter wrote:
> > On Wed, Aug 14, 2019 at 08:58:05PM -0300, Jason Gunthorpe wrote:
> > > On Wed, Aug 14, 2019 at 10:20:24PM +0200, Daniel Vetter wrote:
> > > > In some special cases we must not block
On Thu, 15 Aug 2019, Chris Wilson wrote:
> Looking around the GT initialisation, we have a few log messages we
> think are interesting enough present to the user (such as the amount of L4
> cache) and a few to inform them of the result of actions or conflicting
> HW restrictions (i.e. quirks). The
On Thu 15-08-19 10:04:15, Jason Gunthorpe wrote:
> On Thu, Aug 15, 2019 at 10:44:29AM +0200, Michal Hocko wrote:
>
> > As the oom reaper is the primary guarantee of the oom handling forward
> > progress it cannot be blocked on anything that might depend on blockable
> > memory allocations. These a
As we give page directory pointer (lvl 3) structure
for pte insertion, we can fold both versions into
one function by teaching it to get pdp regardless
of top level.
Cc: Chris Wilson
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 84 -
1 file
Quoting Mika Kuoppala (2019-08-15 14:50:00)
> As we give page directory pointer (lvl 3) structure
> for pte insertion, we can fold both versions into
> one function by teaching it to get pdp regardless
> of top level.
>
> Cc: Chris Wilson
> Signed-off-by: Mika Kuoppala
> ---
> drivers/gpu/drm/i
On Thu, Aug 15, 2019 at 12:48 PM Matthew Auld
wrote:
>
> On Tue, 30 Jul 2019 at 17:26, Daniel Vetter wrote:
> >
> > On Thu, Jun 27, 2019 at 09:55:59PM +0100, Matthew Auld wrote:
> > > Support basic eviction for regions.
> > >
> > > Signed-off-by: Matthew Auld
> > > Cc: Joonas Lahtinen
> > > Cc:
On Thu, Aug 15, 2019 at 4:26 PM Daniel Vetter wrote:
> On Thu, Aug 15, 2019 at 12:48 PM Matthew Auld
> wrote:
> >
> > On Tue, 30 Jul 2019 at 17:26, Daniel Vetter wrote:
> > >
> > > On Thu, Jun 27, 2019 at 09:55:59PM +0100, Matthew Auld wrote:
> > > > Support basic eviction for regions.
> > > >
>
On Thu, Aug 15, 2019 at 4:38 PM Jason Gunthorpe wrote:
>
> On Thu, Aug 15, 2019 at 03:12:11PM +0200, Daniel Vetter wrote:
> > On Thu, Aug 15, 2019 at 3:04 PM Jason Gunthorpe wrote:
> > >
> > > On Thu, Aug 15, 2019 at 10:44:29AM +0200, Michal Hocko wrote:
> > >
> > > > As the oom reaper is the pri
> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Daniel Vetter
> Sent: Thursday, August 15, 2019 7:27 AM
> To: Matthew Auld
> Cc: Intel Graphics Development ; Auld,
> Matthew
> Subject: Re: [Intel-gfx] [PATCH v2 03/37] drm/i915/regio
Quoting Matthew Auld (2019-08-15 11:48:04)
> On Tue, 30 Jul 2019 at 17:26, Daniel Vetter wrote:
> >
> > On Thu, Jun 27, 2019 at 09:55:59PM +0100, Matthew Auld wrote:
> > > Support basic eviction for regions.
> > >
> > > Signed-off-by: Matthew Auld
> > > Cc: Joonas Lahtinen
> > > Cc: Abdiel Janul
On Thu 15-08-19 11:12:19, Jason Gunthorpe wrote:
> On Thu, Aug 15, 2019 at 03:21:27PM +0200, Michal Hocko wrote:
> > On Thu 15-08-19 09:23:44, Jason Gunthorpe wrote:
> > > On Thu, Aug 15, 2019 at 08:58:29AM +0200, Daniel Vetter wrote:
> > > > On Wed, Aug 14, 2019 at 08:58:05PM -0300, Jason Gunthorp
== Series Details ==
Series: drm/i915/gtt: Fold gen8 insertions into one
URL : https://patchwork.freedesktop.org/series/65258/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6712 -> Patchwork_14030
Summary
---
**SUCCE
On Thu, Aug 15, 2019 at 4:58 PM Tang, CQ wrote:
>
>
>
> > -Original Message-
> > From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
> > Of Daniel Vetter
> > Sent: Thursday, August 15, 2019 7:27 AM
> > To: Matthew Auld
> > Cc: Intel Graphics Development ; Auld,
> >
On Thu, Aug 15, 2019 at 5:26 PM Chris Wilson wrote:
>
> Quoting Matthew Auld (2019-08-15 11:48:04)
> > On Tue, 30 Jul 2019 at 17:26, Daniel Vetter wrote:
> > >
> > > On Thu, Jun 27, 2019 at 09:55:59PM +0100, Matthew Auld wrote:
> > > > Support basic eviction for regions.
> > > >
> > > > Signed-of
On Thu, Aug 15, 2019 at 5:10 PM Jason Gunthorpe wrote:
>
> On Thu, Aug 15, 2019 at 04:43:38PM +0200, Daniel Vetter wrote:
>
> > You have to wait for the gpu to finnish current processing in
> > invalidate_range_start. Otherwise there's no point to any of this
> > really. So the wait_event/dma_fenc
On Thu, Aug 15, 2019 at 12:10:28PM -0300, Jason Gunthorpe wrote:
> On Thu, Aug 15, 2019 at 04:43:38PM +0200, Daniel Vetter wrote:
>
> > You have to wait for the gpu to finnish current processing in
> > invalidate_range_start. Otherwise there's no point to any of this
> > really. So the wait_event/
Our pin mapping tables for ICP and MCC currently only list the standard
GPIO pins used for various output ports. Even through ICP's standard
pin usage only utilizes pins 1, 2, and 9-12, and MCC's standard pin
usage only uses pins 1, 2, and 9, these platforms do still have GPIO
registers to address
> -Original Message-
> From: Daniel Vetter [mailto:dan...@ffwll.ch]
> Sent: Thursday, August 15, 2019 9:21 AM
> To: Tang, CQ
> Cc: Matthew Auld ; Intel Graphics
> Development ; Auld, Matthew
>
> Subject: Re: [Intel-gfx] [PATCH v2 03/37] drm/i915/region: support basic
> eviction
>
> On
On Thu, Aug 15, 2019 at 01:56:31PM -0300, Jason Gunthorpe wrote:
> On Thu, Aug 15, 2019 at 06:00:41PM +0200, Michal Hocko wrote:
>
> > > AFAIK 'GFP_NOWAIT' is characterized by the lack of __GFP_FS and
> > > __GFP_DIRECT_RECLAIM..
> > >
> > > This matches the existing test in __need_fs_reclaim() -
From: Michał Winiarski
While we need to know WOPCM size to do this sanity check, it has more to
do with FW than with WOPCM. Let's move the check to fetch phase, it's
not like WOPCM is going to grow in the meantime.
v2: rebased
v3: use __intel_uc_fw_get_upload_size (Daniele)
Signed-off-by: Micha
More WOPCM fixes
Michal Wajdeczko (4):
drm/i915/wopcm: Check WOPCM layout separately from calculations
drm/i915/wopcm: Try to use already locked WOPCM layout
drm/i915/wopcm: Update error messages
drm/i915/wopmc: Fix SPDX tag location
Michał Winiarski (1):
drm/i915/uc: Move FW size sanit
Move SPDX tag to first line, and update year to 2019.
Signed-off-by: Michal Wajdeczko
Cc: Chris Wilson
---
drivers/gpu/drm/i915/intel_wopcm.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_wopcm.c
b/drivers/gpu/drm/i915/intel_wopcm.c
index 3
== Series Details ==
Series: drm/i915/gen11: Allow usage of all GPIO pins
URL : https://patchwork.freedesktop.org/series/65261/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6712 -> Patchwork_14031
Summary
---
**FAIL
All WOPCM error messages are device specific, so use
device specific error functions.
Signed-off-by: Michal Wajdeczko
Cc: Chris Wilson
---
drivers/gpu/drm/i915/intel_wopcm.c | 44 --
1 file changed, 24 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/i915
If WOPCM layout is already locked in HW we shouldn't continue
with our own partitioning as it could be likely different and
we will be unable to enforce it and fail. Instead we should try
to reuse what is already programmed, maybe there will be a fit.
This should enable us to reload driver with sl
We can do WOPCM partitioning using rough estimates and limits
and perform detailed check as separate step.
Signed-off-by: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
Cc: Chris Wilson
---
drivers/gpu/drm/i915/intel_wopcm.c | 105 -
1 file changed, 74 insertions(+), 3
We should not be skipping uc_fini_hw on finding GuC
is no longer running. There is plenty of hw and internal
state that can be cleaned up without having to communicate
with GuC.
v2: better to check if fw is available (Michal)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110943
Signed-of
On Thu, Aug 15, 2019 at 7:16 PM Jason Gunthorpe wrote:
>
> On Thu, Aug 15, 2019 at 12:32:38PM -0400, Jerome Glisse wrote:
> > On Thu, Aug 15, 2019 at 12:10:28PM -0300, Jason Gunthorpe wrote:
> > > On Thu, Aug 15, 2019 at 04:43:38PM +0200, Daniel Vetter wrote:
> > >
> > > > You have to wait for the
On Thu, Aug 15, 2019 at 07:21:47PM +0200, Daniel Vetter wrote:
> On Thu, Aug 15, 2019 at 7:16 PM Jason Gunthorpe wrote:
> >
> > On Thu, Aug 15, 2019 at 12:32:38PM -0400, Jerome Glisse wrote:
> > > On Thu, Aug 15, 2019 at 12:10:28PM -0300, Jason Gunthorpe wrote:
> > > > On Thu, Aug 15, 2019 at 04:4
On Thu, Aug 15, 2019 at 02:35:57PM -0300, Jason Gunthorpe wrote:
> On Thu, Aug 15, 2019 at 06:25:16PM +0200, Daniel Vetter wrote:
>
> > I'm not really well versed in the details of our userptr, but both
> > amdgpu and i915 wait for the gpu to complete from
> > invalidate_range_start. Jerome has at
On Thu, Jul 18, 2019 at 04:10:13PM +0300, Ville Syrjälä wrote:
> On Fri, Jul 12, 2019 at 06:09:40PM -0700, Lucas De Marchi wrote:
> > From: José Roberto de Souza
> >
> > Tiger Lake has up to 4 pipes so the mask would need to be 0xf instead of
> > 0x7. Do not hardcode the mask so it allows the fak
On Thu 15-08-19 13:56:31, Jason Gunthorpe wrote:
> On Thu, Aug 15, 2019 at 06:00:41PM +0200, Michal Hocko wrote:
>
> > > AFAIK 'GFP_NOWAIT' is characterized by the lack of __GFP_FS and
> > > __GFP_DIRECT_RECLAIM..
> > >
> > > This matches the existing test in __need_fs_reclaim() - so if you are
>
== Series Details ==
Series: More WOPCM fixes
URL : https://patchwork.freedesktop.org/series/65263/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6712 -> Patchwork_14032
Summary
---
**FAILURE**
Serious unknown cha
On Thu, Aug 15, 2019 at 07:42:07PM +0200, Michal Hocko wrote:
> On Thu 15-08-19 13:56:31, Jason Gunthorpe wrote:
> > On Thu, Aug 15, 2019 at 06:00:41PM +0200, Michal Hocko wrote:
> >
> > > > AFAIK 'GFP_NOWAIT' is characterized by the lack of __GFP_FS and
> > > > __GFP_DIRECT_RECLAIM..
> > > >
> >
== Series Details ==
Series: drm/i915/tgl: Enabling DSC on Pipe A for TGL
URL : https://patchwork.freedesktop.org/series/65216/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6710_full -> Patchwork_14019_full
Summary
---
Reviewed-by: Lyude Paul
On Wed, 2019-08-14 at 12:44 +0200, Dariusz Marcinkiewicz wrote:
> Pass the connector info to the CEC adapter. This makes it possible
> to associate the CEC adapter with the corresponding drm connector.
>
> Signed-off-by: Dariusz Marcinkiewicz
> Signed-off-by: Hans Verkui
In the recent snd merge of
ddf7cb83b0f4 ALSA: hda: Unexport a few more stuff
53eff75e5f4d ALSA: hda: Drop export of snd_hdac_bus_add/remove_device()
ee5f85d9290f ALSA: hda: Add codec on bus address table lately
f2dbe87c5ac1 ALSA: hda - Drop unsol event handler for Intel HDMI codecs
module unload
== Series Details ==
Series: drm/i915/uc: Fini hw even if GuC is not running (rev2)
URL : https://patchwork.freedesktop.org/series/65140/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6712 -> Patchwork_14033
Summary
---
On Wed, Aug 14, 2019 at 04:51:17PM -0700, Madhumitha Tolakanahalli Pradeep
wrote:
> Removing restriction on Pipe A as TigerLake onwards, all the pipes support
> DSC.
May be elaborate this commit message a little bit something like:
"On previous platforms, DSC was not supported on Pipe A while st
On Thu, Aug 15, 2019 at 03:01:59PM -0300, Jason Gunthorpe wrote:
> On Thu, Aug 15, 2019 at 01:39:22PM -0400, Jerome Glisse wrote:
> > On Thu, Aug 15, 2019 at 02:35:57PM -0300, Jason Gunthorpe wrote:
> > > On Thu, Aug 15, 2019 at 06:25:16PM +0200, Daniel Vetter wrote:
> > >
> > > > I'm not really w
On Wed, 14 Aug 2019 at 10:44, Chris Wilson wrote:
>
> Lift moving the timeline to/from the active_list on enter/exit in order
> to shorten the active tracking span in comparison to the existing
> pin/unpin.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Matthew Auld
___
== Series Details ==
Series: Revert "ALSA: hda - Drop unsol event handler for Intel HDMI codecs"
URL : https://patchwork.freedesktop.org/series/65267/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
d4ceec6bc210 Revert "ALSA: hda - Drop unsol event handler for Intel HDMI codecs"
== Series Details ==
Series: drm/i915/tgl: disable DDIC
URL : https://patchwork.freedesktop.org/series/65217/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6710_full -> Patchwork_14020_full
Summary
---
**SUCCESS**
Quoting Daniel Vetter (2019-08-14 18:20:53)
> On Sun, Aug 11, 2019 at 10:15:23AM +0100, Chris Wilson wrote:
> > Now that dma_fence_signal always takes the spinlock to flush the
> > cb_list, simply take the spinlock and call dma_fence_signal_locked() to
> > avoid code repetition.
> >
> > Suggested-
On Thu, Aug 15, 2019 at 8:46 PM Chris Wilson wrote:
> Quoting Daniel Vetter (2019-08-14 18:20:53)
> > On Sun, Aug 11, 2019 at 10:15:23AM +0100, Chris Wilson wrote:
> > > Now that dma_fence_signal always takes the spinlock to flush the
> > > cb_list, simply take the spinlock and call dma_fence_sign
On Thu, 2019-08-15 at 11:24 -0700, Manasi Navare wrote:
> On Wed, Aug 14, 2019 at 04:51:17PM -0700, Madhumitha Tolakanahalli
> Pradeep wrote:
> > Removing restriction on Pipe A as TigerLake onwards, all the pipes
> > support DSC.
>
> May be elaborate this commit message a little bit something like
On Thu, Aug 15, 2019 at 11:39:54AM -0700, Tolakanahalli Pradeep, Madhumitha
wrote:
> On Thu, 2019-08-15 at 11:24 -0700, Manasi Navare wrote:
> > On Wed, Aug 14, 2019 at 04:51:17PM -0700, Madhumitha Tolakanahalli
> > Pradeep wrote:
> > > Removing restriction on Pipe A as TigerLake onwards, all the
On Wed, 14 Aug 2019 at 10:27, Chris Wilson wrote:
>
> Convert the list manipulation of active to use spinlocks so that we can
active_list
> perform the updates from underneath a quick interrupt callback.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Matthew Auld
_
Quoting Daniel Vetter (2019-08-15 19:48:42)
> On Thu, Aug 15, 2019 at 8:46 PM Chris Wilson wrote:
> > Quoting Daniel Vetter (2019-08-14 18:20:53)
> > > On Sun, Aug 11, 2019 at 10:15:23AM +0100, Chris Wilson wrote:
> > > > Now that dma_fence_signal always takes the spinlock to flush the
> > > > cb_
== Series Details ==
Series: Revert "ALSA: hda - Drop unsol event handler for Intel HDMI codecs"
URL : https://patchwork.freedesktop.org/series/65267/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6712 -> Patchwork_14034
Su
On Thu 15-08-19 15:24:48, Jason Gunthorpe wrote:
> On Thu, Aug 15, 2019 at 07:42:07PM +0200, Michal Hocko wrote:
> > On Thu 15-08-19 13:56:31, Jason Gunthorpe wrote:
> > > On Thu, Aug 15, 2019 at 06:00:41PM +0200, Michal Hocko wrote:
> > >
> > > > > AFAIK 'GFP_NOWAIT' is characterized by the lack
Quoting Chris Wilson (2019-08-15 19:15:51)
> In the recent snd merge of
>
> ddf7cb83b0f4 ALSA: hda: Unexport a few more stuff
> 53eff75e5f4d ALSA: hda: Drop export of snd_hdac_bus_add/remove_device()
> ee5f85d9290f ALSA: hda: Add codec on bus address table lately
> f2dbe87c5ac1 ALSA: hda - Drop un
On Thu, 2019-08-15 at 11:53 -0700, Manasi Navare wrote:
> On Thu, Aug 15, 2019 at 11:39:54AM -0700, Tolakanahalli Pradeep,
> Madhumitha wrote:
> > On Thu, 2019-08-15 at 11:24 -0700, Manasi Navare wrote:
> > > On Wed, Aug 14, 2019 at 04:51:17PM -0700, Madhumitha
> > > Tolakanahalli
> > > Pradeep wro
On Wed, 14 Aug 2019 at 10:28, Chris Wilson wrote:
>
> In preparation for removing struct_mutex from around context retirement,
> we need to make timeline pinning safe. Since multiple engines/contexts
> can share a single timeline, it needs to be protected by a mutex.
>
> Signed-off-by: Chris Wilso
== Series Details ==
Series: series starting with [v5] dma-fence: Propagate errors to
dma-fence-array container (rev7)
URL : https://patchwork.freedesktop.org/series/65027/
State : failure
== Summary ==
Applying: dma-fence: Propagate errors to dma-fence-array container
Using index info to rec
Quoting Chris Wilson (2019-08-15 20:03:13)
> Quoting Daniel Vetter (2019-08-15 19:48:42)
> > On Thu, Aug 15, 2019 at 8:46 PM Chris Wilson
> > wrote:
> > > Quoting Daniel Vetter (2019-08-14 18:20:53)
> > > > On Sun, Aug 11, 2019 at 10:15:23AM +0100, Chris Wilson wrote:
> > > > > Now that dma_fence
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