On (08/08/19 18:22), Chris Wilson wrote:
[..]
> @@ -20,31 +20,18 @@ int i915_gemfs_init(struct drm_i915_private *i915)
> if (!type)
> return -ENODEV;
[..]
> + gemfs = kern_mount(type);
> + if (IS_ERR(gemfs))
> + return PTR_ERR(gemfs);
>
> i915->mm.gem
Quoting Sergey Senozhatsky (2019-08-12 08:11:48)
> On (08/08/19 18:22), Chris Wilson wrote:
> [..]
> > @@ -20,31 +20,18 @@ int i915_gemfs_init(struct drm_i915_private *i915)
> > if (!type)
> > return -ENODEV;
> [..]
> > + gemfs = kern_mount(type);
> > + if (IS_ERR(gemfs)
After successful uC initialization we are reporting GuC
firmware version and status of GuC submission and HuC.
Add HuC fw version to this report to make it complete,
but also skip all HuC info if HuC is not supported.
v2: squeeze to one line (Chris)
Signed-off-by: Michal Wajdeczko
Cc: Daniele Ce
Since execlista and the guc have diverged in their port tracking, we
cannot simply reuse the execlists cancellation code as it leads to
unbalanced reference counting. Use a local simpler routine for the guc.
Signed-off-by: Chris Wilson
Cc: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/gt/inte
Quoting Michal Wajdeczko (2019-08-12 08:39:49)
> After successful uC initialization we are reporting GuC
> firmware version and status of GuC submission and HuC.
> Add HuC fw version to this report to make it complete,
> but also skip all HuC info if HuC is not supported.
>
> v2: squeeze to one li
/commits/Dong-Yang/drm-i915-Remove-i915-ggtt-WA-since-GT-E/20190812-111840
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-randconfig-e003-201932 (attached as .config)
compiler: gcc-7 (Debian 7.4.0-10) 7.4.0
reproduce:
# save the attached .config to linux build
On 2019.08.09 17:16:18 +0100, Chris Wilson wrote:
> Quoting Mika Kuoppala (2019-08-09 17:12:20)
> > Chris Wilson writes:
> >
> > > As we are phasing out using the GEM context for internal clients that
> > > need to manipulate logical context state directly, remove the
> > > constructor for the GV
== Series Details ==
Series: Use -EIO code for GuC initialization failures (rev2)
URL : https://patchwork.freedesktop.org/series/65060/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6681 -> Patchwork_13979
Summary
---
Quoting Patchwork (2019-08-12 09:40:19)
> == Series Details ==
>
> Series: Use -EIO code for GuC initialization failures (rev2)
> URL : https://patchwork.freedesktop.org/series/65060/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_6681 -> Patchwork_13979
> ===
On Mon, 12 Aug 2019 10:40:19 +0200, Patchwork
wrote:
== Series Details ==
Series: Use -EIO code for GuC initialization failures (rev2)
URL : https://patchwork.freedesktop.org/series/65060/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6681 -> Patchwork_13979
On 8/9/2019 3:12 PM, Jani Nikula wrote:
On Mon, 01 Jul 2019, Animesh Manna wrote:
Display State Buffer (DSB) is hardware capability which allows
driver to batch submit HW programming.
As part of initial enablement common api created which currently used
to program gamma lut proramming.
Goin
On Sat, 10 Aug 2019 at 16:36, Chris Wilson wrote:
>
> Same as for the individual fences, we want to report the actual status
> of the fence when queried.
>
> Reported-by: Petri Latvala
> Signed-off-by: Chris Wilson
> Cc: Sumit Semwal
> Cc: Gustavo Padovan
> Cc: Petri Latvala
Reviewed-by: Matt
On Sun, Aug 11, 2019 at 04:45:09PM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/tgl: Fixing up list of PG3 power domains.
> URL : https://patchwork.freedesktop.org/series/65041/
> State : success
Thanks for the patches, on both the ICL and TGL one:
Reviewed-by: Imre Deak
Since execlista and the guc have diverged in their port tracking, we
cannot simply reuse the execlists cancellation code as it leads to
unbalanced reference counting. Use a local simpler routine for the guc.
Signed-off-by: Chris Wilson
Cc: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/gt/inte
Since we allow ourselves to use non-process context during parking, we
cannot allow ourselves to sleep and in particular cannot call
del_timer_sync() -- but we can use a plain del_timer().
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111375
Signed-off-by: Chris Wilson
---
drivers/gpu/d
For the guc, we need to keep the engine awake (and not parked) and not
just the gt. If we let the engine park, we disable the irq and stop
processing the tasklet, leaving state outstanding inside the tasklet.
The downside is, of course, we now have to wait until the tasklet is run
before we consid
If we only call process_csb() from the tasklet, though we lose the
ability to bypass ksoftirqd interrupt processing on direct submission paths,
we can push it out of the irq-off spinlock.
The penalty is that we then allow schedule_out to be called concurrently
with schedule_in requiring us to hand
When testing whether we prevent suppressing preemption, it helps to
avoid a time slice expiring prematurely.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=08
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/selftest_lrc.c | 5 -
1 file changed, 4 insertions(+), 1 deletion
Now that we can atomically acquire the engine wakeref, make use of it
when check whether the RING registers are idle.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/i
If the backend wishes to defer the wakeref parking, make it responsible
for unlocking the wakeref (i.e. bumping the counter). This allows it to
time the unlock much more carefully in case it happens to needs the
wakeref to be active during its deferral.
For instance, during engine parking we may c
Stop assuming we only get called with irqs-on for disarming the
breadcrumbs, and do a full save/restore spin_lock_irq.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_breadcrumbs.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/inte
Same as for the individual fences, we want to report the actual status
of the fence when queried.
Reported-by: Petri Latvala
Signed-off-by: Chris Wilson
Cc: Sumit Semwal
Cc: Gustavo Padovan
Cc: Petri Latvala
Reviewed-by: Matthew Auld
---
drivers/dma-buf/sync_file.c | 2 +-
1 file changed, 1
Chris Wilson writes:
> Since we allow ourselves to use non-process context during parking, we
> cannot allow ourselves to sleep and in particular cannot call
> del_timer_sync() -- but we can use a plain del_timer().
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111375
> Signed-off-by
Include 2019 in copyright years and start using SPDX tag.
Signed-off-by: Michal Wajdeczko
Cc: Joonas Lahtinen
Cc: Chris Wilson
---
drivers/gpu/drm/i915/gt/uc/intel_guc.c| 23 ++
drivers/gpu/drm/i915/gt/uc/intel_guc.h| 23 ++
drivers/gpu/drm/i915/
Quoting Mika Kuoppala (2019-08-12 10:27:16)
> Chris Wilson writes:
>
> > Since we allow ourselves to use non-process context during parking, we
> > cannot allow ourselves to sleep and in particular cannot call
> > del_timer_sync() -- but we can use a plain del_timer().
> >
> > Bugzilla: https://b
Quoting Michal Wajdeczko (2019-08-12 10:29:35)
> Include 2019 in copyright years and start using SPDX tag.
>
> Signed-off-by: Michal Wajdeczko
> Cc: Joonas Lahtinen
> Cc: Chris Wilson
> ---
> drivers/gpu/drm/i915/gt/uc/intel_guc.c| 23 ++
> drivers/gpu/drm/i915/gt/uc/in
Chris Wilson writes:
> When testing whether we prevent suppressing preemption, it helps to
> avoid a time slice expiring prematurely.
>
I did look the test and it does call schedule on it's own.
So what we want to do is to postpone the defacto schedule tick
provided by driver not to mess our ow
== Series Details ==
Series: drm/i915/guc: Use a local cancel_port_requests
URL : https://patchwork.freedesktop.org/series/65075/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6682 -> Patchwork_13980
Summary
---
**SU
Chris Wilson writes:
> Quoting Mika Kuoppala (2019-08-12 10:27:16)
>> Chris Wilson writes:
>>
>> > Since we allow ourselves to use non-process context during parking, we
>> > cannot allow ourselves to sleep and in particular cannot call
>> > del_timer_sync() -- but we can use a plain del_timer(
On Mon, 12 Aug 2019 11:36:22 +0200, Chris Wilson
wrote:
However, you did alternate between /* SPDX */ and // SPDX with no rhyme
or reason I could see.
https://elixir.bootlin.com/linux/latest/source/Documentation/process/license-rules.rst
"The SPDX license identifier in kernel files shall b
Quoting Michal Wajdeczko (2019-08-12 10:41:25)
> On Mon, 12 Aug 2019 11:36:22 +0200, Chris Wilson
> wrote:
>
> > However, you did alternate between /* SPDX */ and // SPDX with no rhyme
> > or reason I could see.
>
> https://elixir.bootlin.com/linux/latest/source/Documentation/process/license-r
Quoting Mika Kuoppala (2019-08-12 10:39:01)
> Chris Wilson writes:
>
> > When testing whether we prevent suppressing preemption, it helps to
> > avoid a time slice expiring prematurely.
> >
>
> I did look the test and it does call schedule on it's own.
>
> So what we want to do is to postpone t
Chris Wilson writes:
> Quoting Mika Kuoppala (2019-08-12 10:39:01)
>> Chris Wilson writes:
>>
>> > When testing whether we prevent suppressing preemption, it helps to
>> > avoid a time slice expiring prematurely.
>> >
>>
>> I did look the test and it does call schedule on it's own.
>>
>> So w
== Series Details ==
Series: series starting with [1/2] drm/i915: Extract GT powermanagement
interrupt handling (rev3)
URL : https://patchwork.freedesktop.org/series/65049/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
57317011ab7d drm/i915: Extract GT powermanagement interrup
Be a little more conservative in our ring measurement and exclude one
batch to leave room in case our user needs to wrap (where a request will
be expanded to cover the unused space at the end of the ring).
References: https://bugs.freedesktop.org/show_bug.cgi?id=111374
Signed-off-by: Chris Wilson
Quoting Chris Wilson (2019-08-12 10:10:43)
> For the guc, we need to keep the engine awake (and not parked) and not
> just the gt. If we let the engine park, we disable the irq and stop
> processing the tasklet, leaving state outstanding inside the tasklet.
>
> The downside is, of course, we now h
== Series Details ==
Series: series starting with [1/2] drm/i915: Extract GT powermanagement
interrupt handling (rev3)
URL : https://patchwork.freedesktop.org/series/65049/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6683 -> Patchwork_13981
=
== Series Details ==
Series: drm/i915/guc: Use a local cancel_port_requests
URL : https://patchwork.freedesktop.org/series/65075/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6682_full -> Patchwork_13980_full
Summary
-
If we only call process_csb() from the tasklet, though we lose the
ability to bypass ksoftirqd interrupt processing on direct submission paths,
we can push it out of the irq-off spinlock.
The penalty is that we then allow schedule_out to be called concurrently
with schedule_in requiring us to hand
Chris Wilson writes:
> Be a little more conservative in our ring measurement and exclude one
> batch to leave room in case our user needs to wrap (where a request will
> be expanded to cover the unused space at the end of the ring).
>
did read the wrapping part and that seems to be the case that
Chris Wilson writes:
> Now that we can atomically acquire the engine wakeref, make use of it
> when check whether the RING registers are idle.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
> ---
> drivers/gpu/drm/i915/gt/intel_engine_cs.c | 10 +++---
> 1 file changed, 3 ins
== Series Details ==
Series: dma-fence: Report the composite sync_file status
URL : https://patchwork.freedesktop.org/series/65081/
State : failure
== Summary ==
Applying: dma-fence: Report the composite sync_file status
Using index info to reconstruct a base tree...
M drivers/dma-buf/sy
== Series Details ==
Series: series starting with [1/8] drm/i915/execlists: Avoid sync calls during
park (rev2)
URL : https://patchwork.freedesktop.org/series/65080/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
aa05f673a683 drm/i915/execlists: Avoid sync calls during park
563
== Series Details ==
Series: series starting with [1/8] drm/i915/execlists: Avoid sync calls during
park (rev2)
URL : https://patchwork.freedesktop.org/series/65080/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915/execlists: Avoid sync calls d
Quoting Mika Kuoppala (2019-08-12 12:52:56)
> Chris Wilson writes:
>
> > Be a little more conservative in our ring measurement and exclude one
> > batch to leave room in case our user needs to wrap (where a request will
> > be expanded to cover the unused space at the end of the ring).
> >
>
> d
== Series Details ==
Series: drm/i915/uc: Update copyright and license
URL : https://patchwork.freedesktop.org/series/65083/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6685 -> Patchwork_13983
Summary
---
**SUCCESS
== Series Details ==
Series: series starting with [1/8] drm/i915/execlists: Avoid sync calls during
park (rev2)
URL : https://patchwork.freedesktop.org/series/65080/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6685 -> Patchwork_13984
Quoting Mika Kuoppala (2019-08-12 12:52:56)
> Chris Wilson writes:
>
> > Be a little more conservative in our ring measurement and exclude one
> > batch to leave room in case our user needs to wrap (where a request will
> > be expanded to cover the unused space at the end of the ring).
> >
>
> d
As we track when we put the GT device to sleep upon idling, we can use
that callback to sample the current rc6 counters and record the
timestamp for estimating samples after that point while asleep.
v2: Stick to using ktime_t
v3: Track user_wakerefs that interfere with the new
intel_gt_pm_wait_for
We use timeline->mutex to protect modifications to
context->active_count, and the associated enable/disable callbacks.
Due to complications with engine-pm barrier there is a path where we used
a "superlock" to provide serialised protect and so could not
unconditionally assert with lockdep that it w
Forgo the struct_mutex requirement for request retirement as we have
been transitioning over to only using the timeline->mutex for
controlling the lifetime of a request on that timeline.
Signed-off-by: Chris Wilson
---
.../gpu/drm/i915/gem/i915_gem_execbuffer.c| 183 ++
drive
In preparation for removing struct_mutex from around context retirement,
we need to make timeline pinning safe. Since multiple engines/contexts
can share a single timeline, it needs to be protected by a mutex.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_timeline.c | 27 +++
Convert the list manipulation of active to use spinlocks so that we can
perform the updates from underneath a quick interrupt callback.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_gt_types.h | 2 +-
drivers/gpu/drm/i915/gt/intel_reset.c| 10 --
drivers/gpu/drm/i915
Since execlista and the guc have diverged in their port tracking, we
cannot simply reuse the execlists cancellation code as it leads to
unbalanced reference counting. Use a local simpler routine for the guc.
Signed-off-by: Chris Wilson
Cc: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/gt/inte
Lift moving the timeline to/from the active_list on enter/exit in order
to shorten the active tracking span in comparison to the existing
pin/unpin.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_pm.c| 1 -
drivers/gpu/drm/i915/gt/intel_context.c | 2 +
drivers
If we only call process_csb() from the tasklet, though we lose the
ability to bypass ksoftirqd interrupt processing on direct submission
paths, we can push it out of the irq-off spinlock.
The penalty is that we then allow schedule_out to be called concurrently
with schedule_in requiring us to hand
With the introduction of ctx->engines[] we allow multiple logical
contexts to be used on the same engine (e.g. with virtual engines). Each
logical context requires a unique tag in order for context-switching to
occur correctly between them.
We only need to keep a unique tag for the active lifetime
Keep track of the GEM contexts underneath i915->gem.contexts and assign
them their own lock for the purposes of list management.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 108 +++---
drivers/gpu/drm/i915/gem/i915_gem_context.h
If the backend wishes to defer the wakeref parking, make it responsible
for unlocking the wakeref (i.e. bumping the counter). This allows it to
time the unlock much more carefully in case it happens to needs the
wakeref to be active during its deferral.
For instance, during engine parking we may c
We were using the last_fence to track the last request that used this
vma that might be interpreted by a fence register and forced ourselves
to wait for this request before modifying any fence register that
overlapped our vma. Due to requirement that we need to track any XY_BLT
command, linear or t
Remove the raw i915_active_request tracking in favour of the higher
level i915_active tracking for the sole purpose of making the lockless
transition easier in later patches.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/display/intel_overlay.c | 129 +--
drivers/gpu/drm/i
Keep the intel_context as being the primary state for i915_request, with
the GEM context a backpointer from the low level state for the rarer
cases we need client information. Our goal is to remove such references
to clients from the backend, and leave the HW submission agnostic to
client interface
On 7/31/2019 4:17 AM, José Roberto de Souza wrote:
According to PSR2_CTL definition on BSpec there is only one instance
of PSR2_CTL also ICL display overview state that PSR2 is only
supported in EDP transcoder, so now that is possible to have PSR in
any transcoder lets add this hardware restric
Move the active tracking for the frontbuffer operations out of the
i915_gem_object and into its own first class (refcounted) object. In the
process of detangling, we switch from low level request tracking to the
easier i915_active -- with the plan that this avoids any potential
atomic callbacks as
As every i915_active_request should be serialised by a dedicated lock,
i915_active consists of a tree of locks; one for each node. Markup up
the i915_active_request with what lock is supposed to be guarding it so
that we can verify that the serialised updated are indeed serialised.
Signed-off-by:
Stop assuming we only get called with irqs-on for disarming the
breadcrumbs, and do a full save/restore spin_lock_irq.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_breadcrumbs.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/inte
Instead of rummaging through the intel_context to peek at the GEM
context in the middle of request submission to decide whether to use
semaphores, store that information on the intel_context itself.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 52 +-
== Series Details ==
Series: Support mipi dsi video mode on TGL (rev3)
URL : https://patchwork.freedesktop.org/series/63058/
State : failure
== Summary ==
Applying: drm/i915/tgl/dsi: Program TRANS_VBLANK register
Using index info to reconstruct a base tree...
M drivers/gpu/drm/i915/displ
== Series Details ==
Series: series starting with [01/18] drm/i915/guc: Use a local
cancel_port_requests
URL : https://patchwork.freedesktop.org/series/65089/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
3d6da5baf737 drm/i915/guc: Use a local cancel_port_requests
1f0621c12a25
== Series Details ==
Series: series starting with [01/18] drm/i915/guc: Use a local
cancel_port_requests
URL : https://patchwork.freedesktop.org/series/65089/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915/guc: Use a local cancel_port_request
== Series Details ==
Series: series starting with [1/2] drm/i915: Extract GT powermanagement
interrupt handling (rev3)
URL : https://patchwork.freedesktop.org/series/65049/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6683_full -> Patchwork_13981_full
===
Chris Wilson writes:
> Quoting Mika Kuoppala (2019-08-12 12:52:56)
>> Chris Wilson writes:
>>
>> > Be a little more conservative in our ring measurement and exclude one
>> > batch to leave room in case our user needs to wrap (where a request will
>> > be expanded to cover the unused space at th
== Series Details ==
Series: series starting with [01/18] drm/i915/guc: Use a local
cancel_port_requests
URL : https://patchwork.freedesktop.org/series/65089/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6686 -> Patchwork_13986
===
Quoting Chris Wilson (2019-08-11 15:28:00)
> From: Andi Shyti
>
> i915_irq.c is large. It serves as the central dispatch and handler for
> all of our device interrupts. Pull out the GT pm interrupt handling
> (leaving the central dispatch) so that we can encapsulate the logic a
> little better.
>
Quoting Chris Wilson (2019-08-11 22:06:33)
> From: Andi Shyti
>
> i915_irq.c is large. It serves as the central dispatch and handler for
> all of our device interrupts. Lets break it up by pulling out the GT
> interrupt handlers.
>
> Based on a patch by Chris Wilson.
>
> Signed-off-by: Andi Shy
Am 10.08.19 um 17:34 schrieb Chris Wilson:
> Move the duplicated code within dma-fence.c into the header for wider
> reuse. In the process apply a small micro-optimisation to only prune the
> fence->cb_list once rather than use list_del on every entry.
>
> Signed-off-by: Chris Wilson
> Cc: Tvrtko
> -Original Message-
> From: Chris Wilson
> Sent: Friday, August 9, 2019 4:35 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Joonas Lahtinen ; Winiarski, Michal
> ; Bloomfield, Jon
> Subject: Re: [PATCH 5/5] drm/i915: Cancel non-persistent contexts on close
>
> Quoting Chris Wilson (2019
Quoting Koenig, Christian (2019-08-12 15:34:32)
> Am 10.08.19 um 17:34 schrieb Chris Wilson:
> > Move the duplicated code within dma-fence.c into the header for wider
> > reuse. In the process apply a small micro-optimisation to only prune the
> > fence->cb_list once rather than use list_del on eve
Am 12.08.19 um 16:43 schrieb Chris Wilson:
> Quoting Koenig, Christian (2019-08-12 15:34:32)
>> Am 10.08.19 um 17:34 schrieb Chris Wilson:
>>> Move the duplicated code within dma-fence.c into the header for wider
>>> reuse. In the process apply a small micro-optimisation to only prune the
>>> fence
Quoting Bloomfield, Jon (2019-08-12 15:39:33)
> > -Original Message-
> > From: Chris Wilson
> > Sent: Friday, August 9, 2019 4:35 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: Joonas Lahtinen ; Winiarski, Michal
> > ; Bloomfield, Jon
> > Subject: Re: [PATCH 5/5] drm/i915: Cancel non-
Quoting Koenig, Christian (2019-08-12 15:50:59)
> Am 12.08.19 um 16:43 schrieb Chris Wilson:
> > Quoting Koenig, Christian (2019-08-12 15:34:32)
> >> Am 10.08.19 um 17:34 schrieb Chris Wilson:
> >>> Move the duplicated code within dma-fence.c into the header for wider
> >>> reuse. In the process ap
Make sure we don't block while setting up the stress case before the
reset by only submitting less batches than would fill the ring.
References: https://bugs.freedesktop.org/show_bug.cgi?id=111379
Signed-off-by: Chris Wilson
---
tests/i915/gem_eio.c | 13 +
1 file changed, 9 insertio
-Wilson/drm-i915-execlists-Lift-process_csb-out-of-the-irq-off-spinlock/20190812-211057
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-defconfig (attached as .config)
compiler: gcc-7 (Debian 7.4.0-10) 7.4.0
reproduce:
# save the attached .config to linux build
On Mon, 12 Aug 2019 at 14:41, Chris Wilson wrote:
>
> Remove the raw i915_active_request tracking in favour of the higher
> level i915_active tracking for the sole purpose of making the lockless
> transition easier in later patches.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Matthew Auld
_
During release of the syncpt, we remove it from the list of syncpt and
the tree, but only if it is not already been removed. However, during
signaling, we first remove the syncpt from the list. So, if we
concurrently free and signal the syncpt, the free may decide that it is
not part of the tree an
On the set of invalidations, we need to add command
cache invalidate as a new domain.
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 1 +
drivers/gpu/drm/i915/gt/intel_lrc.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/in
Add tile cache flushing for gen11. To relive us from the
burden of previous obsolete workarounds, make a dedicated
flush/invalidate callback for gen11.
To fortify an independent single flush, do post
sync op as there are indications that without it
we don't flush everything. This should also make
Quoting Mika Kuoppala (2019-08-12 17:01:08)
> On the set of invalidations, we need to add command
> cache invalidate as a new domain.
Found the bit, left none the wiser, but just based on the invalidate
keyword it fits our mo.
> Signed-off-by: Mika Kuoppala
Reviewed-by: Chris Wilson
-Chris
___
== Series Details ==
Series: dma-buf/sw_sync: Synchronize signal vs syncpt free
URL : https://patchwork.freedesktop.org/series/65092/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
857ced2942e5 dma-buf/sw_sync: Synchronize signal vs syncpt free
-:22: WARNING:COMMIT_LOG_LONG_LINE
+Vandita
On Thu, Jul 25, 2019 at 4:57 PM Lucas De Marchi
wrote:
>
> Mostly the same patches as https://patchwork.freedesktop.org/series/63670/.
> Rebased.
>
> Lucas De Marchi (2):
> drm/i915/tgl: re-indent code to prepare for DKL changes
> drm/i915/tgl: start adding the DKL PLLs to use on TC
Quoting Mika Kuoppala (2019-08-12 17:01:07)
> Add tile cache flushing for gen11. To relive us from the
> burden of previous obsolete workarounds, make a dedicated
> flush/invalidate callback for gen11.
>
> To fortify an independent single flush, do post
> sync op as there are indications that with
On Tue, Jul 30, 2019 at 6:22 PM Daniel Vetter wrote:
> On Tue, Jul 30, 2019 at 03:28:11PM +0100, Matthew Auld wrote:
> > On 30/07/2019 10:49, Daniel Vetter wrote:
> > > On Thu, Jun 27, 2019 at 09:56:25PM +0100, Matthew Auld wrote:
> > > > From: Abdiel Janulgue
> > > >
> > > > Add a new CPU mmap i
== Series Details ==
Series: series starting with [1/2] drm/i915/icl: Implement gen11 flush
including tile cache
URL : https://patchwork.freedesktop.org/series/65094/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
34ef48906b2c drm/i915/icl: Implement gen11 flush including tile
== Series Details ==
Series: dma-buf/sw_sync: Synchronize signal vs syncpt free
URL : https://patchwork.freedesktop.org/series/65092/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6687 -> Patchwork_13987
Summary
---
Am 12.08.19 um 17:42 schrieb Chris Wilson:
> During release of the syncpt, we remove it from the list of syncpt and
> the tree, but only if it is not already been removed. However, during
> signaling, we first remove the syncpt from the list. So, if we
> concurrently free and signal the syncpt, the
== Series Details ==
Series: series starting with [1/2] drm/i915/icl: Implement gen11 flush
including tile cache
URL : https://patchwork.freedesktop.org/series/65094/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6687 -> Patchwork_13988
===
Remove the raw i915_active_request tracking in favour of the higher
level i915_active tracking for the sole purpose of making the lockless
transition easier in later patches.
Signed-off-by: Chris Wilson
Reviewed-by: Matthew Auld
---
drivers/gpu/drm/i915/display/intel_overlay.c | 129 +--
We were using the last_fence to track the last request that used this
vma that might be interpreted by a fence register and forced ourselves
to wait for this request before modifying any fence register that
overlapped our vma. Due to requirement that we need to track any XY_BLT
command, linear or t
On Mon, 2019-08-12 at 19:20 +0530, Gupta, Anshuman wrote:
>
> On 7/31/2019 4:17 AM, José Roberto de Souza wrote:
> > According to PSR2_CTL definition on BSpec there is only one
> > instance
> > of PSR2_CTL also ICL display overview state that PSR2 is only
> > supported in EDP transcoder, so now th
In this case we want to apply the mask and then shift so the
parentheses is needed.
SPANK! SPANK! SPANK! Naughty programmer!
Fixes: 9749a5b6c09f ("drm/i915/tgl: Fix the read of the DDI that transcoder is
attached to")
Cc: Lucas De Marchi
Cc: Chris Wilson
Signed-off-by: José Roberto de Souza
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