On Tue, Jul 02, 2019 at 09:42:02PM +0200, Maarten Lankhorst wrote:
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 10 --
> 1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i
== Series Details ==
Series: drm/i915/gem: Free pages before rcu-freeing the object (rev2)
URL : https://patchwork.freedesktop.org/series/63042/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6394_full -> Patchwork_13484_full
On Tue, Jul 02, 2019 at 09:42:04PM +0200, Maarten Lankhorst wrote:
> When the clock is higher than the dotclock, try with 2 pipes enabled.
> If we can enable 2, then we will go into big joiner mode, and steal
> the adjacent crtc.
>
> This only links the planes in software, no hardware programming
== Series Details ==
Series: drm/i915/guc: Remove preemption support for current fw (rev2)
URL : https://patchwork.freedesktop.org/series/56767/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6394_full -> Patchwork_13485_full
== Series Details ==
Series: Support mipi dsi video mode on TGL
URL : https://patchwork.freedesktop.org/series/63058/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6394_full -> Patchwork_13486_full
Summary
---
**SUCC
From: John Harrison
Follow up patch to earlier whitelist updates. This series adds some
extra sanity checking to the driver and improves the self-test.
John Harrison (2):
drm/i915: Add test for invalid flag bits in whitelist entries
drm/i915: Implement read-only support in whitelist selftest
From: John Harrison
As per review feedback by Tvrtko, added a check that no invalid bits
are being set in the whitelist flags fields.
Also updated the read/write access definitions to make it clearer that
they are an enum field not a set of single bit flags.
Signed-off-by: John Harrison
CC: Tv
From: John Harrison
Newer hardware supports extra feature in the whitelist registers. This
patch updates the selftest to test that entries marked as read only
are actually read only.
Signed-off-by: John Harrison
CC: Tvrtko Ursulin
---
.../gpu/drm/i915/gt/selftest_workarounds.c| 43 +++
Patches sent.
I haven't made any changes to dmesg output as I'm not sure what you mean.
Ah, do you mean the debug print in wa_init_finish()? Sure, I can add the
engine name to that.
John.
On 6/25/2019 01:33, Tvrtko Ursulin wrote:
Ping.
We agreed to follow up with a test ASAP after mergin
== Series Details ==
Series: Improve whitelist selftest for read-only registers
URL : https://patchwork.freedesktop.org/series/63102/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6398 -> Patchwork_13499
Summary
---
== Series Details ==
Series: drm/i915: Report if i915_active is still busy upon waiting
URL : https://patchwork.freedesktop.org/series/63062/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6394_full -> Patchwork_13487_full
S
== Series Details ==
Series: More mmio and intel_gt cleanups and refactorings (rev2)
URL : https://patchwork.freedesktop.org/series/63063/
State : failure
== Summary ==
Patch format detection failed.
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