[Intel-gfx] [PATCH 03/22] drm/i915: Skip shrinking already freed pages

2019-06-17 Thread Chris Wilson
Previously, we want to shrink the pages of freed objects before they were RCU collected. However, by removing the struct_mutex serialisation around the active reference, we need to acquire an extra reference around the wait. Unfortunately this means that we have to skip objects that are waiting RCU

[Intel-gfx] [PATCH 18/22] drm/i915: Forgo last_fence active request tracking

2019-06-17 Thread Chris Wilson
We were using the last_fence to track the last request that used this vma that might be interpreted by a fence register and forced ourselves to wait for this request before modifying any fence register that overlapped our vma. Due to requirement that we need to track any XY_BLT command, linear or t

[Intel-gfx] [PATCH 09/22] drm/i915: Make the semaphore saturation mask global

2019-06-17 Thread Chris Wilson
The idea behind keeping the saturation mask local to a context backfired spectacularly. The premise with the local mask was that we would be more proactive in attempting to use semaphores after each time the context idled, and that all new contexts would attempt to use semaphores ignoring the curre

[Intel-gfx] [PATCH 14/22] drm/i915: Throw away the active object retirement complexity

2019-06-17 Thread Chris Wilson
Remove the accumulated optimisations that we have for i915_vma_retire and reduce it to the bare essential of tracking the active object reference. This allows us to only use atomic operations, and so will be able to avoid the struct_mutex requirement. The principal loss here is the shrinker MRU bu

[Intel-gfx] [PATCH 10/22] dma-fence: Propagate errors to dma-fence-array container

2019-06-17 Thread Chris Wilson
When one of the array of fences is signaled, propagate its errors to the parent fence-array (keeping the first error to be raised). v2: Opencode cmpxchg_local to avoid compiler freakout. Signed-off-by: Chris Wilson Cc: Sumit Semwal Cc: Gustavo Padovan --- drivers/dma-buf/dma-fence-array.c | 1

[Intel-gfx] [PATCH 15/22] drm/i915: Provide an i915_active.acquire callback

2019-06-17 Thread Chris Wilson
If we introduce a callback for i915_active that is only called the first time we use the i915_active and is symmetrically paired with the i915_active.retire callback, we can replace the open-coded and non-atomic implementations -- which will be very fragile (i.e. broken) upon removing the struct_mu

[Intel-gfx] [PATCH 12/22] dma-fence: Refactor signaling for manual invocation

2019-06-17 Thread Chris Wilson
Move the duplicated code within dma-fence.c into the header for wider reuse. In the process apply a small micro-optimisation to only prune the fence->cb_list once rather than use list_del on every entry. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- drivers/dma-buf/Makefile

[Intel-gfx] [PATCH 08/22] drm/i915/execlists: Force preemption

2019-06-17 Thread Chris Wilson
If the preempted context takes too long to relinquish control, e.g. it is stuck inside a shader with arbitration disabled, evict that context with an engine reset. This ensures that preemptions are reasonably responsive, providing a tighter QoS for the more important context at the cost of flagging

[Intel-gfx] [PATCH 11/22] dma-fence: Report the composite sync_file status

2019-06-17 Thread Chris Wilson
Same as for the individual fences, we want to report the actual status of the fence when queried. Reported-by: Petri Latvala Signed-off-by: Chris Wilson Cc: Sumit Semwal Cc: Gustavo Padovan Cc: Petri Latvala --- drivers/dma-buf/sync_file.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-

[Intel-gfx] [PATCH 22/22] drm/i915: Move idle barrier cleanup into engine-pm

2019-06-17 Thread Chris Wilson
Now that we now longer need to guarantee that the active callback is under the struct_mutex, we can lift it out of the i915_gem_park() and into the engine parking itself. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gem/i915_gem_pm.c| 19 --- drivers/gpu/drm/i915/gt/i

[Intel-gfx] [PATCH 13/22] dma-fence: Always execute signal callbacks

2019-06-17 Thread Chris Wilson
Allow for some users to surreptiously insert lazy signal callbacks that do not depend on enabling the signaling mechanism around every fence. This means that we may have a cb_list even if the signaling bit is not enabled, so always notify the callbacks. The cost is that dma_fence_signal() must alw

[Intel-gfx] [PATCH 04/22] drm/i915: Stop passing I915_WAIT_LOCKED to i915_request_wait()

2019-06-17 Thread Chris Wilson
Since commit eb8d0f5af4ec ("drm/i915: Remove GPU reset dependence on struct_mutex"), the I915_WAIT_LOCKED flags passed to i915_request_wait() has been defunct. Now go ahead and remove it from all callers. References: eb8d0f5af4ec ("drm/i915: Remove GPU reset dependence on struct_mutex") Signed-of

[Intel-gfx] [PATCH 01/22] drm/i915: Restore -Wunused-but-set-variable

2019-06-17 Thread Chris Wilson
We appear to be clear of this warning, so time to re-enable the gcc error checking. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/Makefile | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index c0a7b2994077..f4971900087a 1006

[Intel-gfx] [PATCH 19/22] drm/i915: Extract intel_frontbuffer active tracking

2019-06-17 Thread Chris Wilson
Move the active tracking for the frontbuffer operations out of the i915_gem_object and into its own first class (refcounted) object. In the process of detangling, we switch from low level request tracking to the easier i915_active -- with the plan that this avoids any potential atomic callbacks as

[Intel-gfx] [PATCH 21/22] drm/i915: Replace struct_mutex for batch pool serialisation

2019-06-17 Thread Chris Wilson
Switch to tracking activity via i915_active on individual nodes, only keeping a list of retired objects in the cache, and reaping the cache when the engine itself idles. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/Makefile | 2 +- .../gpu/drm/i915/gem/i915_gem_execbuff

[Intel-gfx] [PATCH 20/22] drm/i915: Coordinate i915_active with its own mutex

2019-06-17 Thread Chris Wilson
Forgo the struct_mutex serialisation for i915_active, and interpose its own mutex handling for active/retire. This is a multi-layered sleight-of-hand. First, we had to ensure that no active/retire callbacks accidentally inverted the mutex ordering rules, nor assumed that they were themselves seria

[Intel-gfx] [PATCH 05/22] drm/i915: Flush the execution-callbacks on retiring

2019-06-17 Thread Chris Wilson
In the unlikely case the request completes while we regard it as not even executing on the GPU (see the next patch!), we have to flush any pending execution callbacks at retirement and ensure that we do not add any more. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_request.c | 93 ++

Re: [Intel-gfx] [PATCH] i915: gvt: no need to check return value of debugfs_create functions

2019-06-17 Thread Zhenyu Wang
On 2019.06.13 15:34:19 +0200, Greg Kroah-Hartman wrote: > When calling debugfs functions, there is no need to ever check the > return value. The function can work or not, but the code logic should > never do something different based on this. Looks fine to me. We'd follow this idiom. Reviewed-by

Re: [Intel-gfx] [PATCH v3 4/7] lib/hexdump.c: Replace ascii bool in hex_dump_to_buffer with flags

2019-06-17 Thread Jani Nikula
On Mon, 17 Jun 2019, "Alastair D'Silva" wrote: > From: Alastair D'Silva > > In order to support additional features in hex_dump_to_buffer, replace > the ascii bool parameter with flags. > > Signed-off-by: Alastair D'Silva > --- > drivers/gpu/drm/i915/intel_engine_cs.c| 2 +- > driv

[Intel-gfx] [PATCH 17/22] drm/i915/overlay: Switch to using i915_active tracking

2019-06-17 Thread Chris Wilson
Remove the raw i915_active_request tracking in favour of the higher level i915_active tracking for the sole purpose of making the lockless transition easier in later patches. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_active.h | 19 drivers/gpu/drm/i915/intel_overlay.c | 1

[Intel-gfx] [PATCH 07/22] drm/i915/execlists: Minimalistic timeslicing

2019-06-17 Thread Chris Wilson
If we have multiple contexts of equal priority pending execution, activate a timer to demote the currently executing context in favour of the next in the queue when that timeslice expires. This enforces fairness between contexts (so long as they allow preemption -- forced preemption, in the future,

[Intel-gfx] [PATCH 16/22] drm/i915: Push the i915_active.retire into a worker

2019-06-17 Thread Chris Wilson
As we need to use a mutex to serialisation i915_active activation (because we want to allow the callback to sleep), we need to push the i915_active.retire into a worker callback in case we get need to retire from an atomic context. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gem/i915_ge

[Intel-gfx] [PATCH 02/22] drm/i915/gtt: Serialise both updates to PDE and our shadow

2019-06-17 Thread Chris Wilson
Currently, we perform a locked update of the shadow entry when allocating a page directory entry such that if two clients are concurrently allocating neighbouring ranges we only insert one new entry for the pair of them. However, we also need to serialise both clients wrt to the actual entry in the

[Intel-gfx] [PATCH 06/22] drm/i915/execlists: Preempt-to-busy

2019-06-17 Thread Chris Wilson
When using a global seqno, we required a precise stop-the-workd event to handle preemption and unwind the global seqno counter. To accomplish this, we would preempt to a special out-of-band context and wait for the machine to report that it was idle. Given an idle machine, we could very precisely s

Re: [Intel-gfx] [PATCH 01/22] drm/i915: Restore -Wunused-but-set-variable

2019-06-17 Thread Chris Wilson
Quoting Chris Wilson (2019-06-17 08:18:51) > We appear to be clear of this warning, so time to re-enable the gcc error > checking. Scratch that, it is only showing up under W=1. Hmm. I forget it is to cover the voluminous atomic macros. -Chris ___ Intel

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/22] drm/i915: Restore -Wunused-but-set-variable

2019-06-17 Thread Patchwork
== Series Details == Series: series starting with [01/22] drm/i915: Restore -Wunused-but-set-variable URL : https://patchwork.freedesktop.org/series/62184/ State : warning == Summary == $ dim checkpatch origin/drm-tip f9d84faad457 drm/i915: Restore -Wunused-but-set-variable 9a9b7608d0bb drm/i9

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [01/22] drm/i915: Restore -Wunused-but-set-variable

2019-06-17 Thread Patchwork
== Series Details == Series: series starting with [01/22] drm/i915: Restore -Wunused-but-set-variable URL : https://patchwork.freedesktop.org/series/62184/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Restore -Wunused-but-set-variable - +./

[Intel-gfx] [PATCH] drm/i915/icl: Add missing device ID

2019-06-17 Thread Mika Kahola
We are missing PCI device ID for SKU ICLLP U GT 1.5F (0x8A54) as per BSPec. BSpec: 19092 Signed-off-by: Mika Kahola --- include/drm/i915_pciids.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index 6d60ea68c171..6c342

Re: [Intel-gfx] use exact allocation for dma coherent memory

2019-06-17 Thread Dan Carpenter
I once wrote a Smatch check based on a commit message that said we can't pass dma_alloc_coherent() pointers to virt_to_phys(). But then I never felt like I understood the rules enough to actually report the warnings as bugs. drivers/platform/x86/dcdbas.c:108 smi_data_buf_realloc() error: 'buf' ca

Re: [Intel-gfx] [PATCH 40/59] drm/vram-helper: Drop drm_gem_prime_export/import

2019-06-17 Thread Gerd Hoffmann
Hi, > Aside: Would be really nice to switch the others over to > drm_gem_object_funcs. While most callbacks are pretty straight forward (just hook the same callbacks into the drm_gem_object_funcs. struct) the mmap bits are a bit more obscure. First, there seem to be two ways to mmap a gem buff

Re: [Intel-gfx] [RFC 01/31] drm/i915: Convert intel_vgt_(de)balloon to uncore

2019-06-17 Thread Tvrtko Ursulin
On 14/06/2019 18:43, Chris Wilson wrote: Quoting Michal Wajdeczko (2019-06-14 18:18:54) On Fri, 14 Jun 2019 17:17:01 +0200, Tvrtko Ursulin wrote: From: Tvrtko Ursulin More removal of implicit dev_priv from using old mmio accessors. Furthermore these calls really operate on ggtt so it logi

Re: [Intel-gfx] use exact allocation for dma coherent memory

2019-06-17 Thread Christoph Hellwig
> drivers/infiniband/hw/cxgb4/qp.c >129 static int alloc_host_sq(struct c4iw_rdev *rdev, struct t4_sq *sq) >130 { >131 sq->queue = dma_alloc_coherent(&(rdev->lldi.pdev->dev), > sq->memsize, >132 &(sq->dma_addr), GFP_KERNEL); >1

Re: [Intel-gfx] [PATCH] drm/i915: Nuke atomic set/get prop plane stubs

2019-06-17 Thread Maarten Lankhorst
Op 11-06-2019 om 19:05 schreef Ville Syrjälä: > On Tue, Jun 11, 2019 at 03:28:20PM +0200, Maarten Lankhorst wrote: >> They have been unused since rotation was added to drm core in 2015, >> time to get rid of them. >> >> Signed-off-by: Maarten Lankhorst > Reviewed-by: Ville Syrjälä > >> --- >> dr

[Intel-gfx] [PATCH] drm/i915: Keep engine alive as we retire the context

2019-06-17 Thread Chris Wilson
Though we pin the context first before taking the pm wakeref, during retire we need to unpin before dropping the pm wakeref (breaking the "natural" onion). During the unpin, we may need to attach a cleanup operation on to the engine wakeref, ergo we want to keep the engine awake until after the unp

Re: [Intel-gfx] [PATCH 59/59] drm/doc: Document kapi doc expectations

2019-06-17 Thread Jani Nikula
On Fri, 14 Jun 2019, Daniel Vetter wrote: > We've had this already for anything new. With my drm_prime.c cleanup I > also think documentations for everything already existing is complete, > and we can bake this in as a requirements subsystem wide. > > Signed-off-by: Daniel Vetter > Cc: Laurent Pi

Re: [Intel-gfx] [PATCH v2 3/3] drm/i915: move modesetting core code under display/

2019-06-17 Thread Jani Nikula
On Thu, 13 Jun 2019, Maarten Lankhorst wrote: > Op 13-06-2019 om 10:44 schreef Jani Nikula: >> Now that we have a new subdirectory for display code, continue by moving >> modesetting core code. >> >> display/intel_frontbuffer.h sticks out like a sore thumb, otherwise this >> is, again, a surprisi

Re: [Intel-gfx] [PATCH] drm/i915: Keep engine alive as we retire the context

2019-06-17 Thread Chris Wilson
Quoting Chris Wilson (2019-06-17 09:40:44) > Though we pin the context first before taking the pm wakeref, during > retire we need to unpin before dropping the pm wakeref (breaking the > "natural" onion). During the unpin, we may need to attach a cleanup > operation on to the engine wakeref, ergo w

[Intel-gfx] [PATCH v2] drm/i915: Keep engine alive as we retire the context

2019-06-17 Thread Chris Wilson
Though we pin the context first before taking the pm wakeref, during retire we need to unpin before dropping the pm wakeref (breaking the "natural" onion). During the unpin, we may need to attach a cleanup operation on to the engine wakeref, ergo we want to keep the engine awake until after the unp

Re: [Intel-gfx] [PATCH 09/59] drm/prime: Align gem_prime_export with obj_funcs.export

2019-06-17 Thread Koenig, Christian
Am 14.06.19 um 22:35 schrieb Daniel Vetter: > The idea is that gem_prime_export is deprecated in favor of > obj_funcs.export. That's much easier to do if both have matching > function signatures. > > Signed-off-by: Daniel Vetter > Cc: Russell King > Cc: Maarten Lankhorst > Cc: Maxime Ripard > C

Re: [Intel-gfx] [PATCH v2] drm/i915: Keep engine alive as we retire the context

2019-06-17 Thread Chris Wilson
Quoting Chris Wilson (2019-06-17 10:32:27) > Though we pin the context first before taking the pm wakeref, during > retire we need to unpin before dropping the pm wakeref (breaking the > "natural" onion). During the unpin, we may need to attach a cleanup > operation on to the engine wakeref, ergo w

[Intel-gfx] [PATCH v3] drm/i915: Keep engine alive as we retire the context

2019-06-17 Thread Chris Wilson
Though we pin the context first before taking the pm wakeref, during retire we need to unpin before dropping the pm wakeref (breaking the "natural" onion). During the unpin, we may need to attach a cleanup operation on to the engine wakeref, ergo we want to keep the engine awake until after the unp

[Intel-gfx] [PATCH 03/11] drm/i915: make i915_globals.h self-contained

2019-06-17 Thread Jani Nikula
Add the minimal includes/declarations to make the header self-contained, and ensure it stays that way. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/Makefile.header-test | 1 + drivers/gpu/drm/i915/i915_globals.h | 2 ++ 2 files changed, 3 insertions(+) diff --git a/drivers/gpu/drm/

[Intel-gfx] [PATCH 01/11] drm/i915: make i915_fixed.h self-contained

2019-06-17 Thread Jani Nikula
Add the minimal includes/declarations to make the header self-contained, and ensure it stays that way. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/Makefile.header-test | 1 + drivers/gpu/drm/i915/i915_fixed.h | 5 + 2 files changed, 6 insertions(+) diff --git a/drivers/gpu/d

[Intel-gfx] drm/i915: last bits to make headers self-contained

2019-06-17 Thread Jani Nikula
After this, all headers except display/intel_vbt_defs.h (which is also copy-pasted to userspace) and i915_oa_*.h (which are generated files) are self-contained. BR, Jani. ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesk

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for Enable Multi-segmented-gamma for ICL (rev4)

2019-06-17 Thread Shankar, Uma
>On 13/06/2019 10:39, Shankar, Uma wrote: >> >> >>> -Original Message- >>> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On >>> Behalf Of Patchwork >>> Sent: Thursday, June 13, 2019 12:36 PM >>> To: Sharma, Shashank >>> Cc: intel-gfx@lists.freedesktop.org >>> Subject:

[Intel-gfx] [PATCH 11/11] drm/i915: use wildcard to ensure all headers stay self-contained

2019-06-17 Thread Jani Nikula
Skip the generated i915_oa_*.h files. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/Makefile.header-test | 29 +-- 1 file changed, 1 insertion(+), 28 deletions(-) diff --git a/drivers/gpu/drm/i915/Makefile.header-test b/drivers/gpu/drm/i915/Makefile.header-test index

[Intel-gfx] [PATCH 02/11] drm/i915: make i915_gem_gtt.h self-contained

2019-06-17 Thread Jani Nikula
Add the minimal includes/declarations to make the header self-contained, and ensure it stays that way. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/Makefile.header-test | 1 + drivers/gpu/drm/i915/i915_gem_gtt.h | 2 ++ 2 files changed, 3 insertions(+) diff --git a/drivers/gpu/drm/

[Intel-gfx] [PATCH 04/11] drm/i915: make i915_pvinfo.h self-contained

2019-06-17 Thread Jani Nikula
Add the minimal includes/declarations to make the header self-contained, and ensure it stays that way. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/Makefile.header-test | 1 + drivers/gpu/drm/i915/i915_pvinfo.h| 2 ++ 2 files changed, 3 insertions(+) diff --git a/drivers/gpu/drm/

[Intel-gfx] [PATCH 10/11] drm/i915: make intel_uc_fw.h self-contained

2019-06-17 Thread Jani Nikula
Add the minimal includes/declarations to make the header self-contained, and ensure it stays that way. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/Makefile.header-test | 1 + drivers/gpu/drm/i915/intel_uc_fw.h| 2 ++ 2 files changed, 3 insertions(+) diff --git a/drivers/gpu/drm/

[Intel-gfx] [PATCH 08/11] drm/i915: make intel_guc_reg.h self-contained

2019-06-17 Thread Jani Nikula
Add the minimal includes/declarations to make the header self-contained, and ensure it stays that way. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/Makefile.header-test | 1 + drivers/gpu/drm/i915/intel_guc_reg.h | 3 +++ 2 files changed, 4 insertions(+) diff --git a/drivers/gpu/drm

[Intel-gfx] [PATCH 05/11] drm/i915: make i915_vgpu.h self-contained

2019-06-17 Thread Jani Nikula
Add the minimal includes/declarations to make the header self-contained, and ensure it stays that way. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/Makefile.header-test | 1 + drivers/gpu/drm/i915/i915_vgpu.h | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i

[Intel-gfx] [PATCH 06/11] drm/i915: make intel_guc_ct.h self-contained

2019-06-17 Thread Jani Nikula
Add the minimal includes/declarations to make the header self-contained, and ensure it stays that way. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/Makefile.header-test | 1 + drivers/gpu/drm/i915/intel_guc_ct.h | 6 -- 2 files changed, 5 insertions(+), 2 deletions(-) diff --gi

[Intel-gfx] [PATCH 09/11] drm/i915: make intel_gvt.h self-contained

2019-06-17 Thread Jani Nikula
Add the minimal includes/declarations to make the header self-contained, and ensure it stays that way. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/Makefile.header-test | 1 + drivers/gpu/drm/i915/intel_gvt.h | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/d

[Intel-gfx] [PATCH 07/11] drm/i915: make intel_guc_fwif.h self-contained

2019-06-17 Thread Jani Nikula
Add the minimal includes/declarations to make the header self-contained, and ensure it stays that way. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/Makefile.header-test | 1 + drivers/gpu/drm/i915/intel_guc_fwif.h | 4 2 files changed, 5 insertions(+) diff --git a/drivers/gpu/dr

Re: [Intel-gfx] [PATCH 09/59] drm/prime: Align gem_prime_export with obj_funcs.export

2019-06-17 Thread Thierry Reding
On Fri, Jun 14, 2019 at 10:35:25PM +0200, Daniel Vetter wrote: > The idea is that gem_prime_export is deprecated in favor of > obj_funcs.export. That's much easier to do if both have matching > function signatures. > > Signed-off-by: Daniel Vetter > Cc: Russell King > Cc: Maarten Lankhorst > Cc

[Intel-gfx] [PATCH] drm/i915/guc: Reduce verbosity on log overflows

2019-06-17 Thread Chris Wilson
If the user is clearing the log buffer too slowly, we overflow. As this is an expected condition, and the driver tries to handle it, reduce the error message down to a notice. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110817 Signed-off-by: Chris Wilson Cc: Michal Wajdeczko Cc: Tvrtk

[Intel-gfx] ✓ Fi.CI.IGT: success for prime doc polish and ... a few cleanups

2019-06-17 Thread Patchwork
== Series Details == Series: prime doc polish and ... a few cleanups URL : https://patchwork.freedesktop.org/series/62135/ State : success == Summary == CI Bug Log - changes from CI_DRM_6277_full -> Patchwork_13296_full Summary --- *

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/ehl: Add missing VECS engine

2019-06-17 Thread Patchwork
== Series Details == Series: drm/i915/ehl: Add missing VECS engine URL : https://patchwork.freedesktop.org/series/62143/ State : success == Summary == CI Bug Log - changes from CI_DRM_6277_full -> Patchwork_13297_full Summary --- **S

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/3] drm/i915: Keep contexts pinned until after the next kernel context switch (rev2)

2019-06-17 Thread Patchwork
== Series Details == Series: series starting with [CI,1/3] drm/i915: Keep contexts pinned until after the next kernel context switch (rev2) URL : https://patchwork.freedesktop.org/series/62124/ State : success == Summary == CI Bug Log - changes from CI_DRM_6277_full -> Patchwork_13295_full ==

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/ehl: Allow combo PHY A to drive a third external display

2019-06-17 Thread Patchwork
== Series Details == Series: drm/i915/ehl: Allow combo PHY A to drive a third external display URL : https://patchwork.freedesktop.org/series/62131/ State : success == Summary == CI Bug Log - changes from CI_DRM_6277_full -> Patchwork_13293_full

[Intel-gfx] [PATCH] Documentation/i915: fix file references after display/ subdir renames

2019-06-17 Thread Jani Nikula
Fix the plethora of Sphinx build errors after moving the display files under a subdirectory. Fixes: 379bc100232a ("drm/i915: move modesetting output/encoder code under display/") Fixes: df0566a641f9 ("drm/i915: move modesetting core code under display/") Cc: Chris Wilson Cc: Rodrigo Vivi Cc: Vi

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [01/10] drm/i915/gtt: No need to zero the table for page dirs

2019-06-17 Thread Patchwork
== Series Details == Series: series starting with [01/10] drm/i915/gtt: No need to zero the table for page dirs URL : https://patchwork.freedesktop.org/series/62122/ State : success == Summary == CI Bug Log - changes from CI_DRM_6277_full -> Patchwork_13289_full ==

Re: [Intel-gfx] [PATCH 02/22] drm/i915/gtt: Serialise both updates to PDE and our shadow

2019-06-17 Thread Matthew Auld
On 17/06/2019 08:18, Chris Wilson wrote: Currently, we perform a locked update of the shadow entry when allocating a page directory entry such that if two clients are concurrently allocating neighbouring ranges we only insert one new entry for the pair of them. However, we also need to serialise

Re: [Intel-gfx] [PATCH 02/22] drm/i915/gtt: Serialise both updates to PDE and our shadow

2019-06-17 Thread Chris Wilson
Quoting Matthew Auld (2019-06-17 11:36:36) > On 17/06/2019 08:18, Chris Wilson wrote: > > Currently, we perform a locked update of the shadow entry when > > allocating a page directory entry such that if two clients are > > concurrently allocating neighbouring ranges we only insert one new entry >

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Avoid tainting i915_gem_park() with wakeref.lock

2019-06-17 Thread Patchwork
== Series Details == Series: drm/i915: Avoid tainting i915_gem_park() with wakeref.lock URL : https://patchwork.freedesktop.org/series/62145/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6278_full -> Patchwork_13298_full S

[Intel-gfx] [PATCH i-g-t] i915/gem_ctx_shared: Check for a large enough hole in the GTT

2019-06-17 Thread Chris Wilson
In the exec-shared-gtt test, we cheekily try to reference an object we placed in the GTT in an earlier execbuf (and avoid declaring it in the later call). For a global GTT, where there may be existing objects, we have to find a hole large enough to fit both and avoid and implicit guard pages. Bugz

[Intel-gfx] [PATCH v2] drm/i915/gtt: Serialise both updates to PDE and our shadow

2019-06-17 Thread Chris Wilson
Currently, we perform a locked update of the shadow entry when allocating a page directory entry such that if two clients are concurrently allocating neighbouring ranges we only insert one new entry for the pair of them. However, we also need to serialise both clients wrt to the actual entry in the

Re: [Intel-gfx] [PATCH v2] drm/i915/gtt: Serialise both updates to PDE and our shadow

2019-06-17 Thread Matthew Auld
On 17/06/2019 12:20, Chris Wilson wrote: Currently, we perform a locked update of the shadow entry when allocating a page directory entry such that if two clients are concurrently allocating neighbouring ranges we only insert one new entry for the pair of them. However, we also need to serialise

[Intel-gfx] [PATCH 2/6] drm/ttm: remove the backing store if no placement is given

2019-06-17 Thread Christian König
Pipeline removal of the BOs backing store when no placement is given during validation. Signed-off-by: Christian König --- drivers/gpu/drm/ttm/ttm_bo.c | 12 1 file changed, 12 insertions(+) diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c index c7de667d482a

[Intel-gfx] [PATCH 1/6] dma-buf: add dynamic DMA-buf handling v10

2019-06-17 Thread Christian König
On the exporter side we add optional explicit pinning callbacks. If those callbacks are implemented the framework no longer caches sg tables and the map/unmap callbacks are always called with the lock of the reservation object held. On the importer side we add an optional invalidate callback. This

[Intel-gfx] [PATCH 3/6] drm/ttm: use the parent resv for ghost objects v2

2019-06-17 Thread Christian König
This way we can even pipeline imported BO evictions. v2: Limit this to only cases when the parent object uses a separate reservation object as well. This fixes another OOM problem. Signed-off-by: Christian König --- drivers/gpu/drm/ttm/ttm_bo_util.c | 20 +++- 1 file changed

[Intel-gfx] [PATCH 5/6] drm/amdgpu: add independent DMA-buf export v6

2019-06-17 Thread Christian König
The caching of SGT's is actually quite harmful and should probably removed altogether when all drivers are audited. Start by providing a separate DMA-buf export implementation in amdgpu. This is also a prerequisite of unpinned DMA-buf handling. v2: fix unintended recursion, remove debugging lefto

[Intel-gfx] [PATCH 4/6] drm/amdgpu: use allowed_domains for exported DMA-bufs

2019-06-17 Thread Christian König
Avoid that we ping/pong the buffers when we stop to pin DMA-buf exports by using the allowed domains for exported buffers. Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/ehl: Add power wells support for Elkhart Lake

2019-06-17 Thread Patchwork
== Series Details == Series: drm/i915/ehl: Add power wells support for Elkhart Lake URL : https://patchwork.freedesktop.org/series/62156/ State : success == Summary == CI Bug Log - changes from CI_DRM_6279_full -> Patchwork_13300_full Summa

[Intel-gfx] [PATCH 6/6] drm/amdgpu: add independent DMA-buf import v6

2019-06-17 Thread Christian König
Instead of relying on the DRM functions just implement our own import functions. This prepares support for taking care of unpinned DMA-buf. v2: enable for all exporters, not just amdgpu, fix invalidation handling, lock reservation object while setting callback v3: change to new dma_buf attach

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/ehl: Introduce Mule Creek Canyon PCH (rev3)

2019-06-17 Thread Patchwork
== Series Details == Series: drm/i915/ehl: Introduce Mule Creek Canyon PCH (rev3) URL : https://patchwork.freedesktop.org/series/61137/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6279_full -> Patchwork_13299_full Summary

[Intel-gfx] [PATCH v3 4/7] lib/hexdump.c: Replace ascii bool in hex_dump_to_buffer with flags

2019-06-17 Thread Alastair D'Silva
From: Alastair D'Silva In order to support additional features in hex_dump_to_buffer, replace the ascii bool parameter with flags. Signed-off-by: Alastair D'Silva --- drivers/gpu/drm/i915/intel_engine_cs.c| 2 +- drivers/isdn/hardware/mISDN/mISDNisar.c | 6 -- drive

[Intel-gfx] [PATCH v3 0/7] Hexdump Enhancements

2019-06-17 Thread Alastair D'Silva
From: Alastair D'Silva Apologies for the large CC list, it's a heads up for those responsible for subsystems where a prototype change in generic code causes a change in those subsystems. This series enhances hexdump. These improve the readability of the dumped data in certain situations (eg. wi

[Intel-gfx] [PATCH v3 3/7] lib/hexdump.c: Optionally suppress lines of repeated bytes

2019-06-17 Thread Alastair D'Silva
From: Alastair D'Silva Some buffers may only be partially filled with useful data, while the rest is padded (typically with 0x00 or 0xff). This patch introduces a flag to allow the supression of lines of repeated bytes, which are replaced with '** Skipped %u bytes of value 0x%x **' An inline wr

[Intel-gfx] [PATCH v3 2/7] lib/hexdump.c: Relax rowsize checks in hex_dump_to_buffer

2019-06-17 Thread Alastair D'Silva
From: Alastair D'Silva This patch removes the hardcoded row limits and allows for other lengths. These lengths must still be a multiple of groupsize. This allows structs that are not 16/32 bytes to display on a single line. This patch also expands the self-tests to test row sizes up to 64 bytes

[Intel-gfx] [PATCH v3 1/7] lib/hexdump.c: Fix selftests

2019-06-17 Thread Alastair D'Silva
From: Alastair D'Silva The overflow tests did not account for the situation where no overflow occurs and len < rowsize. This patch renames the cryptic variables and accounts for the above case. The selftests now pass. Signed-off-by: Alastair D'Silva --- lib/test_hexdump.c | 47 ++

[Intel-gfx] [PATCH v3 7/7] lib/hexdump.c: Optionally retain byte ordering

2019-06-17 Thread Alastair D'Silva
From: Alastair D'Silva The behaviour of hexdump groups is to print the data out as if it was a native-endian number. This patch tweaks the documentation to make this clear, and also adds the HEXDUMP_RETAIN_BYTE_ORDER flag to allow groups of multiple bytes to be printed without affecting the orde

[Intel-gfx] [PATCH v3 5/7] lib/hexdump.c: Allow multiple groups to be separated by lines '|'

2019-06-17 Thread Alastair D'Silva
From: Alastair D'Silva With the wider display format, it can become hard to identify how many bytes into the line you are looking at. The patch adds new flags to hex_dump_to_buffer() and print_hex_dump() to print vertical lines to separate every N groups of bytes. eg. buf:: 454d414e 434

[Intel-gfx] [PATCH v3 6/7] lib/hexdump.c: Allow multiple groups to be separated by spaces

2019-06-17 Thread Alastair D'Silva
From: Alastair D'Silva Similar to the previous patch, this patch separates groups by 2 spaces for the hex fields, and 1 space for the ASCII field. eg. buf:: 454d414e 43415053 4e495f45 00584544 NAMESPAC E_INDEX. buf:0010: 0002 Sign

Re: [Intel-gfx] [PATCH v3 3/7] lib/hexdump.c: Optionally suppress lines of repeated bytes

2019-06-17 Thread Alastair D'Silva
On Mon, 2019-06-17 at 12:04 +1000, Alastair D'Silva wrote: > From: Alastair D'Silva > > Some buffers may only be partially filled with useful data, while the > rest > is padded (typically with 0x00 or 0xff). > > This patch introduces a flag to allow the supression of lines of > repeated > bytes,

[Intel-gfx] [PATCH] drm/i915: Use the correct style for SPDX License Identifier

2019-06-17 Thread Nishad Kamdar
This patch corrects the SPDX License Identifier style in header files related to DRM Drivers for Intel 915 Graphics. For C header files Documentation/process/license-rules.rst mandates C-like comments (opposed to C source files where C++ style should be used) Changes made by using a script provide

Re: [Intel-gfx] drm/i915: last bits to make headers self-contained

2019-06-17 Thread Chris Wilson
Quoting Jani Nikula (2019-06-17 10:50:57) > After this, all headers except display/intel_vbt_defs.h (which is also > copy-pasted to userspace) and i915_oa_*.h (which are generated files) > are self-contained. All looked fine, Reviewed-by: Chris Wilson -Chris __

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Restore -Wunused-but-set-variable

2019-06-17 Thread Patchwork
== Series Details == Series: drm/i915: Restore -Wunused-but-set-variable URL : https://patchwork.freedesktop.org/series/62161/ State : success == Summary == CI Bug Log - changes from CI_DRM_6281 -> Patchwork_13301 Summary --- **SUCCE

Re: [Intel-gfx] [PATCH] drm/i915/ehl: Add power wells support for Elkhart Lake

2019-06-17 Thread Imre Deak
Hi, On Fri, Jun 14, 2019 at 07:06:49PM -0700, Vivek Kasireddy wrote: > The number of power wells and the relevant sequences are common between > ICL and EHL since they both are Gen 11. The only significant differences > are that EHL does not have DDI E and DDI D and type C/TBT ports. EHL could ju

Re: [Intel-gfx] [PATCH] drm/i915: Check visibility in icl_build_plane_wm

2019-06-17 Thread Ville Syrjälä
On Fri, Jun 14, 2019 at 12:39:41PM +0200, Maarten Lankhorst wrote: > When a planar YUV plane is configured, but the crtc is > marked inactive, we can end up with a linked plane without > visibility. How is that possible? I don't think we should be adding the slave plane if the master is not visibl

Re: [Intel-gfx] [RESEND FOR CI] i915: no need to check return value of debugfs_create functions

2019-06-17 Thread Jani Nikula
On Thu, 13 Jun 2019, Jani Nikula wrote: > From: Greg Kroah-Hartman > > When calling debugfs functions, there is no need to ever check the > return value. The function can work or not, but the code logic should > never do something different based on this. > > Cc: Jani Nikula > Cc: Joonas Lahtin

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [01/22] drm/i915: Restore -Wunused-but-set-variable

2019-06-17 Thread Patchwork
== Series Details == Series: series starting with [01/22] drm/i915: Restore -Wunused-but-set-variable URL : https://patchwork.freedesktop.org/series/62184/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6282 -> Patchwork_13302 ===

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [01/22] drm/i915: Restore -Wunused-but-set-variable

2019-06-17 Thread Chris Wilson
Quoting Patchwork (2019-06-17 14:05:05) > Possible regressions > > * igt@gem_close_race@basic-process: > - fi-hsw-peppy: [PASS][1] -> [INCOMPLETE][2] >[1]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6282/fi-hsw-peppy/igt@gem_close_r...@basic-process.html >[2]:

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/icl: Add missing device ID

2019-06-17 Thread Patchwork
== Series Details == Series: drm/i915/icl: Add missing device ID URL : https://patchwork.freedesktop.org/series/62187/ State : success == Summary == CI Bug Log - changes from CI_DRM_6284 -> Patchwork_13303 Summary --- **SUCCESS**

Re: [Intel-gfx] [PATCH 14/22] drm/i915: Throw away the active object retirement complexity

2019-06-17 Thread Matthew Auld
On 17/06/2019 08:19, Chris Wilson wrote: Remove the accumulated optimisations that we have for i915_vma_retire and reduce it to the bare essential of tracking the active object reference. This allows us to only use atomic operations, and so will be able to avoid the struct_mutex requirement. The

Re: [Intel-gfx] [PATCH 07/59] drm/arm/komeda: Remove DRIVER_HAVE_IRQ

2019-06-17 Thread Daniel Vetter
On Mon, Jun 17, 2019 at 06:26:08AM +, james qian wang (Arm Technology China) wrote: > On Fri, Jun 14, 2019 at 10:35:23PM +0200, Daniel Vetter wrote: > > Read the docs, komeda is not an old enough driver for this :-) > > > > Signed-off-by: Daniel Vetter > > Cc: "James (Qian) Wang" > > Cc: Li

Re: [Intel-gfx] [PATCH 14/22] drm/i915: Throw away the active object retirement complexity

2019-06-17 Thread Chris Wilson
Quoting Matthew Auld (2019-06-17 14:43:34) > On 17/06/2019 08:19, Chris Wilson wrote: > > Remove the accumulated optimisations that we have for i915_vma_retire > > and reduce it to the bare essential of tracking the active object > > reference. This allows us to only use atomic operations, and so w

Re: [Intel-gfx] [PATCH v2] drm/i915/gtt: Serialise both updates to PDE and our shadow

2019-06-17 Thread Mika Kuoppala
Chris Wilson writes: > Currently, we perform a locked update of the shadow entry when > allocating a page directory entry such that if two clients are > concurrently allocating neighbouring ranges we only insert one new entry > for the pair of them. However, we also need to serialise both clients

Re: [Intel-gfx] [PATCH 40/59] drm/vram-helper: Drop drm_gem_prime_export/import

2019-06-17 Thread Daniel Vetter
On Mon, Jun 17, 2019 at 10:24:38AM +0200, Gerd Hoffmann wrote: > Hi, > > > Aside: Would be really nice to switch the others over to > > drm_gem_object_funcs. > > While most callbacks are pretty straight forward (just hook the same > callbacks into the drm_gem_object_funcs. struct) the mmap bits

Re: [Intel-gfx] [PATCH 01/59] drm/todo: Improve drm_gem_object funcs todo

2019-06-17 Thread Daniel Vetter
On Fri, Jun 14, 2019 at 03:53:31PM -0700, Eric Anholt wrote: > Daniel Vetter writes: > > > We're kinda going in the wrong direction. Spotted while typing better > > gem/prime docs. > > > > Cc: Thomas Zimmermann > > Cc: Gerd Hoffmann > > Cc: Rob Herring > > Cc: Noralf Trønnes > > Signed-off-by

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