[Intel-gfx] [PULL] gvt-fixes

2019-06-05 Thread Zhenyu Wang
Hi, More gvt fixes for 5.2-rc. This fixed one regression when enabling debug build of i915 guest, guest ring state fix after execution for hang check, and with two misc fixes from klocwork check. Thanks -- The following changes since commit 3035e8cd6c316cb633b45bc9b38052ba2dfd299b: drm/i915/g

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/3] drm/i915/selftests: Flush partial-tiling object once

2019-06-05 Thread Patchwork
== Series Details == Series: series starting with [CI,1/3] drm/i915/selftests: Flush partial-tiling object once URL : https://patchwork.freedesktop.org/series/61578/ State : success == Summary == CI Bug Log - changes from CI_DRM_6186_full -> Patchwork_13166_full ==

Re: [Intel-gfx] [PATCH i-g-t 1/5] lib/tests: fix conflicting args test

2019-06-05 Thread Petri Latvala
On 6/5/19 12:38 AM, Lucas De Marchi wrote: On Fri, May 31, 2019 at 07:55:45AM -0700, Lucas De Marchi wrote: On Fri, May 31, 2019 at 12:59:35PM +0300, Petri Latvala wrote: On Wed, May 29, 2019 at 04:27:33PM -0700, Lucas De Marchi wrote: We want to check if the long option conflicts with one fr

[Intel-gfx] [PULL] drm-misc-next

2019-06-05 Thread Maarten Lankhorst
drm-misc-next-2019-06-05: drm-misc-next for v5.3: UAPI Changes: Cross-subsystem Changes: - Add devicetree bindings for new panels. - Convert allwinner's DT bindings to a schema. - Drop video/hdmi static functions from kernel docs. - Discard old fence when reserving space in reservation_object_get

Re: [Intel-gfx] [PATCH v2 08/22] gpu: i915.rst: Fix references to renamed files

2019-06-05 Thread Jani Nikula
On Tue, 04 Jun 2019, Mauro Carvalho Chehab wrote: > WARNING: kernel-doc './scripts/kernel-doc -rst -enable-lineno -function > Hardware workarounds ./drivers/gpu/drm/i915/intel_workarounds.c' failed with > return code 1 > WARNING: kernel-doc './scripts/kernel-doc -rst -enable-lineno -function >

[PATCH 2/2] drm/i915: fix documentation build warnings

2019-06-05 Thread Jani Nikula
Just a straightforward bag of fixes for a clean htmldocs build. Signed-off-by: Jani Nikula --- Documentation/gpu/i915.rst | 6 -- drivers/gpu/drm/i915/i915_reg.h | 2 +- drivers/gpu/drm/i915/i915_vma.h | 2 ++ drivers/gpu/drm/i915/intel_guc_fwif.h | 2 ++ drive

[PATCH 1/2] Documentation/i915: Fix kernel-doc references to moved gem files

2019-06-05 Thread Jani Nikula
The error messages could be more descriptive, but fix these caused by file moves: WARNING: kernel-doc './scripts/kernel-doc -rst -enable-lineno -internal ./drivers/gpu/drm/i915/i915_gem_shrinker.c' failed with return code 2 WARNING: kernel-doc './scripts/kernel-doc -rst -enable-lineno -functio

Re: [Intel-gfx] [v7][PATCH 03/12] drm/i915: Add func to compare hw/sw gamma lut

2019-06-05 Thread Jani Nikula
On Wed, 29 May 2019, Swati Sharma wrote: > v3: -Rebase > v4: -Renamed intel_compare_color_lut() to intel_color_lut_equal() [Jani] > -Added the default label above the correct label [Jani] > -Corrected smatch warn "variable dereferenced before check" > [Dan Carpenter] > v5: -Added cond

Re: [Intel-gfx] [v7][PATCH 02/12] drm/i915: Enable intel_color_get_config()

2019-06-05 Thread Jani Nikula
On Wed, 29 May 2019, Swati Sharma wrote: > In this patch, intel_color_get_config() is enabled and support > for read_luts() will be added platform by platform incrementally > in the follow-up patches. > > v4: -Renamed intel_get_color_config to intel_color_get_config [Jani] > -Added the user ea

Re: [Intel-gfx] [PATCH 1/2] Documentation/i915: Fix kernel-doc references to moved gem files

2019-06-05 Thread Mika Kuoppala
Jani Nikula writes: > The error messages could be more descriptive, but fix these caused by > file moves: > > WARNING: kernel-doc './scripts/kernel-doc -rst -enable-lineno -internal > ./drivers/gpu/drm/i915/i915_gem_shrinker.c' failed with return code 2 > WARNING: kernel-doc './scripts/kernel

Re: [Intel-gfx] [PATCH] drm/i915: Skip context_barrier emission for unused contexts

2019-06-05 Thread Tvrtko Ursulin
On 04/06/2019 16:24, Chris Wilson wrote: The intent was to skip unused HW contexts by checking ce->state. However, this only works for execlists where the ppGTT pointers is stored inside the HW context. For gen7, the ppGTT is alongside the logical state and must be updated on all active engines

Re: [Intel-gfx] [PATCH] drm/ioctl: Ditch DRM_UNLOCKED except for the legacy vblank ioctl

2019-06-05 Thread Michel Dänzer
On 2019-05-29 11:30 a.m., Daniel Vetter wrote: > This completes Emil's series of removing DRM_UNLOCKED from modern > drivers. It's entirely cargo-culted since we ignore it on > non-DRIVER_LEGACY drivers since: > > commit ea487835e8876abf7ad909636e308c801a2bcda6 > Author: Daniel Vetter > Date: M

[Intel-gfx] ✓ Fi.CI.IGT: success for dma-buf: Discard old fence_excl on retrying get_fences_rcu for realloc (rev3)

2019-06-05 Thread Patchwork
== Series Details == Series: dma-buf: Discard old fence_excl on retrying get_fences_rcu for realloc (rev3) URL : https://patchwork.freedesktop.org/series/61581/ State : success == Summary == CI Bug Log - changes from CI_DRM_6186_full -> Patchwork_13167_full ===

Re: [Intel-gfx] [PATCH] drm/ioctl: Ditch DRM_UNLOCKED except for the legacy vblank ioctl

2019-06-05 Thread Daniel Vetter
On Wed, Jun 5, 2019 at 12:50 PM Michel Dänzer wrote: > > On 2019-05-29 11:30 a.m., Daniel Vetter wrote: > > This completes Emil's series of removing DRM_UNLOCKED from modern > > drivers. It's entirely cargo-culted since we ignore it on > > non-DRIVER_LEGACY drivers since: > > > > commit ea487835e8

Re: [Intel-gfx] [PATCH 07/15] drm/i915: Move object close under its own lock

2019-06-05 Thread Matthew Auld
On Mon, 3 Jun 2019 at 15:00, Chris Wilson wrote: > > Use i915_gem_object_lock() to guard the LUT and active reference to > allow us to break free of struct_mutex for handling GEM_CLOSE. > > Testcase: igt/gem_close_race > Testcase: igt/gem_exec_parallel > Signed-off-by: Chris Wilson > --- > drive

[Intel-gfx] [PATCH] drm/ioctl: Ditch DRM_UNLOCKED except for the legacy vblank ioctl

2019-06-05 Thread Daniel Vetter
This completes Emil's series of removing DRM_UNLOCKED from modern drivers. It's entirely cargo-culted since we ignore it on non-DRIVER_LEGACY drivers since: commit ea487835e8876abf7ad909636e308c801a2bcda6 Author: Daniel Vetter Date: Mon Sep 28 21:42:40 2015 +0200 drm: Enforce unlocked ioct

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Vulkan performance query support (rev3)

2019-06-05 Thread Patchwork
== Series Details == Series: drm/i915: Vulkan performance query support (rev3) URL : https://patchwork.freedesktop.org/series/60916/ State : success == Summary == CI Bug Log - changes from CI_DRM_6186_full -> Patchwork_13168_full Summary --

Re: [Intel-gfx] [PATCH 01/13] drm/i915/bios: make child device order the priority order

2019-06-05 Thread Jani Nikula
On Fri, 31 May 2019, Ville Syrjälä wrote: > On Fri, May 31, 2019 at 04:14:51PM +0300, Jani Nikula wrote: >> Make the child device order the priority order in sanitizing DDC pin and >> AUX CH. First come, first served. >> >> Cc: Ville Syrjälä >> Signed-off-by: Jani Nikula >> --- >> drivers/gpu/

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] Documentation/i915: Fix kernel-doc references to moved gem files

2019-06-05 Thread Patchwork
== Series Details == Series: series starting with [1/2] Documentation/i915: Fix kernel-doc references to moved gem files URL : https://patchwork.freedesktop.org/series/61645/ State : success == Summary == CI Bug Log - changes from CI_DRM_6194 -> Patchwork_13177 ===

Re: [Intel-gfx] [PATCH 2/2] drm/i915: fix documentation build warnings

2019-06-05 Thread Mika Kuoppala
Jani Nikula writes: > Just a straightforward bag of fixes for a clean htmldocs build. > > Signed-off-by: Jani Nikula Reviewed-by: Mika Kuoppala

[Intel-gfx] [PATCH] drm/i915: rename header test build commands to avoid conflicts

2019-06-05 Thread Jani Nikula
We have a local hack to test if headers are self-contained, while upstreaming a proper generic solution in kbuild [1]. Now that both have found themselves in linux-next, the identical cmd_header_test build commands conflict, leading to errors such as: >> drivers/gpu/drm/i915/header_test_intel_audi

Re: [Intel-gfx] [PATCH] drm/i915: rename header test build commands to avoid conflicts

2019-06-05 Thread Sam Ravnborg
Hi Jani. On Wed, Jun 05, 2019 at 04:21:37PM +0300, Jani Nikula wrote: > We have a local hack to test if headers are self-contained, while > upstreaming a proper generic solution in kbuild [1]. Now that both have > found themselves in linux-next, the identical cmd_header_test build > commands confl

[Intel-gfx] [PATCH v4 5/7] drm/i915: add a new perf configuration execbuf parameter

2019-06-05 Thread Lionel Landwerlin
We want the ability to dispatch a set of command buffer to the hardware, each with a different OA configuration. To achieve this, we reuse a couple of fields from the execbuf2 struct (I CAN HAZ execbuf3?) to notify what OA configuration should be used for a batch buffer. This requires the process m

[Intel-gfx] [PATCH v4 0/7] drm/i915: Vulkan performance query support

2019-06-05 Thread Lionel Landwerlin
Hi all, Here is a list of changes in this iteration : - Reuse i915_user_extension_fn - Serialize OA configuration updates - Report the perf priority through the effective_prio() helper rather than updating the value Cheers, Lionel Landwerlin (7): drm/i915/perf: introduce a version

[Intel-gfx] [PATCH v4 4/7] drm/i915: add syncobj timeline support

2019-06-05 Thread Lionel Landwerlin
Introduces a new parameters to execbuf so that we can specify syncobj handles as well as timeline points. v2: Reuse i915_user_extension_fn Signed-off-by: Lionel Landwerlin --- .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 279 ++ drivers/gpu/drm/i915/i915_drv.c |

[Intel-gfx] [PATCH v4 1/7] drm/i915/perf: introduce a versioning of the i915-perf uapi

2019-06-05 Thread Lionel Landwerlin
Reporting this version will help application figure out what level of the support the running kernel provides. Signed-off-by: Lionel Landwerlin --- drivers/gpu/drm/i915/i915_drv.c | 3 +++ include/uapi/drm/i915_drm.h | 21 + 2 files changed, 24 insertions(+) diff --git

[Intel-gfx] [PATCH v4 3/7] drm/i915: introduce a mechanism to extend execbuf2

2019-06-05 Thread Lionel Landwerlin
We're planning to use this for a couple of new feature where we need to provide additional parameters to execbuf. Signed-off-by: Lionel Landwerlin --- .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 30 ++- include/uapi/drm/i915_drm.h | 25 ++-- 2 fi

[Intel-gfx] [PATCH v4 7/7] drm/i915: add support for perf configuration queries

2019-06-05 Thread Lionel Landwerlin
Listing configurations at the moment is supported only through sysfs. This might cause issues for applications wanting to list configurations from a container where sysfs isn't available. This change adds a way to query the number of configurations and their content through the i915 query uAPI. v

[Intel-gfx] [PATCH v4 6/7] drm/i915/perf: allow holding preemption on filtered ctx

2019-06-05 Thread Lionel Landwerlin
We would like to make use of perf in Vulkan. The Vulkan API is much lower level than OpenGL, with applications directly exposed to the concept of command buffers (pretty much equivalent to our batch buffers). In Vulkan, queries are always limited in scope to a command buffer. In OpenGL, the lack of

[Intel-gfx] [PATCH v4 2/7] drm/i915/perf: allow for CS OA configs to be created lazily

2019-06-05 Thread Lionel Landwerlin
Here we introduce a mechanism by which the execbuf part of the i915 driver will be able to request that a batch buffer containing the programming for a particular OA config be created. We'll execute these OA configuration buffers right before executing a set of userspace commands so that a particu

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv

2019-06-05 Thread Maarten Lankhorst
Op 31-05-2019 om 15:05 schreef Ville Syrjälä: > On Thu, May 30, 2019 at 05:43:00AM -, Patchwork wrote: >> == Series Details == >> >> Series: series starting with [01/10] drm/i915: Add windowing for primary >> planes on gen2/3 and chv >> URL : https://patchwork.freedesktop.org/series/61345/ >

Re: [Intel-gfx] [PATCH 3/7] drm/i915: Allow page pinning to be in the background

2019-06-05 Thread Matthew Auld
On Mon, 3 Jun 2019 at 18:49, Chris Wilson wrote: > > Assume that pages may be pinned in a background task and use a > completion event to synchronise with callers that must access the pages > immediately. > > Signed-off-by: Chris Wilson > --- > drivers/gpu/drm/i915/gem/i915_gem_object.c| 1

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/ioctl: Ditch DRM_UNLOCKED except for the legacy vblank ioctl (rev2)

2019-06-05 Thread Patchwork
== Series Details == Series: drm/ioctl: Ditch DRM_UNLOCKED except for the legacy vblank ioctl (rev2) URL : https://patchwork.freedesktop.org/series/61299/ State : warning == Summary == $ dim checkpatch origin/drm-tip b69c7ced5090 drm/ioctl: Ditch DRM_UNLOCKED except for the legacy vblank ioctl

Re: [Intel-gfx] [PATCH 2/5] drm/i915: Rename HSW/BDW PLL bits

2019-06-05 Thread Maarten Lankhorst
Op 04-06-2019 om 22:09 schreef Ville Syrjala: > From: Ville Syrjälä > > Give the PLL control register bits better names on HSW/BDW. > > Signed-off-by: Ville Syrjälä > --- > drivers/gpu/drm/i915/i915_reg.h | 37 ++- > drivers/gpu/drm/i915/intel_ddi.c | 16 ++

Re: [Intel-gfx] [PATCH 5/5] drm/i915: Improve WRPLL reference clock readout on HSW/BDW

2019-06-05 Thread Maarten Lankhorst
Op 04-06-2019 om 22:09 schreef Ville Syrjala: > From: Ville Syrjälä > > On non-ULT HSW the "special" WRPLL reference clock select > actually means non-SSC. Take that into account when reading > out the WRPLL state. > > Also the non-SSC reference may be either 24MHz or 135MHz, > which we can read o

Re: [Intel-gfx] [PATCH v2] drm/i915: Fix 90/270 degree rotated RGB565 src coord checks

2019-06-05 Thread Maarten Lankhorst
Op 30-04-2019 om 19:33 schreef Ville Syrjala: > From: Ville Syrjälä > > Supposedly both src coordinates have to even when doing 90/270 > degree rotation with RGB565. This is definitely true for the > X coordinate (we just get a black screen when it is odd). My > experiments didn't show any misbeha

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/ioctl: Ditch DRM_UNLOCKED except for the legacy vblank ioctl (rev2)

2019-06-05 Thread Patchwork
== Series Details == Series: drm/ioctl: Ditch DRM_UNLOCKED except for the legacy vblank ioctl (rev2) URL : https://patchwork.freedesktop.org/series/61299/ State : success == Summary == CI Bug Log - changes from CI_DRM_6195 -> Patchwork_13178

Re: [Intel-gfx] [PATCH] drm/i915/wopcm: update default size for gen11+

2019-06-05 Thread Michal Wajdeczko
On Wed, 05 Jun 2019 01:15:29 +0200, Daniele Ceraolo Spurio wrote: The size has been increased to 2MB starting from gen11. GuC and HuC FWs nit: s/gen11/Gen11 fit in 1MB so we were fine even with the legacy define, but let's still move to the correct one before the blobs grow to avoid being

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: rename header test build commands to avoid conflicts

2019-06-05 Thread Patchwork
== Series Details == Series: drm/i915: rename header test build commands to avoid conflicts URL : https://patchwork.freedesktop.org/series/61655/ State : success == Summary == CI Bug Log - changes from CI_DRM_6195 -> Patchwork_13179 Summary

Re: [Intel-gfx] [PATCH i-g-t 1/2] i915/gem_exec_latency: Measure the latency of context switching

2019-06-05 Thread Mika Kuoppala
Chris Wilson writes: > Measure the baseline latency between contexts in order to directly > compare that with the additional cost of preemption. > > Signed-off-by: Chris Wilson > --- > tests/i915/gem_exec_latency.c | 230 ++ > 1 file changed, 230 insertions(+) >

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Vulkan performance query support (rev4)

2019-06-05 Thread Patchwork
== Series Details == Series: drm/i915: Vulkan performance query support (rev4) URL : https://patchwork.freedesktop.org/series/60916/ State : warning == Summary == $ dim checkpatch origin/drm-tip abfe9e305ec9 drm/i915/perf: introduce a versioning of the i915-perf uapi 32203e3c3c4c drm/i915/perf

Re: [Intel-gfx] [PATCH 1/2] drm/i915/guc: always use Command Transport Buffers

2019-06-05 Thread Michal Wajdeczko
On Tue, 04 Jun 2019 22:29:20 +0200, Daniele Ceraolo Spurio wrote: Now that we've moved the gen9 guc blobs to version 32 we have CTB support on all gens, so no need to restrict the usage to gen11+. Note that mmio communication is still required for CTB initialization. s/gen9/Gen9 s/guc/GuC s

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Vulkan performance query support (rev4)

2019-06-05 Thread Patchwork
== Series Details == Series: drm/i915: Vulkan performance query support (rev4) URL : https://patchwork.freedesktop.org/series/60916/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915/perf: introduce a versioning of the i915-perf uapi Okay! Commi

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Move intel_dp->prepare_link_train assignment into ddi code

2019-06-05 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Move intel_dp->prepare_link_train assignment into ddi code URL : https://patchwork.freedesktop.org/series/61586/ State : success == Summary == CI Bug Log - changes from CI_DRM_6187_full -> Patchwork_13169_full =

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Vulkan performance query support (rev4)

2019-06-05 Thread Patchwork
== Series Details == Series: drm/i915: Vulkan performance query support (rev4) URL : https://patchwork.freedesktop.org/series/60916/ State : success == Summary == CI Bug Log - changes from CI_DRM_6195 -> Patchwork_13180 Summary --- *

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv

2019-06-05 Thread Ville Syrjälä
On Fri, May 31, 2019 at 04:05:51PM +0300, Ville Syrjälä wrote: > On Thu, May 30, 2019 at 05:43:00AM -, Patchwork wrote: > > == Series Details == > > > > Series: series starting with [01/10] drm/i915: Add windowing for primary > > planes on gen2/3 and chv > > URL : https://patchwork.freedesk

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv

2019-06-05 Thread Ville Syrjälä
On Wed, Jun 05, 2019 at 04:01:05PM +0200, Maarten Lankhorst wrote: > Op 31-05-2019 om 15:05 schreef Ville Syrjälä: > > On Thu, May 30, 2019 at 05:43:00AM -, Patchwork wrote: > >> == Series Details == > >> > >> Series: series starting with [01/10] drm/i915: Add windowing for primary > >> planes

Re: [Intel-gfx] [PATCH 2/5] drm/i915: Rename HSW/BDW PLL bits

2019-06-05 Thread Ville Syrjälä
On Wed, Jun 05, 2019 at 04:24:25PM +0200, Maarten Lankhorst wrote: > Op 04-06-2019 om 22:09 schreef Ville Syrjala: > > From: Ville Syrjälä > > > > Give the PLL control register bits better names on HSW/BDW. > > > > Signed-off-by: Ville Syrjälä > > --- > > drivers/gpu/drm/i915/i915_reg.h |

Re: [Intel-gfx] [PATCH 2/2] drm/i915/dsi: Use a fuzzy check for burst mode clock check

2019-06-05 Thread Hans de Goede
Hi, Thank you for the reviews. On 04-06-19 19:29, Ville Syrjälä wrote: On Fri, May 24, 2019 at 07:40:28PM +0200, Hans de Goede wrote: Prior to this commit we fail to init the DSI panel on the GPD MicroPC: https://www.indiegogo.com/projects/gpd-micropc-6-inch-handheld-industry-laptop#/ The pro

[Intel-gfx] [PATCH 1/2] drm/i915: Add missing commas to the end of the subplatform ID arrays

2019-06-05 Thread Ville Syrjala
From: Ville Syrjälä Add a comma after the final entry to make diffs less obnoxious if we have to add further entries past the last one. Cc: Tvrtko Ursulin Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_device_info.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) d

[Intel-gfx] [PATCH 2/2] drm/i915: Kill INTEL_SUBPLATFORM_AML

2019-06-05 Thread Ville Syrjala
From: Ville Syrjälä All AML parts are either KBL ULX or CFL ULX so there is no point in keeping INTEL_SUBPLATFORM_AML around. As these are the only CFL ULX parts (normal CFL didn't have Y SKUs) so we'll just replace IS_AML_ULX with IS_CFL_ULX (it was already paired with IS_KBL_ULX which accounts

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Fix TypeC port mode switching

2019-06-05 Thread Patchwork
== Series Details == Series: drm/i915: Fix TypeC port mode switching URL : https://patchwork.freedesktop.org/series/61590/ State : success == Summary == CI Bug Log - changes from CI_DRM_6187_full -> Patchwork_13170_full Summary --- *

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Skip context_barrier emission for unused contexts

2019-06-05 Thread Patchwork
== Series Details == Series: drm/i915: Skip context_barrier emission for unused contexts URL : https://patchwork.freedesktop.org/series/61595/ State : success == Summary == CI Bug Log - changes from CI_DRM_6187_full -> Patchwork_13171_full

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Add missing commas to the end of the subplatform ID arrays

2019-06-05 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Add missing commas to the end of the subplatform ID arrays URL : https://patchwork.freedesktop.org/series/61673/ State : success == Summary == CI Bug Log - changes from CI_DRM_6196 -> Patchwork_13181 ===

Re: [Intel-gfx] [PATCH 1/2] drm/i915/guc: always use Command Transport Buffers

2019-06-05 Thread Daniele Ceraolo Spurio
On 6/5/19 8:20 AM, Michal Wajdeczko wrote: On Tue, 04 Jun 2019 22:29:20 +0200, Daniele Ceraolo Spurio wrote: Now that we've moved the gen9 guc blobs to version 32 we have CTB support on all gens, so no need to restrict the usage to gen11+. Note that mmio communication is still required for

Re: [Intel-gfx] [PATCH 3/4] drm/i915/dsi: Move vlv/icl_dphy_param_init call out of intel_dsi_vbt_init

2019-06-05 Thread Hans de Goede
Hi, On 04-06-19 19:35, Ville Syrjälä wrote: On Fri, May 24, 2019 at 06:30:19PM +0200, Hans de Goede wrote: The vlv/icl_dphy_param_init calls do various calculations to set dphy parameters based on the pclk. Move the calling of vlv/icl_dphy_param_init to vlv_dsi_init to give vlv_dsi_init a chan

[Intel-gfx] [PATCH 2/3] drm/i915/dsi: Move vlv/icl_dphy_param_init call out of intel_dsi_vbt_init (v2)

2019-06-05 Thread Hans de Goede
The vlv/icl_dphy_param_init calls do various calculations to set dphy parameters based on the pclk. Move the calling of vlv/icl_dphy_param_init to vlv_dsi_init to give vlv_dsi_init a chance to tweak the pclk before these calculations are done. Changes in v2: -Also moves the icl and vlv specific d

[Intel-gfx] [PATCH 3/3] drm/i915/dsi: Read back pclk set by GOP and use that as pclk (v3)

2019-06-05 Thread Hans de Goede
The GOP sometimes initializes the pclk at a (slightly) different frequency then the pclk which we've calculated. This commit makes the DSI code read-back the pclk set by the GOP and if that is within a reasonable margin of the calculated pclk, uses that instead. This fixes the first modeset being

[Intel-gfx] [PATCH 1/3] drm/i915/dsi: Move logging of DSI VBT parameters to a helper function

2019-06-05 Thread Hans de Goede
This is a preparation patch for moving the calling of *_dphy_param_init() out of intel_dsi_vbt_init. Reviewed-by: Ville Syrjälä Signed-off-by: Hans de Goede --- drivers/gpu/drm/i915/intel_dsi_vbt.c | 77 +++- 1 file changed, 42 insertions(+), 35 deletions(-) diff --git

Re: [Intel-gfx] [PATCH] drm/i915/wopcm: update default size for gen11+

2019-06-05 Thread Daniele Ceraolo Spurio
On 6/5/19 7:51 AM, Michal Wajdeczko wrote: On Wed, 05 Jun 2019 01:15:29 +0200, Daniele Ceraolo Spurio wrote: The size has been increased to 2MB starting from gen11. GuC and HuC FWs nit: s/gen11/Gen11 fit in 1MB so we were fine even with the legacy define, but let's still move to the cor

Re: [Intel-gfx] [PATCH] drm/i915/wopcm: update default size for gen11+

2019-06-05 Thread Michal Wajdeczko
On Wed, 05 Jun 2019 20:21:54 +0200, Daniele Ceraolo Spurio wrote: On 6/5/19 7:51 AM, Michal Wajdeczko wrote: On Wed, 05 Jun 2019 01:15:29 +0200, Daniele Ceraolo Spurio wrote: The size has been increased to 2MB starting from gen11. GuC and HuC FWs nit: s/gen11/Gen11 fit in 1MB so w

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915/dsi: Move logging of DSI VBT parameters to a helper function

2019-06-05 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915/dsi: Move logging of DSI VBT parameters to a helper function URL : https://patchwork.freedesktop.org/series/61679/ State : warning == Summary == $ dim checkpatch origin/drm-tip e5829ea35195 drm/i915/dsi: Move logging of DSI VBT

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/3] drm/i915/dsi: Move logging of DSI VBT parameters to a helper function

2019-06-05 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915/dsi: Move logging of DSI VBT parameters to a helper function URL : https://patchwork.freedesktop.org/series/61679/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915/dsi: Move loggi

Re: [Intel-gfx] [PATCH 2/3] drm/i915/dsi: Move vlv/icl_dphy_param_init call out of intel_dsi_vbt_init (v2)

2019-06-05 Thread Ville Syrjälä
On Wed, Jun 05, 2019 at 08:17:34PM +0200, Hans de Goede wrote: > The vlv/icl_dphy_param_init calls do various calculations to set dphy > parameters based on the pclk. > > Move the calling of vlv/icl_dphy_param_init to vlv_dsi_init to give > vlv_dsi_init a chance to tweak the pclk before these calc

[Intel-gfx] [PATCH] drm/i915/ehl: Add support for DPLL4 (v5)

2019-06-05 Thread Vivek Kasireddy
This patch adds support for DPLL4 on EHL that include the following restrictions: - DPLL4 cannot be used with DDIA (combo port A internal eDP usage). DPLL4 can be used with other DDIs, including DDID (combo port A external usage). - DPLL4 cannot be enabled when DC5 or DC6 are enabled. - The

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gtt: Replace struct_mutex serialisation for allocation (rev2)

2019-06-05 Thread Patchwork
== Series Details == Series: drm/i915/gtt: Replace struct_mutex serialisation for allocation (rev2) URL : https://patchwork.freedesktop.org/series/61533/ State : success == Summary == CI Bug Log - changes from CI_DRM_6187_full -> Patchwork_13172_full ===

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915/dsi: Move logging of DSI VBT parameters to a helper function

2019-06-05 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915/dsi: Move logging of DSI VBT parameters to a helper function URL : https://patchwork.freedesktop.org/series/61679/ State : success == Summary == CI Bug Log - changes from CI_DRM_6196 -> Patchwork_13182 ==

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/ehl: Add support for DPLL4 (v5)

2019-06-05 Thread Patchwork
== Series Details == Series: drm/i915/ehl: Add support for DPLL4 (v5) URL : https://patchwork.freedesktop.org/series/61684/ State : failure == Summary == Applying: drm/i915/ehl: Add support for DPLL4 (v5) .git/rebase-apply/patch:146: new blank line at EOF. + warning: 1 line adds whitespace err

[Intel-gfx] [PATCH] drm/crc-debugfs: User irqsafe spinlock in drm_crtc_add_crc_entry

2019-06-05 Thread Daniel Vetter
We can be called from any context, we need to be prepared. Noticed this while hacking on vkms, which calls this function from a normal worker. Which really upsets lockdep. Cc: Rodrigo Siqueira Cc: Tomeu Vizoso Cc: Emil Velikov Cc: Benjamin Gaignard Signed-off-by: Daniel Vetter --- drivers/g

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Don't check uv_wm in skl_plane_wm_equals() (rev2)

2019-06-05 Thread Patchwork
== Series Details == Series: drm/i915: Don't check uv_wm in skl_plane_wm_equals() (rev2) URL : https://patchwork.freedesktop.org/series/58281/ State : success == Summary == CI Bug Log - changes from CI_DRM_6187_full -> Patchwork_13173_full

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/crc-debugfs: User irqsafe spinlock in drm_crtc_add_crc_entry

2019-06-05 Thread Patchwork
== Series Details == Series: drm/crc-debugfs: User irqsafe spinlock in drm_crtc_add_crc_entry URL : https://patchwork.freedesktop.org/series/61687/ State : warning == Summary == $ dim checkpatch origin/drm-tip 91ba38231fc1 drm/crc-debugfs: User irqsafe spinlock in drm_crtc_add_crc_entry -:41:

[Intel-gfx] [PATCH i-g-t] gitlab-ci: add build for MIPS

2019-06-05 Thread Guillaume Tucker
Add Docker image and Gitlab CI steps to run builds for the MIPS architecture using Debian Buster. Signed-off-by: Guillaume Tucker --- .gitlab-ci.yml | 28 Dockerfile.debian-mips | 38 ++ meson-cross-mips.txt | 12

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/crc-debugfs: User irqsafe spinlock in drm_crtc_add_crc_entry

2019-06-05 Thread Patchwork
== Series Details == Series: drm/crc-debugfs: User irqsafe spinlock in drm_crtc_add_crc_entry URL : https://patchwork.freedesktop.org/series/61687/ State : success == Summary == CI Bug Log - changes from CI_DRM_6197 -> Patchwork_13184 Summa

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] i915/gem_create: Do not build create-clear for MIPS

2019-06-05 Thread Guillaume Tucker
On 03/04/2019 08:25, Guillaume Tucker wrote: > On 02/04/2019 09:35, Petri Latvala wrote: >> On Mon, Apr 01, 2019 at 04:39:24PM +0200, Guillaume Tucker wrote: >>> The MIPS architecture doesn't provide the hardware atomics that are >>> required for the "create-clear" sub-test such as >>> __sync_add_a

[Intel-gfx] [PULL] drm-misc-fixes

2019-06-05 Thread Sean Paul
Hi Da.*, Our slow release cycle continues, only 2 contributors since last time! The set from Helen avoids blocking in async commits and Lucas ensures the sg list is unmapped with the udmabuf. drm-misc-fixes-2019-06-05: - Allow fb changes in async commits (fixes igt failures) (Helen) - Actually un

[Intel-gfx] [PATCH] drm/i915/ehl: Support HBR3 on EHL combo PHY

2019-06-05 Thread Matt Roper
Unlike ICL, EHL's combo PHYs can support HBR3 data rates. Note that this just extends the upper limit; we will continue to honor the max data rate specified in the VBT in cases where it is lower than HBR3. Signed-off-by: Matt Roper --- drivers/gpu/drm/i915/intel_dp.c | 1 + 1 file changed, 1 in

Re: [Intel-gfx] [PATCH] drm/i915/ehl: Support HBR3 on EHL combo PHY

2019-06-05 Thread Manasi Navare
On Wed, Jun 05, 2019 at 02:18:32PM -0700, Matt Roper wrote: > Unlike ICL, EHL's combo PHYs can support HBR3 data rates. Note that > this just extends the upper limit; we will continue to honor the max > data rate specified in the VBT in cases where it is lower than HBR3. > > Signed-off-by: Matt R

[Intel-gfx] [PATCH] drm/i915/icl: Enable SSC for ICL using panel_use_ssc

2019-06-05 Thread Aditya Swarup
To enable SSC for DPLL, we need to set the bit DPLL_CFGCR0_SSC_ENABLE_ICL while configuring cfgcr0 register. This bit should be set only when we are enabling SSC using kernel mod parameter panel_use_ssc. Also, moving intel_panel_use_ssc() declaration to intel_drv.h. Signed-off-by: Aditya Swarup

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/ehl: Support HBR3 on EHL combo PHY

2019-06-05 Thread Patchwork
== Series Details == Series: drm/i915/ehl: Support HBR3 on EHL combo PHY URL : https://patchwork.freedesktop.org/series/61690/ State : success == Summary == CI Bug Log - changes from CI_DRM_6198 -> Patchwork_13185 Summary --- **SUCCE

Re: [Intel-gfx] [PATCH] drm/i915/ehl: Support HBR3 on EHL combo PHY

2019-06-05 Thread Matt Roper
On Wed, Jun 05, 2019 at 02:51:08PM -0700, Manasi Navare wrote: > On Wed, Jun 05, 2019 at 02:18:32PM -0700, Matt Roper wrote: > > Unlike ICL, EHL's combo PHYs can support HBR3 data rates. Note that > > this just extends the upper limit; we will continue to honor the max > > data rate specified in t

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/icl: Enable SSC for ICL using panel_use_ssc

2019-06-05 Thread Patchwork
== Series Details == Series: drm/i915/icl: Enable SSC for ICL using panel_use_ssc URL : https://patchwork.freedesktop.org/series/61692/ State : warning == Summary == $ dim checkpatch origin/drm-tip 2bbb59c67ab3 drm/i915/icl: Enable SSC for ICL using panel_use_ssc -:44: WARNING:BRACES: braces {

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/icl: Enable SSC for ICL using panel_use_ssc

2019-06-05 Thread Patchwork
== Series Details == Series: drm/i915/icl: Enable SSC for ICL using panel_use_ssc URL : https://patchwork.freedesktop.org/series/61692/ State : success == Summary == CI Bug Log - changes from CI_DRM_6199 -> Patchwork_13186 Summary ---

[Intel-gfx] [PATCH] drm/i915/dmc: protect against reading random memory

2019-06-05 Thread Lucas De Marchi
While loading the DMC firmware we were double checking the headers made sense, but in no place we checked that we were actually reading memory we were supposed to. This could be wrong in case the firmware file is truncated or malformed. Before this patch: # ls -l /lib/firmware/i915/icl_dmc

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/5] drm/i915: Do not touch the PCH SSC reference if a PLL is using it

2019-06-05 Thread Patchwork
== Series Details == Series: series starting with [1/5] drm/i915: Do not touch the PCH SSC reference if a PLL is using it URL : https://patchwork.freedesktop.org/series/61608/ State : success == Summary == CI Bug Log - changes from CI_DRM_6188_full -> Patchwork_13174_full

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dmc: protect against reading random memory

2019-06-05 Thread Patchwork
== Series Details == Series: drm/i915/dmc: protect against reading random memory URL : https://patchwork.freedesktop.org/series/61695/ State : warning == Summary == $ dim checkpatch origin/drm-tip 8417b00f5296 drm/i915/dmc: protect against reading random memory -:23: WARNING:COMMIT_LOG_LONG_LI

[Intel-gfx] [PATCH] drm/i915/ehl: Add support for DPLL4 (v6)

2019-06-05 Thread Vivek Kasireddy
This patch adds support for DPLL4 on EHL that include the following restrictions: - DPLL4 cannot be used with DDIA (combo port A internal eDP usage). DPLL4 can be used with other DDIs, including DDID (combo port A external usage). - DPLL4 cannot be enabled when DC5 or DC6 are enabled. - The

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/ehl: Add support for DPLL4 (v6)

2019-06-05 Thread Patchwork
== Series Details == Series: drm/i915/ehl: Add support for DPLL4 (v6) URL : https://patchwork.freedesktop.org/series/61696/ State : failure == Summary == CALLscripts/checksyscalls.sh CALLscripts/atomic/check-atomics.sh DESCEND objtool CHK include/generated/compile.h CC [M]

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dmc: protect against reading random memory

2019-06-05 Thread Patchwork
== Series Details == Series: drm/i915/dmc: protect against reading random memory URL : https://patchwork.freedesktop.org/series/61695/ State : success == Summary == CI Bug Log - changes from CI_DRM_6199 -> Patchwork_13187 Summary ---

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Kill INTEL_SUBPLATFORM_AML

2019-06-05 Thread Souza, Jose
This is the same as WHL, we added the AML separated just in case it needed some different workaround or code path but looks like it don't need at all. Any objection with this change Rodrigo? On Wed, 2019-06-05 at 19:29 +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > All AML parts are eith

Re: [Intel-gfx] [PATCH] drm/i915: rename header test build commands to avoid conflicts

2019-06-05 Thread yamada.masahiro
Hi, > -Original Message- > From: Jani Nikula [mailto:jani.nik...@intel.com] > Sent: Wednesday, June 05, 2019 10:22 PM > To: intel-gfx@lists.freedesktop.org > Cc: jani.nik...@intel.com; kbuild test robot ; Chris Wilson > ; Yamada, Masahiro/山田 真弘 > ; Sam Ravnborg > Subject: [PATCH] drm/i915

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/wopcm: update default size for gen11+

2019-06-05 Thread Patchwork
== Series Details == Series: drm/i915/wopcm: update default size for gen11+ URL : https://patchwork.freedesktop.org/series/61617/ State : success == Summary == CI Bug Log - changes from CI_DRM_6189_full -> Patchwork_13176_full Summary -